IoRemappingTable.h 9.1 KB

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  1. /** @file
  2. ACPI IO Remapping Table (IORT) definitions.
  3. Copyright (c) 2017, Linaro Limited. All rights reserved.<BR>
  4. Copyright (c) 2018 - 2022, Arm Limited. All rights reserved.<BR>
  5. SPDX-License-Identifier: BSD-2-Clause-Patent
  6. @par Reference(s):
  7. - IO Remapping Table, Platform Design Document, Revision E.d, Feb 2022
  8. (https://developer.arm.com/documentation/den0049/)
  9. - IO Remapping Table, Platform Design Document, Revision E.e, Sept 2022
  10. (https://developer.arm.com/documentation/den0049/)
  11. @par Glossary:
  12. - Ref : Reference
  13. - Mem : Memory
  14. - Desc : Descriptor
  15. **/
  16. #ifndef __IO_REMAPPING_TABLE_H__
  17. #define __IO_REMAPPING_TABLE_H__
  18. #include <IndustryStandard/Acpi.h>
  19. #define EFI_ACPI_IO_REMAPPING_TABLE_REVISION_00 0x0
  20. #define EFI_ACPI_IO_REMAPPING_TABLE_REVISION_04 0x4 // Deprecated
  21. #define EFI_ACPI_IO_REMAPPING_TABLE_REVISION_05 0x5
  22. #define EFI_ACPI_IO_REMAPPING_TABLE_REVISION_06 0x6
  23. #define EFI_ACPI_IORT_TYPE_ITS_GROUP 0x0
  24. #define EFI_ACPI_IORT_TYPE_NAMED_COMP 0x1
  25. #define EFI_ACPI_IORT_TYPE_ROOT_COMPLEX 0x2
  26. #define EFI_ACPI_IORT_TYPE_SMMUv1v2 0x3
  27. #define EFI_ACPI_IORT_TYPE_SMMUv3 0x4
  28. #define EFI_ACPI_IORT_TYPE_PMCG 0x5
  29. #define EFI_ACPI_IORT_TYPE_RMR 0x6
  30. #define EFI_ACPI_IORT_MEM_ACCESS_PROP_CCA BIT0
  31. #define EFI_ACPI_IORT_MEM_ACCESS_PROP_AH_TR BIT0
  32. #define EFI_ACPI_IORT_MEM_ACCESS_PROP_AH_WA BIT1
  33. #define EFI_ACPI_IORT_MEM_ACCESS_PROP_AH_RA BIT2
  34. #define EFI_ACPI_IORT_MEM_ACCESS_PROP_AH_AHO BIT3
  35. #define EFI_ACPI_IORT_MEM_ACCESS_FLAGS_CPM BIT0
  36. #define EFI_ACPI_IORT_MEM_ACCESS_FLAGS_DACS BIT1
  37. #define EFI_ACPI_IORT_SMMUv1v2_MODEL_v1 0x0
  38. #define EFI_ACPI_IORT_SMMUv1v2_MODEL_v2 0x1
  39. #define EFI_ACPI_IORT_SMMUv1v2_MODEL_MMU400 0x2
  40. #define EFI_ACPI_IORT_SMMUv1v2_MODEL_MMU500 0x3
  41. #define EFI_ACPI_IORT_SMMUv1v2_MODEL_MMU401 0x4
  42. #define EFI_ACPI_IORT_SMMUv1v2_MODEL_CAVIUM_THX_v2 0x5
  43. #define EFI_ACPI_IORT_SMMUv1v2_FLAG_DVM BIT0
  44. #define EFI_ACPI_IORT_SMMUv1v2_FLAG_COH_WALK BIT1
  45. #define EFI_ACPI_IORT_SMMUv1v2_INT_FLAG_LEVEL 0x0
  46. #define EFI_ACPI_IORT_SMMUv1v2_INT_FLAG_EDGE 0x1
  47. #define EFI_ACPI_IORT_SMMUv3_FLAG_COHAC_OVERRIDE BIT0
  48. #define EFI_ACPI_IORT_SMMUv3_FLAG_HTTU_OVERRIDE BIT1
  49. #define EFI_ACPI_IORT_SMMUv3_FLAG_PROXIMITY_DOMAIN BIT3
  50. #define EFI_ACPI_IORT_SMMUv3_FLAG_DEVICEID_VALID BIT4
  51. #define EFI_ACPI_IORT_SMMUv3_MODEL_GENERIC 0x0
  52. #define EFI_ACPI_IORT_SMMUv3_MODEL_HISILICON_HI161X 0x1
  53. #define EFI_ACPI_IORT_SMMUv3_MODEL_CAVIUM_CN99XX 0x2
  54. #define EFI_ACPI_IORT_ROOT_COMPLEX_ATS_UNSUPPORTED 0x0
  55. #define EFI_ACPI_IORT_ROOT_COMPLEX_ATS_SUPPORTED BIT0
  56. #define EFI_ACPI_IORT_ROOT_COMPLEX_PRI_UNSUPPORTED 0x0
  57. #define EFI_ACPI_IORT_ROOT_COMPLEX_PRI_SUPPORTED BIT1
  58. #define EFI_ACPI_IORT_ROOT_COMPLEX_PASID_FWD_UNSUPPORTED 0x0
  59. #define EFI_ACPI_IORT_ROOT_COMPLEX_PASID_FWD_SUPPORTED BIT2
  60. #define EFI_ACPI_IORT_ROOT_COMPLEX_PASID_UNSUPPORTED 0x0
  61. #define EFI_ACPI_IORT_ROOT_COMPLEX_PASID_SUPPORTED BIT1
  62. #define EFI_ACPI_IORT_RMR_REMAP_NOT_PERMITTED 0x0
  63. #define EFI_ACPI_IORT_RMR_REMAP_PERMITTED BIT0
  64. #define EFI_ACPI_IORT_RMR_ACCESS_REQ_NOT_PRIVILEGED 0x0
  65. #define EFI_ACPI_IORT_RMR_ACCESS_REQ_PRIVILEGED BIT1
  66. #define EFI_ACPI_IORT_RMR_ACCESS_ATTRIB_DEV_NGNRNE 0x0
  67. #define EFI_ACPI_IORT_RMR_ACCESS_ATTRIB_DEV_NGNRE 0x1
  68. #define EFI_ACPI_IORT_RMR_ACCESS_ATTRIB_DEV_NGRE 0x2
  69. #define EFI_ACPI_IORT_RMR_ACCESS_ATTRIB_DEV_GRE 0x3
  70. #define EFI_ACPI_IORT_RMR_ACCESS_ATTRIB_NORM_IN_NC_OUT_NC 0x4
  71. #define EFI_ACPI_IORT_RMR_ACCESS_ATTRIB_NORM_IN_WB_OUT_WB_ISH 0x5
  72. #define EFI_ACPI_IORT_ID_MAPPING_FLAGS_SINGLE BIT0
  73. #define EFI_ACPI_IORT_RMR_NODE_REVISION_02 0x2 // Deprecated
  74. #pragma pack(1)
  75. ///
  76. /// Table header
  77. ///
  78. typedef struct {
  79. EFI_ACPI_DESCRIPTION_HEADER Header;
  80. UINT32 NumNodes;
  81. UINT32 NodeOffset;
  82. UINT32 Reserved;
  83. } EFI_ACPI_6_0_IO_REMAPPING_TABLE;
  84. ///
  85. /// Definition for ID mapping table shared by all node types
  86. ///
  87. typedef struct {
  88. UINT32 InputBase;
  89. UINT32 NumIds;
  90. UINT32 OutputBase;
  91. UINT32 OutputReference;
  92. UINT32 Flags;
  93. } EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE;
  94. ///
  95. /// Node header definition shared by all node types
  96. ///
  97. typedef struct {
  98. UINT8 Type;
  99. UINT16 Length;
  100. UINT8 Revision;
  101. UINT32 Identifier;
  102. UINT32 NumIdMappings;
  103. UINT32 IdReference;
  104. } EFI_ACPI_6_0_IO_REMAPPING_NODE;
  105. ///
  106. /// Node type 0: ITS node
  107. ///
  108. typedef struct {
  109. EFI_ACPI_6_0_IO_REMAPPING_NODE Node;
  110. UINT32 NumItsIdentifiers;
  111. // UINT32 ItsIdentifiers[NumItsIdentifiers];
  112. } EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE;
  113. ///
  114. /// Node type 1: root complex node
  115. ///
  116. typedef struct {
  117. EFI_ACPI_6_0_IO_REMAPPING_NODE Node;
  118. UINT32 CacheCoherent;
  119. UINT8 AllocationHints;
  120. UINT16 Reserved;
  121. UINT8 MemoryAccessFlags;
  122. UINT32 AtsAttribute;
  123. UINT32 PciSegmentNumber;
  124. UINT8 MemoryAddressSize;
  125. UINT16 PasidCapabilities;
  126. UINT8 Reserved1[1];
  127. UINT32 Flags;
  128. } EFI_ACPI_6_0_IO_REMAPPING_RC_NODE;
  129. ///
  130. /// Node type 2: named component node
  131. ///
  132. typedef struct {
  133. EFI_ACPI_6_0_IO_REMAPPING_NODE Node;
  134. UINT32 Flags;
  135. UINT32 CacheCoherent;
  136. UINT8 AllocationHints;
  137. UINT16 Reserved;
  138. UINT8 MemoryAccessFlags;
  139. UINT8 AddressSizeLimit;
  140. // UINT8 ObjectName[];
  141. } EFI_ACPI_6_0_IO_REMAPPING_NAMED_COMP_NODE;
  142. ///
  143. /// Node type 3: SMMUv1 or SMMUv2 node
  144. ///
  145. typedef struct {
  146. UINT32 Interrupt;
  147. UINT32 InterruptFlags;
  148. } EFI_ACPI_6_0_IO_REMAPPING_SMMU_INT;
  149. typedef struct {
  150. EFI_ACPI_6_0_IO_REMAPPING_NODE Node;
  151. UINT64 Base;
  152. UINT64 Span;
  153. UINT32 Model;
  154. UINT32 Flags;
  155. UINT32 GlobalInterruptArrayRef;
  156. UINT32 NumContextInterrupts;
  157. UINT32 ContextInterruptArrayRef;
  158. UINT32 NumPmuInterrupts;
  159. UINT32 PmuInterruptArrayRef;
  160. UINT32 SMMU_NSgIrpt;
  161. UINT32 SMMU_NSgIrptFlags;
  162. UINT32 SMMU_NSgCfgIrpt;
  163. UINT32 SMMU_NSgCfgIrptFlags;
  164. // EFI_ACPI_6_0_IO_REMAPPING_SMMU_CTX_INT ContextInterrupt[NumContextInterrupts];
  165. // EFI_ACPI_6_0_IO_REMAPPING_SMMU_CTX_INT PmuInterrupt[NumPmuInterrupts];
  166. } EFI_ACPI_6_0_IO_REMAPPING_SMMU_NODE;
  167. ///
  168. /// Node type 4: SMMUv3 node
  169. ///
  170. typedef struct {
  171. EFI_ACPI_6_0_IO_REMAPPING_NODE Node;
  172. UINT64 Base;
  173. UINT32 Flags;
  174. UINT32 Reserved;
  175. UINT64 VatosAddress;
  176. UINT32 Model;
  177. UINT32 Event;
  178. UINT32 Pri;
  179. UINT32 Gerr;
  180. UINT32 Sync;
  181. UINT32 ProximityDomain;
  182. UINT32 DeviceIdMappingIndex;
  183. } EFI_ACPI_6_0_IO_REMAPPING_SMMU3_NODE;
  184. ///
  185. /// Node type 5: PMCG node
  186. ///
  187. typedef struct {
  188. EFI_ACPI_6_0_IO_REMAPPING_NODE Node;
  189. UINT64 Base;
  190. UINT32 OverflowInterruptGsiv;
  191. UINT32 NodeReference;
  192. UINT64 Page1Base;
  193. // EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE OverflowInterruptMsiMapping[1];
  194. } EFI_ACPI_6_0_IO_REMAPPING_PMCG_NODE;
  195. ///
  196. /// Memory Range Descriptor.
  197. ///
  198. typedef struct {
  199. /// Base address of Reserved Memory Range,
  200. /// aligned to a page size of 64K.
  201. UINT64 Base;
  202. /// Length of the Reserved Memory range.
  203. /// Must be a multiple of the page size of 64K.
  204. UINT64 Length;
  205. /// Reserved, must be zero.
  206. UINT32 Reserved;
  207. } EFI_ACPI_6_0_IO_REMAPPING_MEM_RANGE_DESC;
  208. ///
  209. /// Node type 6: Reserved Memory Range (RMR) node
  210. ///
  211. typedef struct {
  212. EFI_ACPI_6_0_IO_REMAPPING_NODE Node;
  213. /// RMR flags
  214. UINT32 Flags;
  215. /// Memory range descriptor count.
  216. UINT32 NumMemRangeDesc;
  217. /// Offset of the memory range descriptor array.
  218. UINT32 MemRangeDescRef;
  219. // EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE IdMapping[1];
  220. // EFI_ACPI_6_0_IO_REMAPPING_MEM_RANGE_DESC MemRangeDesc[1];
  221. } EFI_ACPI_6_0_IO_REMAPPING_RMR_NODE;
  222. #pragma pack()
  223. #endif