PciEmulation.c 3.6 KB

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  1. /** @file
  2. Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
  3. Copyright (c) 2016, Linaro, Ltd. All rights reserved.<BR>
  4. SPDX-License-Identifier: BSD-2-Clause-Patent
  5. **/
  6. #include <PiDxe.h>
  7. #include <Library/BaseLib.h>
  8. #include <Library/DebugLib.h>
  9. #include <Library/IoLib.h>
  10. #include <Library/NonDiscoverableDeviceRegistrationLib.h>
  11. #include <Library/UefiBootServicesTableLib.h>
  12. #include <Protocol/EmbeddedExternalDevice.h>
  13. #include <TPS65950.h>
  14. #include <Omap3530/Omap3530.h>
  15. EMBEDDED_EXTERNAL_DEVICE *gTPS65950;
  16. #define HOST_CONTROLLER_OPERATION_REG_SIZE 0x44
  17. STATIC
  18. EFI_STATUS
  19. ConfigureUSBHost (
  20. NON_DISCOVERABLE_DEVICE *Device
  21. )
  22. {
  23. EFI_STATUS Status;
  24. UINT8 Data = 0;
  25. // Take USB host out of force-standby mode
  26. MmioWrite32 (UHH_SYSCONFIG, UHH_SYSCONFIG_MIDLEMODE_NO_STANDBY
  27. | UHH_SYSCONFIG_CLOCKACTIVITY_ON
  28. | UHH_SYSCONFIG_SIDLEMODE_NO_STANDBY
  29. | UHH_SYSCONFIG_ENAWAKEUP_ENABLE
  30. | UHH_SYSCONFIG_AUTOIDLE_ALWAYS_RUN);
  31. MmioWrite32 (UHH_HOSTCONFIG, UHH_HOSTCONFIG_P3_CONNECT_STATUS_DISCONNECT
  32. | UHH_HOSTCONFIG_P2_CONNECT_STATUS_DISCONNECT
  33. | UHH_HOSTCONFIG_P1_CONNECT_STATUS_DISCONNECT
  34. | UHH_HOSTCONFIG_ENA_INCR_ALIGN_DISABLE
  35. | UHH_HOSTCONFIG_ENA_INCR16_ENABLE
  36. | UHH_HOSTCONFIG_ENA_INCR8_ENABLE
  37. | UHH_HOSTCONFIG_ENA_INCR4_ENABLE
  38. | UHH_HOSTCONFIG_AUTOPPD_ON_OVERCUR_EN_ON
  39. | UHH_HOSTCONFIG_P1_ULPI_BYPASS_ULPI_MODE);
  40. // USB reset (GPIO 147 - Port 5 pin 19) output high
  41. MmioAnd32 (GPIO5_BASE + GPIO_OE, ~BIT19);
  42. MmioWrite32 (GPIO5_BASE + GPIO_SETDATAOUT, BIT19);
  43. // Get the Power IC protocol
  44. Status = gBS->LocateProtocol (&gEmbeddedExternalDeviceProtocolGuid, NULL, (VOID **)&gTPS65950);
  45. ASSERT_EFI_ERROR (Status);
  46. // Power the USB PHY
  47. Data = VAUX_DEV_GRP_P1;
  48. Status = gTPS65950->Write (gTPS65950, EXTERNAL_DEVICE_REGISTER(I2C_ADDR_GRP_ID4, VAUX2_DEV_GRP), 1, &Data);
  49. ASSERT_EFI_ERROR(Status);
  50. Data = VAUX_DEDICATED_18V;
  51. Status = gTPS65950->Write (gTPS65950, EXTERNAL_DEVICE_REGISTER(I2C_ADDR_GRP_ID4, VAUX2_DEDICATED), 1, &Data);
  52. ASSERT_EFI_ERROR (Status);
  53. // Enable power to the USB hub
  54. Status = gTPS65950->Read (gTPS65950, EXTERNAL_DEVICE_REGISTER(I2C_ADDR_GRP_ID3, LEDEN), 1, &Data);
  55. ASSERT_EFI_ERROR (Status);
  56. // LEDAON controls the power to the USB host, PWM is disabled
  57. Data &= ~LEDAPWM;
  58. Data |= LEDAON;
  59. Status = gTPS65950->Write (gTPS65950, EXTERNAL_DEVICE_REGISTER(I2C_ADDR_GRP_ID3, LEDEN), 1, &Data);
  60. ASSERT_EFI_ERROR (Status);
  61. return EFI_SUCCESS;
  62. }
  63. EFI_STATUS
  64. EFIAPI
  65. PciEmulationEntryPoint (
  66. IN EFI_HANDLE ImageHandle,
  67. IN EFI_SYSTEM_TABLE *SystemTable
  68. )
  69. {
  70. UINT8 CapabilityLength;
  71. UINT8 PhysicalPorts;
  72. UINTN MemorySize;
  73. CapabilityLength = MmioRead8 (USB_EHCI_HCCAPBASE);
  74. PhysicalPorts = MmioRead32 (USB_EHCI_HCCAPBASE + 0x4) & 0x0000000F;
  75. MemorySize = CapabilityLength + HOST_CONTROLLER_OPERATION_REG_SIZE +
  76. 4 * PhysicalPorts - 1;
  77. return RegisterNonDiscoverableMmioDevice (
  78. NonDiscoverableDeviceTypeEhci,
  79. NonDiscoverableDeviceDmaTypeNonCoherent,
  80. ConfigureUSBHost,
  81. NULL,
  82. 1,
  83. USB_EHCI_HCCAPBASE, MemorySize
  84. );
  85. }