Omap3530Dma.h 4.2 KB

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  1. /** @file
  2. Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
  3. SPDX-License-Identifier: BSD-2-Clause-Patent
  4. **/
  5. #ifndef __OMAP3530DMA_H__
  6. #define __OMAP3530DMA_H__
  7. #define DMA4_MAX_CHANNEL 31
  8. #define DMA4_IRQENABLE_L(_i) (0x48056018 + (0x4*(_i)))
  9. #define DMA4_CCR(_i) (0x48056080 + (0x60*(_i)))
  10. #define DMA4_CICR(_i) (0x48056088 + (0x60*(_i)))
  11. #define DMA4_CSR(_i) (0x4805608c + (0x60*(_i)))
  12. #define DMA4_CSDP(_i) (0x48056090 + (0x60*(_i)))
  13. #define DMA4_CEN(_i) (0x48056094 + (0x60*(_i)))
  14. #define DMA4_CFN(_i) (0x48056098 + (0x60*(_i)))
  15. #define DMA4_CSSA(_i) (0x4805609c + (0x60*(_i)))
  16. #define DMA4_CDSA(_i) (0x480560a0 + (0x60*(_i)))
  17. #define DMA4_CSEI(_i) (0x480560a4 + (0x60*(_i)))
  18. #define DMA4_CSFI(_i) (0x480560a8 + (0x60*(_i)))
  19. #define DMA4_CDEI(_i) (0x480560ac + (0x60*(_i)))
  20. #define DMA4_CDFI(_i) (0x480560b0 + (0x60*(_i)))
  21. #define DMA4_GCR (0x48056078)
  22. // Channel Source Destination parameters
  23. #define DMA4_CSDP_DATA_TYPE8 0
  24. #define DMA4_CSDP_DATA_TYPE16 1
  25. #define DMA4_CSDP_DATA_TYPE32 2
  26. #define DMA4_CSDP_SRC_PACKED BIT6
  27. #define DMA4_CSDP_SRC_NONPACKED 0
  28. #define DMA4_CSDP_SRC_BURST_EN (0x0 << 7)
  29. #define DMA4_CSDP_SRC_BURST_EN16 (0x1 << 7)
  30. #define DMA4_CSDP_SRC_BURST_EN32 (0x2 << 7)
  31. #define DMA4_CSDP_SRC_BURST_EN64 (0x3 << 7)
  32. #define DMA4_CSDP_DST_PACKED BIT13
  33. #define DMA4_CSDP_DST_NONPACKED 0
  34. #define DMA4_CSDP_BURST_EN (0x0 << 14)
  35. #define DMA4_CSDP_BURST_EN16 (0x1 << 14)
  36. #define DMA4_CSDP_BURST_EN32 (0x2 << 14)
  37. #define DMA4_CSDP_BURST_EN64 (0x3 << 14)
  38. #define DMA4_CSDP_WRITE_MODE_NONE_POSTED (0x0 << 16)
  39. #define DMA4_CSDP_WRITE_MODE_POSTED (0x1 << 16)
  40. #define DMA4_CSDP_WRITE_MODE_LAST_NON_POSTED (0x2 << 16)
  41. #define DMA4_CSDP_DST_ENDIAN_LOCK_LOCK BIT18
  42. #define DMA4_CSDP_DST_ENDIAN_LOCK_ADAPT 0
  43. #define DMA4_CSDP_DST_ENDIAN_BIG BIT19
  44. #define DMA4_CSDP_DST_ENDIAN_LITTLE 0
  45. #define DMA4_CSDP_SRC_ENDIAN_LOCK_LOCK BIT20
  46. #define DMA4_CSDP_SRC_ENDIAN_LOCK_ADAPT 0
  47. #define DMA4_CSDP_SRC_ENDIAN_BIG BIT21
  48. #define DMA4_CSDP_SRC_ENDIAN_LITTLE 0
  49. // Channel Control
  50. #define DMA4_CCR_SYNCHRO_CONTROL_MASK 0x1f
  51. #define DMA4_CCR_FS_ELEMENT (0 | 0)
  52. #define DMA4_CCR_FS_BLOCK (0 | BIT18)
  53. #define DMA4_CCR_FS_FRAME (BIT5 | 0)
  54. #define DMA4_CCR_FS_PACKET (BIT5 | BIT18)
  55. #define DMA4_CCR_READ_PRIORITY_HIGH BIT6
  56. #define DMA4_CCR_READ_PRIORITY_LOW 0
  57. #define DMA4_CCR_ENABLE BIT7
  58. #define DMA4_CCR_DISABLE 0
  59. #define DMA4_CCR_SUSPEND_SENSITIVE_IGNORE BIT8
  60. #define DMA4_CCR_SUSPEND_SENSITIVE 0
  61. #define DMA4_CCR_RD_ACTIVE BIT9
  62. #define DMA4_CCR_WR_ACTIVE BIT10
  63. #define DMA4_CCR_SRC_AMODE (0 | 0)
  64. #define DMA4_CCR_SRC_AMODE_POST_INC (0 | BIT12)
  65. #define DMA4_CCR_SRC_AMODE_SINGLE_INDEX (BIT13 | 0)
  66. #define DMA4_CCR_SRC_AMODE_DOUBLE_INDEX (BIT13 | BIT12)
  67. #define DMA4_CCR_DST_AMODE (0 | 0)
  68. #define DMA4_CCR_DST_AMODE_POST_INC (0 | BIT14)
  69. #define DMA4_CCR_DST_AMODE_SINGLE_INDEX (BIT15 | 0)
  70. #define DMA4_CCR_DST_AMODE_DOUBLE_INDEX (BIT15 | BIT14)
  71. #define DMA4_CCR_CONST_FILL_ENABLE BIT16
  72. #define DMA4_CCR_TRANSPARENT_COPY_ENABLE BIT17
  73. #define DMA4_CCR_SEL_SRC_DEST_SYNC_SOURCE BIT24
  74. #define DMA4_CSR_DROP BIT1
  75. #define DMA4_CSR_HALF BIT2
  76. #define DMA4_CSR_FRAME BIT3
  77. #define DMA4_CSR_LAST BIT4
  78. #define DMA4_CSR_BLOCK BIT5
  79. #define DMA4_CSR_SYNC BIT6
  80. #define DMA4_CSR_PKT BIT7
  81. #define DMA4_CSR_TRANS_ERR BIT8
  82. #define DMA4_CSR_SECURE_ERR BIT9
  83. #define DMA4_CSR_SUPERVISOR_ERR BIT10
  84. #define DMA4_CSR_MISALIGNED_ADRS_ERR BIT11
  85. #define DMA4_CSR_DRAIN_END BIT12
  86. #define DMA4_CSR_RESET 0x1FE
  87. #define DMA4_CSR_ERR (DMA4_CSR_TRANS_ERR | DMA4_CSR_SECURE_ERR | DMA4_CSR_SUPERVISOR_ERR | DMA4_CSR_MISALIGNED_ADRS_ERR)
  88. // same mapping as CSR except for SYNC. Enable all since we are polling
  89. #define DMA4_CICR_ENABLE_ALL 0x1FBE
  90. #endif