SmmProfileInternal.h 3.7 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167
  1. /** @file
  2. SMM profile internal header file.
  3. Copyright (c) 2012 - 2018, Intel Corporation. All rights reserved.<BR>
  4. Copyright (c) 2020, AMD Incorporated. All rights reserved.<BR>
  5. SPDX-License-Identifier: BSD-2-Clause-Patent
  6. **/
  7. #ifndef _SMM_PROFILE_INTERNAL_H_
  8. #define _SMM_PROFILE_INTERNAL_H_
  9. #include <Protocol/SmmReadyToLock.h>
  10. #include <Library/UefiRuntimeServicesTableLib.h>
  11. #include <Library/DxeServicesTableLib.h>
  12. #include <Library/CpuLib.h>
  13. #include <Library/UefiCpuLib.h>
  14. #include <IndustryStandard/Acpi.h>
  15. #include "SmmProfileArch.h"
  16. //
  17. // Configure the SMM_PROFILE DTS region size
  18. //
  19. #define SMM_PROFILE_DTS_SIZE (4 * 1024 * 1024) // 4M
  20. #define MAX_PF_PAGE_COUNT 0x2
  21. #define PEBS_RECORD_NUMBER 0x2
  22. #define MAX_PF_ENTRY_COUNT 10
  23. //
  24. // This MACRO just enable unit test for the profile
  25. // Please disable it.
  26. //
  27. #define IA32_PF_EC_ID (1u << 4)
  28. #define SMM_PROFILE_NAME L"SmmProfileData"
  29. //
  30. // CPU generic definition
  31. //
  32. #define CPUID1_EDX_XD_SUPPORT 0x100000
  33. #define MSR_EFER 0xc0000080
  34. #define MSR_EFER_XD 0x800
  35. #define CPUID1_EDX_BTS_AVAILABLE 0x200000
  36. #define DR6_SINGLE_STEP 0x4000
  37. #define RFLAG_TF 0x100
  38. #define MSR_DEBUG_CTL 0x1D9
  39. #define MSR_DEBUG_CTL_LBR 0x1
  40. #define MSR_DEBUG_CTL_TR 0x40
  41. #define MSR_DEBUG_CTL_BTS 0x80
  42. #define MSR_DEBUG_CTL_BTINT 0x100
  43. #define MSR_DS_AREA 0x600
  44. #define HEAP_GUARD_NONSTOP_MODE \
  45. ((PcdGet8 (PcdHeapGuardPropertyMask) & (BIT6|BIT3|BIT2)) > BIT6)
  46. #define NULL_DETECTION_NONSTOP_MODE \
  47. ((PcdGet8 (PcdNullPointerDetectionPropertyMask) & (BIT6|BIT1)) > BIT6)
  48. typedef struct {
  49. EFI_PHYSICAL_ADDRESS Base;
  50. EFI_PHYSICAL_ADDRESS Top;
  51. } MEMORY_RANGE;
  52. typedef struct {
  53. MEMORY_RANGE Range;
  54. BOOLEAN Present;
  55. BOOLEAN Nx;
  56. } MEMORY_PROTECTION_RANGE;
  57. typedef struct {
  58. UINT64 HeaderSize;
  59. UINT64 MaxDataEntries;
  60. UINT64 MaxDataSize;
  61. UINT64 CurDataEntries;
  62. UINT64 CurDataSize;
  63. UINT64 TsegStart;
  64. UINT64 TsegSize;
  65. UINT64 NumSmis;
  66. UINT64 NumCpus;
  67. } SMM_PROFILE_HEADER;
  68. typedef struct {
  69. UINT64 SmiNum;
  70. UINT64 CpuNum;
  71. UINT64 ApicId;
  72. UINT64 ErrorCode;
  73. UINT64 Instruction;
  74. UINT64 Address;
  75. UINT64 SmiCmd;
  76. } SMM_PROFILE_ENTRY;
  77. extern SMM_S3_RESUME_STATE *mSmmS3ResumeState;
  78. extern UINTN gSmiExceptionHandlers[];
  79. extern BOOLEAN mXdSupported;
  80. X86_ASSEMBLY_PATCH_LABEL gPatchXdSupported;
  81. X86_ASSEMBLY_PATCH_LABEL gPatchMsrIa32MiscEnableSupported;
  82. extern UINTN *mPFEntryCount;
  83. extern UINT64 (*mLastPFEntryValue)[MAX_PF_ENTRY_COUNT];
  84. extern UINT64 *(*mLastPFEntryPointer)[MAX_PF_ENTRY_COUNT];
  85. //
  86. // Internal functions
  87. //
  88. /**
  89. Update IDT table to replace page fault handler and INT 1 handler.
  90. **/
  91. VOID
  92. InitIdtr (
  93. VOID
  94. );
  95. /**
  96. Check if the memory address will be mapped by 4KB-page.
  97. @param Address The address of Memory.
  98. **/
  99. BOOLEAN
  100. IsAddressSplit (
  101. IN EFI_PHYSICAL_ADDRESS Address
  102. );
  103. /**
  104. Check if the memory address will be mapped by 4KB-page.
  105. @param Address The address of Memory.
  106. @param Nx The flag indicates if the memory is execute-disable.
  107. **/
  108. BOOLEAN
  109. IsAddressValid (
  110. IN EFI_PHYSICAL_ADDRESS Address,
  111. IN BOOLEAN *Nx
  112. );
  113. /**
  114. Page Fault handler for SMM use.
  115. **/
  116. VOID
  117. SmiDefaultPFHandler (
  118. VOID
  119. );
  120. /**
  121. Clear TF in FLAGS.
  122. @param SystemContext A pointer to the processor context when
  123. the interrupt occurred on the processor.
  124. **/
  125. VOID
  126. ClearTrapFlag (
  127. IN OUT EFI_SYSTEM_CONTEXT SystemContext
  128. );
  129. #endif // _SMM_PROFILE_H_