MadtParser.c 16 KB

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  1. /** @file
  2. MADT table parser
  3. Copyright (c) 2016 - 2020, ARM Limited. All rights reserved.
  4. SPDX-License-Identifier: BSD-2-Clause-Patent
  5. @par Reference(s):
  6. - ACPI 6.3 Specification - January 2019
  7. - Arm Generic Interrupt Controller Architecture Specification,
  8. GIC architecture version 3 and version 4, issue E
  9. - Arm Server Base System Architecture 5.0
  10. **/
  11. #include <IndustryStandard/Acpi.h>
  12. #include <Library/UefiLib.h>
  13. #include "AcpiParser.h"
  14. #include "AcpiTableParser.h"
  15. #include "AcpiViewConfig.h"
  16. #include "MadtParser.h"
  17. // Local Variables
  18. STATIC CONST UINT8 *MadtInterruptControllerType;
  19. STATIC CONST UINT8 *MadtInterruptControllerLength;
  20. STATIC ACPI_DESCRIPTION_HEADER_INFO AcpiHdrInfo;
  21. /**
  22. This function validates the System Vector Base in the GICD.
  23. @param [in] Ptr Pointer to the start of the field data.
  24. @param [in] Context Pointer to context specific information e.g. this
  25. could be a pointer to the ACPI table header.
  26. **/
  27. STATIC
  28. VOID
  29. EFIAPI
  30. ValidateGICDSystemVectorBase (
  31. IN UINT8 *Ptr,
  32. IN VOID *Context
  33. )
  34. {
  35. if (*(UINT32 *)Ptr != 0) {
  36. IncrementErrorCount ();
  37. Print (
  38. L"\nERROR: System Vector Base must be zero."
  39. );
  40. }
  41. }
  42. /**
  43. This function validates the SPE Overflow Interrupt in the GICC.
  44. @param [in] Ptr Pointer to the start of the field data.
  45. @param [in] Context Pointer to context specific information e.g. this
  46. could be a pointer to the ACPI table header.
  47. **/
  48. STATIC
  49. VOID
  50. EFIAPI
  51. ValidateSpeOverflowInterrupt (
  52. IN UINT8 *Ptr,
  53. IN VOID *Context
  54. )
  55. {
  56. UINT16 SpeOverflowInterrupt;
  57. SpeOverflowInterrupt = *(UINT16 *)Ptr;
  58. // SPE not supported by this processor
  59. if (SpeOverflowInterrupt == 0) {
  60. return;
  61. }
  62. if ((SpeOverflowInterrupt < ARM_PPI_ID_MIN) ||
  63. ((SpeOverflowInterrupt > ARM_PPI_ID_MAX) &&
  64. (SpeOverflowInterrupt < ARM_PPI_ID_EXTENDED_MIN)) ||
  65. (SpeOverflowInterrupt > ARM_PPI_ID_EXTENDED_MAX))
  66. {
  67. IncrementErrorCount ();
  68. Print (
  69. L"\nERROR: SPE Overflow Interrupt ID of %d is not in the allowed PPI ID "
  70. L"ranges of %d-%d or %d-%d (for GICv3.1 or later).",
  71. SpeOverflowInterrupt,
  72. ARM_PPI_ID_MIN,
  73. ARM_PPI_ID_MAX,
  74. ARM_PPI_ID_EXTENDED_MIN,
  75. ARM_PPI_ID_EXTENDED_MAX
  76. );
  77. } else if (SpeOverflowInterrupt != ARM_PPI_ID_PMBIRQ) {
  78. IncrementWarningCount ();
  79. Print (
  80. L"\nWARNING: SPE Overflow Interrupt ID of %d is not compliant with SBSA "
  81. L"Level 3 PPI ID assignment: %d.",
  82. SpeOverflowInterrupt,
  83. ARM_PPI_ID_PMBIRQ
  84. );
  85. }
  86. }
  87. /**
  88. An ACPI_PARSER array describing the GICC Interrupt Controller Structure.
  89. **/
  90. STATIC CONST ACPI_PARSER GicCParser[] = {
  91. { L"Type", 1, 0, L"0x%x", NULL, NULL, NULL, NULL },
  92. { L"Length", 1, 1, L"%d", NULL, NULL, NULL, NULL },
  93. { L"Reserved", 2, 2, L"0x%x", NULL, NULL, NULL, NULL },
  94. { L"CPU Interface Number", 4, 4, L"0x%x", NULL, NULL, NULL, NULL },
  95. { L"ACPI Processor UID", 4, 8, L"0x%x", NULL, NULL, NULL, NULL },
  96. { L"Flags", 4, 12, L"0x%x", NULL, NULL, NULL, NULL },
  97. { L"Parking Protocol Version", 4, 16, L"0x%x", NULL, NULL, NULL, NULL },
  98. { L"Performance Interrupt GSIV", 4, 20, L"0x%x", NULL, NULL, NULL, NULL },
  99. { L"Parked Address", 8, 24, L"0x%lx", NULL, NULL, NULL, NULL },
  100. { L"Physical Base Address", 8, 32, L"0x%lx", NULL, NULL, NULL, NULL },
  101. { L"GICV", 8, 40, L"0x%lx", NULL, NULL, NULL, NULL },
  102. { L"GICH", 8, 48, L"0x%lx", NULL, NULL, NULL, NULL },
  103. { L"VGIC Maintenance interrupt", 4, 56, L"0x%x", NULL, NULL, NULL, NULL },
  104. { L"GICR Base Address", 8, 60, L"0x%lx", NULL, NULL, NULL, NULL },
  105. { L"MPIDR", 8, 68, L"0x%lx", NULL, NULL, NULL, NULL },
  106. { L"Processor Power Efficiency Class", 1, 76, L"0x%x", NULL, NULL, NULL,
  107. NULL },
  108. { L"Reserved", 1, 77, L"0x%x", NULL, NULL, NULL, NULL },
  109. { L"SPE overflow Interrupt", 2, 78, L"0x%x", NULL, NULL,
  110. ValidateSpeOverflowInterrupt, NULL }
  111. };
  112. /**
  113. An ACPI_PARSER array describing the GICD Interrupt Controller Structure.
  114. **/
  115. STATIC CONST ACPI_PARSER GicDParser[] = {
  116. { L"Type", 1, 0, L"0x%x", NULL, NULL, NULL, NULL },
  117. { L"Length", 1, 1, L"%d", NULL, NULL, NULL, NULL },
  118. { L"Reserved", 2, 2, L"0x%x", NULL, NULL, NULL, NULL },
  119. { L"GIC ID", 4, 4, L"0x%x", NULL, NULL, NULL, NULL },
  120. { L"Physical Base Address", 8, 8, L"0x%lx", NULL, NULL, NULL, NULL },
  121. { L"System Vector Base", 4, 16, L"0x%x", NULL, NULL,
  122. ValidateGICDSystemVectorBase, NULL },
  123. { L"GIC Version", 1, 20, L"%d", NULL, NULL, NULL, NULL },
  124. { L"Reserved", 3, 21, L"%x %x %x", Dump3Chars, NULL, NULL, NULL }
  125. };
  126. /**
  127. An ACPI_PARSER array describing the MSI Frame Interrupt Controller Structure.
  128. **/
  129. STATIC CONST ACPI_PARSER GicMSIFrameParser[] = {
  130. { L"Type", 1, 0, L"0x%x", NULL, NULL, NULL, NULL },
  131. { L"Length", 1, 1, L"%d", NULL, NULL, NULL, NULL },
  132. { L"Reserved", 2, 2, L"0x%x", NULL, NULL, NULL, NULL },
  133. { L"MSI Frame ID", 4, 4, L"0x%x", NULL, NULL, NULL, NULL },
  134. { L"Physical Base Address", 8, 8, L"0x%lx", NULL, NULL, NULL, NULL },
  135. { L"Flags", 4, 16, L"0x%x", NULL, NULL, NULL, NULL },
  136. { L"SPI Count", 2, 20, L"%d", NULL, NULL, NULL, NULL },
  137. { L"SPI Base", 2, 22, L"0x%x", NULL, NULL, NULL, NULL }
  138. };
  139. /**
  140. An ACPI_PARSER array describing the GICR Interrupt Controller Structure.
  141. **/
  142. STATIC CONST ACPI_PARSER GicRParser[] = {
  143. { L"Type", 1, 0, L"0x%x", NULL, NULL, NULL, NULL },
  144. { L"Length", 1, 1, L"%d", NULL, NULL, NULL, NULL },
  145. { L"Reserved", 2, 2, L"0x%x", NULL, NULL, NULL, NULL },
  146. { L"Discovery Range Base Address", 8, 4, L"0x%lx", NULL, NULL, NULL,
  147. NULL },
  148. { L"Discovery Range Length", 4, 12, L"0x%x", NULL, NULL, NULL, NULL }
  149. };
  150. /**
  151. An ACPI_PARSER array describing the GIC ITS Interrupt Controller Structure.
  152. **/
  153. STATIC CONST ACPI_PARSER GicITSParser[] = {
  154. { L"Type", 1, 0, L"0x%x", NULL, NULL, NULL, NULL },
  155. { L"Length", 1, 1, L"%d", NULL, NULL, NULL, NULL },
  156. { L"Reserved", 2, 2, L"0x%x", NULL, NULL, NULL, NULL },
  157. { L"GIC ITS ID", 4, 4, L"0x%x", NULL, NULL, NULL, NULL },
  158. { L"Physical Base Address", 8, 8, L"0x%lx", NULL, NULL, NULL, NULL },
  159. { L"Reserved", 4, 16, L"0x%x", NULL, NULL, NULL, NULL }
  160. };
  161. /**
  162. An ACPI_PARSER array describing the IO APIC Structure.
  163. **/
  164. STATIC CONST ACPI_PARSER IoApic[] = {
  165. { L"Type", 1, 0, L"0x%x", NULL, NULL, NULL, NULL },
  166. { L"Length", 1, 1, L"%d", NULL, NULL, NULL, NULL },
  167. { L"I/O APIC ID", 1, 2, L"0x%x", NULL, NULL, NULL, NULL },
  168. { L"Reserved", 1, 3, L"0x%x", NULL, NULL, NULL, NULL },
  169. { L"I/O APIC Address", 4, 4, L"0x%x", NULL, NULL, NULL, NULL },
  170. { L"Global System Interrupt Base", 4, 8, L"0x%x", NULL, NULL, NULL, NULL }
  171. };
  172. /**
  173. An ACPI_PARSER array describing the Interrupt Source Override Structure.
  174. **/
  175. STATIC CONST ACPI_PARSER InterruptSourceOverride[] = {
  176. { L"Type", 1, 0, L"0x%x", NULL, NULL, NULL, NULL },
  177. { L"Length", 1, 1, L"%d", NULL, NULL, NULL, NULL },
  178. { L"Bus", 1, 2, L"0x%x", NULL, NULL, NULL, NULL },
  179. { L"Source", 1, 3, L"0x%x", NULL, NULL, NULL, NULL },
  180. { L"Global System Interrupt", 4, 4, L"0x%x", NULL, NULL, NULL, NULL },
  181. { L"Flags", 2, 8, L"0x%x", NULL, NULL, NULL, NULL }
  182. };
  183. /**
  184. An ACPI_PARSER array describing the Processor Local x2APIC Structure.
  185. **/
  186. STATIC CONST ACPI_PARSER ProcessorLocalX2Apic[] = {
  187. { L"Type", 1, 0, L"0x%x", NULL, NULL, NULL, NULL },
  188. { L"Length", 1, 1, L"%d", NULL, NULL, NULL, NULL },
  189. { L"Reserved", 2, 2, L"0x%x", NULL, NULL, NULL, NULL },
  190. { L"X2APIC ID", 4, 4, L"0x%x", NULL, NULL, NULL, NULL },
  191. { L"Flags", 4, 8, L"0x%x", NULL, NULL, NULL, NULL },
  192. { L"ACPI Processor UID", 4, 12, L"0x%x", NULL, NULL, NULL, NULL }
  193. };
  194. /**
  195. An ACPI_PARSER array describing the Local x2APIC NMI Structure.
  196. **/
  197. STATIC CONST ACPI_PARSER LocalX2ApicNmi[] = {
  198. { L"Type", 1, 0, L"0x%x", NULL, NULL, NULL, NULL },
  199. { L"Length", 1, 1, L"%d", NULL, NULL, NULL, NULL },
  200. { L"Flags", 2, 2, L"0x%x", NULL, NULL, NULL, NULL },
  201. { L"ACPI Processor UID", 4, 4, L"0x%x", NULL, NULL, NULL, NULL },
  202. { L"Local x2APIC LINT#", 1, 8, L"0x%x", NULL, NULL, NULL, NULL },
  203. { L"Reserved", 3, 9, L"0x%x%x%x", Dump3Chars, NULL, NULL, NULL }
  204. };
  205. /**
  206. An ACPI_PARSER array describing the ACPI MADT Table.
  207. **/
  208. STATIC CONST ACPI_PARSER MadtParser[] = {
  209. PARSE_ACPI_HEADER (&AcpiHdrInfo),
  210. { L"Local Interrupt Controller Address",4, 36, L"0x%x", NULL, NULL, NULL,
  211. NULL },
  212. { L"Flags", 4, 40, L"0x%x", NULL, NULL, NULL,NULL}
  213. };
  214. /**
  215. An ACPI_PARSER array describing the MADT Interrupt Controller Structure Header Structure.
  216. **/
  217. STATIC CONST ACPI_PARSER MadtInterruptControllerHeaderParser[] = {
  218. { NULL, 1, 0, NULL, NULL, (VOID **)&MadtInterruptControllerType, NULL, NULL },
  219. { L"Length", 1, 1, NULL, NULL, (VOID **)&MadtInterruptControllerLength, NULL,
  220. NULL },
  221. { L"Reserved", 2, 2, NULL, NULL, NULL, NULL, NULL }
  222. };
  223. /**
  224. This function parses the ACPI MADT table.
  225. When trace is enabled this function parses the MADT table and
  226. traces the ACPI table fields.
  227. This function currently parses the following Interrupt Controller
  228. Structures:
  229. - GICC
  230. - GICD
  231. - GIC MSI Frame
  232. - GICR
  233. - GIC ITS
  234. This function also performs validation of the ACPI table fields.
  235. @param [in] Trace If TRUE, trace the ACPI fields.
  236. @param [in] Ptr Pointer to the start of the buffer.
  237. @param [in] AcpiTableLength Length of the ACPI table.
  238. @param [in] AcpiTableRevision Revision of the ACPI table.
  239. **/
  240. VOID
  241. EFIAPI
  242. ParseAcpiMadt (
  243. IN BOOLEAN Trace,
  244. IN UINT8 *Ptr,
  245. IN UINT32 AcpiTableLength,
  246. IN UINT8 AcpiTableRevision
  247. )
  248. {
  249. UINT32 Offset;
  250. UINT8 *InterruptContollerPtr;
  251. UINT32 GICDCount;
  252. GICDCount = 0;
  253. if (!Trace) {
  254. return;
  255. }
  256. Offset = ParseAcpi (
  257. TRUE,
  258. 0,
  259. "MADT",
  260. Ptr,
  261. AcpiTableLength,
  262. PARSER_PARAMS (MadtParser)
  263. );
  264. InterruptContollerPtr = Ptr + Offset;
  265. while (Offset < AcpiTableLength) {
  266. // Parse Interrupt Controller Structure to obtain Length.
  267. ParseAcpi (
  268. FALSE,
  269. 0,
  270. NULL,
  271. InterruptContollerPtr,
  272. AcpiTableLength - Offset,
  273. PARSER_PARAMS (MadtInterruptControllerHeaderParser)
  274. );
  275. // Check if the values used to control the parsing logic have been
  276. // successfully read.
  277. if ((MadtInterruptControllerType == NULL) ||
  278. (MadtInterruptControllerLength == NULL))
  279. {
  280. IncrementErrorCount ();
  281. Print (
  282. L"ERROR: Insufficient remaining table buffer length to read the " \
  283. L"Interrupt Controller Structure header. Length = %d.\n",
  284. AcpiTableLength - Offset
  285. );
  286. return;
  287. }
  288. // Validate Interrupt Controller Structure length
  289. if ((*MadtInterruptControllerLength == 0) ||
  290. ((Offset + (*MadtInterruptControllerLength)) > AcpiTableLength))
  291. {
  292. IncrementErrorCount ();
  293. Print (
  294. L"ERROR: Invalid Interrupt Controller Structure length. " \
  295. L"Length = %d. Offset = %d. AcpiTableLength = %d.\n",
  296. *MadtInterruptControllerLength,
  297. Offset,
  298. AcpiTableLength
  299. );
  300. return;
  301. }
  302. switch (*MadtInterruptControllerType) {
  303. case EFI_ACPI_6_3_GIC:
  304. {
  305. ParseAcpi (
  306. TRUE,
  307. 2,
  308. "GICC",
  309. InterruptContollerPtr,
  310. *MadtInterruptControllerLength,
  311. PARSER_PARAMS (GicCParser)
  312. );
  313. break;
  314. }
  315. case EFI_ACPI_6_3_GICD:
  316. {
  317. if (++GICDCount > 1) {
  318. IncrementErrorCount ();
  319. Print (
  320. L"ERROR: Only one GICD must be present,"
  321. L" GICDCount = %d\n",
  322. GICDCount
  323. );
  324. }
  325. ParseAcpi (
  326. TRUE,
  327. 2,
  328. "GICD",
  329. InterruptContollerPtr,
  330. *MadtInterruptControllerLength,
  331. PARSER_PARAMS (GicDParser)
  332. );
  333. break;
  334. }
  335. case EFI_ACPI_6_3_GIC_MSI_FRAME:
  336. {
  337. ParseAcpi (
  338. TRUE,
  339. 2,
  340. "GIC MSI Frame",
  341. InterruptContollerPtr,
  342. *MadtInterruptControllerLength,
  343. PARSER_PARAMS (GicMSIFrameParser)
  344. );
  345. break;
  346. }
  347. case EFI_ACPI_6_3_GICR:
  348. {
  349. ParseAcpi (
  350. TRUE,
  351. 2,
  352. "GICR",
  353. InterruptContollerPtr,
  354. *MadtInterruptControllerLength,
  355. PARSER_PARAMS (GicRParser)
  356. );
  357. break;
  358. }
  359. case EFI_ACPI_6_3_GIC_ITS:
  360. {
  361. ParseAcpi (
  362. TRUE,
  363. 2,
  364. "GIC ITS",
  365. InterruptContollerPtr,
  366. *MadtInterruptControllerLength,
  367. PARSER_PARAMS (GicITSParser)
  368. );
  369. break;
  370. }
  371. case EFI_ACPI_6_3_IO_APIC:
  372. {
  373. ParseAcpi (
  374. TRUE,
  375. 2,
  376. "IO APIC",
  377. InterruptContollerPtr,
  378. *MadtInterruptControllerLength,
  379. PARSER_PARAMS (IoApic)
  380. );
  381. break;
  382. }
  383. case EFI_ACPI_6_3_INTERRUPT_SOURCE_OVERRIDE:
  384. {
  385. ParseAcpi (
  386. TRUE,
  387. 2,
  388. "INTERRUPT SOURCE OVERRIDE",
  389. InterruptContollerPtr,
  390. *MadtInterruptControllerLength,
  391. PARSER_PARAMS (InterruptSourceOverride)
  392. );
  393. break;
  394. }
  395. case EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC:
  396. {
  397. ParseAcpi (
  398. TRUE,
  399. 2,
  400. "PROCESSOR LOCAL X2APIC",
  401. InterruptContollerPtr,
  402. *MadtInterruptControllerLength,
  403. PARSER_PARAMS (ProcessorLocalX2Apic)
  404. );
  405. break;
  406. }
  407. case EFI_ACPI_6_3_LOCAL_X2APIC_NMI:
  408. {
  409. ParseAcpi (
  410. TRUE,
  411. 2,
  412. "LOCAL x2APIC NMI",
  413. InterruptContollerPtr,
  414. *MadtInterruptControllerLength,
  415. PARSER_PARAMS (LocalX2ApicNmi)
  416. );
  417. break;
  418. }
  419. default:
  420. {
  421. IncrementErrorCount ();
  422. Print (
  423. L"ERROR: Unknown Interrupt Controller Structure,"
  424. L" Type = %d, Length = %d\n",
  425. *MadtInterruptControllerType,
  426. *MadtInterruptControllerLength
  427. );
  428. }
  429. } // switch
  430. InterruptContollerPtr += *MadtInterruptControllerLength;
  431. Offset += *MadtInterruptControllerLength;
  432. } // while
  433. }