ArmV7ArchTimerSupport.asm 3.5 KB

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  1. //------------------------------------------------------------------------------
  2. //
  3. // Copyright (c) 2011, ARM Limited. All rights reserved.
  4. //
  5. // This program and the accompanying materials
  6. // are licensed and made available under the terms and conditions of the BSD License
  7. // which accompanies this distribution. The full text of the license may be found at
  8. // http://opensource.org/licenses/bsd-license.php
  9. //
  10. // THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  11. // WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  12. //
  13. //------------------------------------------------------------------------------
  14. EXPORT ArmReadCntFrq
  15. EXPORT ArmWriteCntFrq
  16. EXPORT ArmReadCntPct
  17. EXPORT ArmReadCntkCtl
  18. EXPORT ArmWriteCntkCtl
  19. EXPORT ArmReadCntpTval
  20. EXPORT ArmWriteCntpTval
  21. EXPORT ArmReadCntpCtl
  22. EXPORT ArmWriteCntpCtl
  23. EXPORT ArmReadCntvTval
  24. EXPORT ArmWriteCntvTval
  25. EXPORT ArmReadCntvCtl
  26. EXPORT ArmWriteCntvCtl
  27. EXPORT ArmReadCntvCt
  28. EXPORT ArmReadCntpCval
  29. EXPORT ArmWriteCntpCval
  30. EXPORT ArmReadCntvCval
  31. EXPORT ArmWriteCntvCval
  32. EXPORT ArmReadCntvOff
  33. EXPORT ArmWriteCntvOff
  34. AREA ArmV7ArchTimerSupport, CODE, READONLY
  35. PRESERVE8
  36. ArmReadCntFrq
  37. mrc p15, 0, r0, c14, c0, 0 ; Read CNTFRQ
  38. bx lr
  39. ArmWriteCntFrq
  40. mcr p15, 0, r0, c14, c0, 0 ; Write to CNTFRQ
  41. bx lr
  42. ArmReadCntPct
  43. mrrc p15, 0, r0, r1, c14 ; Read CNTPT (Physical counter register)
  44. bx lr
  45. ArmReadCntkCtl
  46. mrc p15, 0, r0, c14, c1, 0 ; Read CNTK_CTL (Timer PL1 Control Register)
  47. bx lr
  48. ArmWriteCntkCtl
  49. mcr p15, 0, r0, c14, c1, 0 ; Write to CNTK_CTL (Timer PL1 Control Register)
  50. bx lr
  51. ArmReadCntpTval
  52. mrc p15, 0, r0, c14, c2, 0 ; Read CNTP_TVAL (PL1 physical timer value register)
  53. bx lr
  54. ArmWriteCntpTval
  55. mcr p15, 0, r0, c14, c2, 0 ; Write to CNTP_TVAL (PL1 physical timer value register)
  56. bx lr
  57. ArmReadCntpCtl
  58. mrc p15, 0, r0, c14, c2, 1 ; Read CNTP_CTL (PL1 Physical Timer Control Register)
  59. bx lr
  60. ArmWriteCntpCtl
  61. mcr p15, 0, r0, c14, c2, 1 ; Write to CNTP_CTL (PL1 Physical Timer Control Register)
  62. bx lr
  63. ArmReadCntvTval
  64. mrc p15, 0, r0, c14, c3, 0 ; Read CNTV_TVAL (Virtual Timer Value register)
  65. bx lr
  66. ArmWriteCntvTval
  67. mcr p15, 0, r0, c14, c3, 0 ; Write to CNTV_TVAL (Virtual Timer Value register)
  68. bx lr
  69. ArmReadCntvCtl
  70. mrc p15, 0, r0, c14, c3, 1 ; Read CNTV_CTL (Virtual Timer Control Register)
  71. bx lr
  72. ArmWriteCntvCtl
  73. mcr p15, 0, r0, c14, c3, 1 ; Write to CNTV_CTL (Virtual Timer Control Register)
  74. bx lr
  75. ArmReadCntvCt
  76. mrrc p15, 1, r0, r1, c14 ; Read CNTVCT (Virtual Count Register)
  77. bx lr
  78. ArmReadCntpCval
  79. mrrc p15, 2, r0, r1, c14 ; Read CNTP_CTVAL (Physical Timer Compare Value Register)
  80. bx lr
  81. ArmWriteCntpCval
  82. mcrr p15, 2, r0, r1, c14 ; Write to CNTP_CTVAL (Physical Timer Compare Value Register)
  83. bx lr
  84. ArmReadCntvCval
  85. mrrc p15, 3, r0, r1, c14 ; Read CNTV_CTVAL (Virtual Timer Compare Value Register)
  86. bx lr
  87. ArmWriteCntvCval
  88. mcrr p15, 3, r0, r1, c14 ; write to CNTV_CTVAL (Virtual Timer Compare Value Register)
  89. bx lr
  90. ArmReadCntvOff
  91. mrrc p15, 4, r0, r1, c14 ; Read CNTVOFF (virtual Offset register)
  92. bx lr
  93. ArmWriteCntvOff
  94. mcrr p15, 4, r0, r1, c14 ; Write to CNTVOFF (Virtual Offset register)
  95. bx lr
  96. END