PeCoffLoaderEx.c 6.7 KB

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  1. /** @file
  2. IA32 and X64 Specific relocation fixups
  3. Copyright (c) 2004 - 2018, Intel Corporation. All rights reserved.<BR>
  4. Portions Copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
  5. SPDX-License-Identifier: BSD-2-Clause-Patent
  6. --*/
  7. #include <Common/UefiBaseTypes.h>
  8. #include <IndustryStandard/PeImage.h>
  9. #include "PeCoffLib.h"
  10. #include "CommonLib.h"
  11. #include "EfiUtilityMsgs.h"
  12. #define EXT_IMM64(Value, Address, Size, InstPos, ValPos) \
  13. Value |= (((UINT64)((*(Address) >> InstPos) & (((UINT64)1 << Size) - 1))) << ValPos)
  14. #define INS_IMM64(Value, Address, Size, InstPos, ValPos) \
  15. *(UINT32*)Address = (*(UINT32*)Address & ~(((1 << Size) - 1) << InstPos)) | \
  16. ((UINT32)((((UINT64)Value >> ValPos) & (((UINT64)1 << Size) - 1))) << InstPos)
  17. #define IMM64_IMM7B_INST_WORD_X 3
  18. #define IMM64_IMM7B_SIZE_X 7
  19. #define IMM64_IMM7B_INST_WORD_POS_X 4
  20. #define IMM64_IMM7B_VAL_POS_X 0
  21. #define IMM64_IMM9D_INST_WORD_X 3
  22. #define IMM64_IMM9D_SIZE_X 9
  23. #define IMM64_IMM9D_INST_WORD_POS_X 18
  24. #define IMM64_IMM9D_VAL_POS_X 7
  25. #define IMM64_IMM5C_INST_WORD_X 3
  26. #define IMM64_IMM5C_SIZE_X 5
  27. #define IMM64_IMM5C_INST_WORD_POS_X 13
  28. #define IMM64_IMM5C_VAL_POS_X 16
  29. #define IMM64_IC_INST_WORD_X 3
  30. #define IMM64_IC_SIZE_X 1
  31. #define IMM64_IC_INST_WORD_POS_X 12
  32. #define IMM64_IC_VAL_POS_X 21
  33. #define IMM64_IMM41a_INST_WORD_X 1
  34. #define IMM64_IMM41a_SIZE_X 10
  35. #define IMM64_IMM41a_INST_WORD_POS_X 14
  36. #define IMM64_IMM41a_VAL_POS_X 22
  37. #define IMM64_IMM41b_INST_WORD_X 1
  38. #define IMM64_IMM41b_SIZE_X 8
  39. #define IMM64_IMM41b_INST_WORD_POS_X 24
  40. #define IMM64_IMM41b_VAL_POS_X 32
  41. #define IMM64_IMM41c_INST_WORD_X 2
  42. #define IMM64_IMM41c_SIZE_X 23
  43. #define IMM64_IMM41c_INST_WORD_POS_X 0
  44. #define IMM64_IMM41c_VAL_POS_X 40
  45. #define IMM64_SIGN_INST_WORD_X 3
  46. #define IMM64_SIGN_SIZE_X 1
  47. #define IMM64_SIGN_INST_WORD_POS_X 27
  48. #define IMM64_SIGN_VAL_POS_X 63
  49. RETURN_STATUS
  50. PeCoffLoaderRelocateIa32Image (
  51. IN UINT16 *Reloc,
  52. IN OUT CHAR8 *Fixup,
  53. IN OUT CHAR8 **FixupData,
  54. IN UINT64 Adjust
  55. )
  56. /*++
  57. Routine Description:
  58. Performs an IA-32 specific relocation fixup
  59. Arguments:
  60. Reloc - Pointer to the relocation record
  61. Fixup - Pointer to the address to fix up
  62. FixupData - Pointer to a buffer to log the fixups
  63. Adjust - The offset to adjust the fixup
  64. Returns:
  65. EFI_UNSUPPORTED - Unsupported now
  66. --*/
  67. {
  68. return RETURN_UNSUPPORTED;
  69. }
  70. /**
  71. Pass in a pointer to an ARM MOVT or MOVW immediate instruction and
  72. return the immediate data encoded in the instruction
  73. @param Instruction Pointer to ARM MOVT or MOVW immediate instruction
  74. @return Immediate address encoded in the instruction
  75. **/
  76. UINT16
  77. ThumbMovtImmediateAddress (
  78. IN UINT16 *Instruction
  79. )
  80. {
  81. UINT32 Movt;
  82. UINT16 Address;
  83. // Thumb2 is two 16-bit instructions working together. Not a single 32-bit instruction
  84. // Example MOVT R0, #0 is 0x0000f2c0 or 0xf2c0 0x0000
  85. Movt = (*Instruction << 16) | (*(Instruction + 1));
  86. // imm16 = imm4:i:imm3:imm8
  87. // imm4 -> Bit19:Bit16
  88. // i -> Bit26
  89. // imm3 -> Bit14:Bit12
  90. // imm8 -> Bit7:Bit0
  91. Address = (UINT16)(Movt & 0x000000ff); // imm8
  92. Address |= (UINT16)((Movt >> 4) & 0x0000f700); // imm4 imm3
  93. Address |= (((Movt & BIT26) != 0) ? BIT11 : 0); // i
  94. return Address;
  95. }
  96. /**
  97. Update an ARM MOVT or MOVW immediate instruction immediate data.
  98. @param Instruction Pointer to ARM MOVT or MOVW immediate instruction
  99. @param Address New address to patch into the instruction
  100. **/
  101. VOID
  102. ThumbMovtImmediatePatch (
  103. IN OUT UINT16 *Instruction,
  104. IN UINT16 Address
  105. )
  106. {
  107. UINT16 Patch;
  108. // First 16-bit chunk of instruction
  109. Patch = ((Address >> 12) & 0x000f); // imm4
  110. Patch |= (((Address & BIT11) != 0) ? BIT10 : 0); // i
  111. *Instruction = (*Instruction & ~0x040f) | Patch;
  112. // Second 16-bit chunk of instruction
  113. Patch = Address & 0x000000ff; // imm8
  114. Patch |= ((Address << 4) & 0x00007000); // imm3
  115. Instruction++;
  116. *Instruction = (*Instruction & ~0x70ff) | Patch;
  117. }
  118. /**
  119. Pass in a pointer to an ARM MOVW/MOVT instruction pair and
  120. return the immediate data encoded in the two` instruction
  121. @param Instructions Pointer to ARM MOVW/MOVT instruction pair
  122. @return Immediate address encoded in the instructions
  123. **/
  124. UINT32
  125. EFIAPI
  126. ThumbMovwMovtImmediateAddress (
  127. IN UINT16 *Instructions
  128. )
  129. {
  130. UINT16 *Word;
  131. UINT16 *Top;
  132. Word = Instructions; // MOVW
  133. Top = Word + 2; // MOVT
  134. return (ThumbMovtImmediateAddress (Top) << 16) + ThumbMovtImmediateAddress (Word);
  135. }
  136. /**
  137. Update an ARM MOVW/MOVT immediate instruction instruction pair.
  138. @param Instructions Pointer to ARM MOVW/MOVT instruction pair
  139. @param Address New address to patch into the instructions
  140. **/
  141. VOID
  142. EFIAPI
  143. ThumbMovwMovtImmediatePatch (
  144. IN OUT UINT16 *Instructions,
  145. IN UINT32 Address
  146. )
  147. {
  148. UINT16 *Word;
  149. UINT16 *Top;
  150. Word = (UINT16 *)Instructions; // MOVW
  151. Top = Word + 2; // MOVT
  152. ThumbMovtImmediatePatch (Word, (UINT16)(Address & 0xffff));
  153. ThumbMovtImmediatePatch (Top, (UINT16)(Address >> 16));
  154. }
  155. /**
  156. Performs an ARM-based specific relocation fixup and is a no-op on other
  157. instruction sets.
  158. @param Reloc Pointer to the relocation record.
  159. @param Fixup Pointer to the address to fix up.
  160. @param FixupData Pointer to a buffer to log the fixups.
  161. @param Adjust The offset to adjust the fixup.
  162. @return Status code.
  163. **/
  164. RETURN_STATUS
  165. PeCoffLoaderRelocateArmImage (
  166. IN UINT16 **Reloc,
  167. IN OUT CHAR8 *Fixup,
  168. IN OUT CHAR8 **FixupData,
  169. IN UINT64 Adjust
  170. )
  171. {
  172. UINT16 *Fixup16;
  173. UINT32 FixupVal;
  174. Fixup16 = (UINT16 *) Fixup;
  175. switch ((**Reloc) >> 12) {
  176. case EFI_IMAGE_REL_BASED_ARM_MOV32T:
  177. FixupVal = ThumbMovwMovtImmediateAddress (Fixup16) + (UINT32)Adjust;
  178. ThumbMovwMovtImmediatePatch (Fixup16, FixupVal);
  179. if (*FixupData != NULL) {
  180. *FixupData = ALIGN_POINTER(*FixupData, sizeof(UINT64));
  181. CopyMem (*FixupData, Fixup16, sizeof (UINT64));
  182. *FixupData = *FixupData + sizeof(UINT64);
  183. }
  184. break;
  185. case EFI_IMAGE_REL_BASED_ARM_MOV32A:
  186. // break omitted - ARM instruction encoding not implemented
  187. default:
  188. return RETURN_UNSUPPORTED;
  189. }
  190. return RETURN_SUCCESS;
  191. }