IoLib.c 23 KB

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  1. /** @file
  2. I/O Library.
  3. The implementation of I/O operation for this library instance
  4. are based on EFI_CPU_IO_PROTOCOL.
  5. Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
  6. Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
  7. SPDX-License-Identifier: BSD-2-Clause-Patent
  8. Module Name: IoLib.c
  9. **/
  10. #include "DxeCpuIoLibInternal.h"
  11. //
  12. // Globle varible to cache pointer to CpuIo protocol.
  13. //
  14. EFI_CPU_IO_PROTOCOL *mCpuIo = NULL;
  15. /**
  16. The constructor function caches the pointer to CpuIo protocol.
  17. The constructor function locates CpuIo protocol from protocol database.
  18. It will ASSERT() if that operation fails and it will always return EFI_SUCCESS.
  19. @param ImageHandle The firmware allocated handle for the EFI image.
  20. @param SystemTable A pointer to the EFI System Table.
  21. @retval EFI_SUCCESS The constructor always returns EFI_SUCCESS.
  22. **/
  23. EFI_STATUS
  24. EFIAPI
  25. IoLibConstructor (
  26. IN EFI_HANDLE ImageHandle,
  27. IN EFI_SYSTEM_TABLE *SystemTable
  28. )
  29. {
  30. EFI_STATUS Status;
  31. Status = gBS->LocateProtocol (&gEfiCpuIoProtocolGuid, NULL, (VOID **) &mCpuIo);
  32. ASSERT_EFI_ERROR (Status);
  33. return Status;
  34. }
  35. /**
  36. Reads registers in the EFI CPU I/O space.
  37. Reads the I/O port specified by Port with registers width specified by Width.
  38. The read value is returned. If such operations are not supported, then ASSERT().
  39. This function must guarantee that all I/O read and write operations are serialized.
  40. @param Port The base address of the I/O operation.
  41. The caller is responsible for aligning the Address if required.
  42. @param Width The width of the I/O operation.
  43. @return Data read from registers in the EFI CPU I/O space.
  44. **/
  45. UINT64
  46. EFIAPI
  47. IoReadWorker (
  48. IN UINTN Port,
  49. IN EFI_CPU_IO_PROTOCOL_WIDTH Width
  50. )
  51. {
  52. EFI_STATUS Status;
  53. UINT64 Data;
  54. Status = mCpuIo->Io.Read (mCpuIo, Width, Port, 1, &Data);
  55. ASSERT_EFI_ERROR (Status);
  56. return Data;
  57. }
  58. /**
  59. Writes registers in the EFI CPU I/O space.
  60. Writes the I/O port specified by Port with registers width and value specified by Width
  61. and Data respectively. Data is returned. If such operations are not supported, then ASSERT().
  62. This function must guarantee that all I/O read and write operations are serialized.
  63. @param Port The base address of the I/O operation.
  64. The caller is responsible for aligning the Address if required.
  65. @param Width The width of the I/O operation.
  66. @param Data The value to write to the I/O port.
  67. @return The parameter of Data.
  68. **/
  69. UINT64
  70. EFIAPI
  71. IoWriteWorker (
  72. IN UINTN Port,
  73. IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
  74. IN UINT64 Data
  75. )
  76. {
  77. EFI_STATUS Status;
  78. Status = mCpuIo->Io.Write (mCpuIo, Width, Port, 1, &Data);
  79. ASSERT_EFI_ERROR (Status);
  80. return Data;
  81. }
  82. /**
  83. Reads registers in the EFI CPU I/O space.
  84. Reads the I/O port specified by Port with registers width specified by Width.
  85. The port is read Count times, and the read data is stored in the provided Buffer.
  86. This function must guarantee that all I/O read and write operations are serialized.
  87. If such operations are not supported, then ASSERT().
  88. @param Port The base address of the I/O operation.
  89. The caller is responsible for aligning the Address if required.
  90. @param Width The width of the I/O operation.
  91. @param Count The number of times to read I/O port.
  92. @param Buffer The buffer to store the read data into.
  93. **/
  94. VOID
  95. EFIAPI
  96. IoReadFifoWorker (
  97. IN UINTN Port,
  98. IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
  99. IN UINTN Count,
  100. IN VOID *Buffer
  101. )
  102. {
  103. EFI_STATUS Status;
  104. Status = mCpuIo->Io.Read (mCpuIo, Width, Port, Count, Buffer);
  105. ASSERT_EFI_ERROR (Status);
  106. }
  107. /**
  108. Writes registers in the EFI CPU I/O space.
  109. Writes the I/O port specified by Port with registers width specified by Width.
  110. The port is written Count times, and the write data is retrieved from the provided Buffer.
  111. This function must guarantee that all I/O read and write operations are serialized.
  112. If such operations are not supported, then ASSERT().
  113. @param Port The base address of the I/O operation.
  114. The caller is responsible for aligning the Address if required.
  115. @param Width The width of the I/O operation.
  116. @param Count The number of times to write I/O port.
  117. @param Buffer The buffer to store the read data into.
  118. **/
  119. VOID
  120. EFIAPI
  121. IoWriteFifoWorker (
  122. IN UINTN Port,
  123. IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
  124. IN UINTN Count,
  125. IN VOID *Buffer
  126. )
  127. {
  128. EFI_STATUS Status;
  129. Status = mCpuIo->Io.Write (mCpuIo, Width, Port, Count, Buffer);
  130. ASSERT_EFI_ERROR (Status);
  131. }
  132. /**
  133. Reads memory-mapped registers in the EFI system memory space.
  134. Reads the MMIO registers specified by Address with registers width specified by Width.
  135. The read value is returned. If such operations are not supported, then ASSERT().
  136. This function must guarantee that all MMIO read and write operations are serialized.
  137. @param Address The MMIO register to read.
  138. The caller is responsible for aligning the Address if required.
  139. @param Width The width of the I/O operation.
  140. @return Data read from registers in the EFI system memory space.
  141. **/
  142. UINT64
  143. EFIAPI
  144. MmioReadWorker (
  145. IN UINTN Address,
  146. IN EFI_CPU_IO_PROTOCOL_WIDTH Width
  147. )
  148. {
  149. EFI_STATUS Status;
  150. UINT64 Data;
  151. Status = mCpuIo->Mem.Read (mCpuIo, Width, Address, 1, &Data);
  152. ASSERT_EFI_ERROR (Status);
  153. return Data;
  154. }
  155. /**
  156. Writes memory-mapped registers in the EFI system memory space.
  157. Writes the MMIO registers specified by Address with registers width and value specified by Width
  158. and Data respectively. Data is returned. If such operations are not supported, then ASSERT().
  159. This function must guarantee that all MMIO read and write operations are serialized.
  160. @param Address The MMIO register to read.
  161. The caller is responsible for aligning the Address if required.
  162. @param Width The width of the I/O operation.
  163. @param Data The value to write to the I/O port.
  164. @return Data read from registers in the EFI system memory space.
  165. **/
  166. UINT64
  167. EFIAPI
  168. MmioWriteWorker (
  169. IN UINTN Address,
  170. IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
  171. IN UINT64 Data
  172. )
  173. {
  174. EFI_STATUS Status;
  175. Status = mCpuIo->Mem.Write (mCpuIo, Width, Address, 1, &Data);
  176. ASSERT_EFI_ERROR (Status);
  177. return Data;
  178. }
  179. /**
  180. Reads an 8-bit I/O port.
  181. Reads the 8-bit I/O port specified by Port. The 8-bit read value is returned.
  182. This function must guarantee that all I/O read and write operations are
  183. serialized.
  184. If 8-bit I/O port operations are not supported, then ASSERT().
  185. @param Port The I/O port to read.
  186. @return The value read.
  187. **/
  188. UINT8
  189. EFIAPI
  190. IoRead8 (
  191. IN UINTN Port
  192. )
  193. {
  194. return (UINT8)IoReadWorker (Port, EfiCpuIoWidthUint8);
  195. }
  196. /**
  197. Writes an 8-bit I/O port.
  198. Writes the 8-bit I/O port specified by Port with the value specified by Value
  199. and returns Value. This function must guarantee that all I/O read and write
  200. operations are serialized.
  201. If 8-bit I/O port operations are not supported, then ASSERT().
  202. @param Port The I/O port to write.
  203. @param Value The value to write to the I/O port.
  204. @return The value written the I/O port.
  205. **/
  206. UINT8
  207. EFIAPI
  208. IoWrite8 (
  209. IN UINTN Port,
  210. IN UINT8 Value
  211. )
  212. {
  213. return (UINT8)IoWriteWorker (Port, EfiCpuIoWidthUint8, Value);
  214. }
  215. /**
  216. Reads a 16-bit I/O port.
  217. Reads the 16-bit I/O port specified by Port. The 16-bit read value is returned.
  218. This function must guarantee that all I/O read and write operations are
  219. serialized.
  220. If Port is not aligned on a 16-bit boundary, then ASSERT().
  221. If 16-bit I/O port operations are not supported, then ASSERT().
  222. @param Port The I/O port to read.
  223. @return The value read.
  224. **/
  225. UINT16
  226. EFIAPI
  227. IoRead16 (
  228. IN UINTN Port
  229. )
  230. {
  231. //
  232. // Make sure Port is aligned on a 16-bit boundary.
  233. //
  234. ASSERT ((Port & 1) == 0);
  235. return (UINT16)IoReadWorker (Port, EfiCpuIoWidthUint16);
  236. }
  237. /**
  238. Writes a 16-bit I/O port.
  239. Writes the 16-bit I/O port specified by Port with the value specified by Value
  240. and returns Value. This function must guarantee that all I/O read and write
  241. operations are serialized.
  242. If Port is not aligned on a 16-bit boundary, then ASSERT().
  243. If 16-bit I/O port operations are not supported, then ASSERT().
  244. @param Port The I/O port to write.
  245. @param Value The value to write to the I/O port.
  246. @return The value written the I/O port.
  247. **/
  248. UINT16
  249. EFIAPI
  250. IoWrite16 (
  251. IN UINTN Port,
  252. IN UINT16 Value
  253. )
  254. {
  255. //
  256. // Make sure Port is aligned on a 16-bit boundary.
  257. //
  258. ASSERT ((Port & 1) == 0);
  259. return (UINT16)IoWriteWorker (Port, EfiCpuIoWidthUint16, Value);
  260. }
  261. /**
  262. Reads a 32-bit I/O port.
  263. Reads the 32-bit I/O port specified by Port. The 32-bit read value is returned.
  264. This function must guarantee that all I/O read and write operations are
  265. serialized.
  266. If Port is not aligned on a 32-bit boundary, then ASSERT().
  267. If 32-bit I/O port operations are not supported, then ASSERT().
  268. @param Port The I/O port to read.
  269. @return The value read.
  270. **/
  271. UINT32
  272. EFIAPI
  273. IoRead32 (
  274. IN UINTN Port
  275. )
  276. {
  277. //
  278. // Make sure Port is aligned on a 32-bit boundary.
  279. //
  280. ASSERT ((Port & 3) == 0);
  281. return (UINT32)IoReadWorker (Port, EfiCpuIoWidthUint32);
  282. }
  283. /**
  284. Writes a 32-bit I/O port.
  285. Writes the 32-bit I/O port specified by Port with the value specified by Value
  286. and returns Value. This function must guarantee that all I/O read and write
  287. operations are serialized.
  288. If Port is not aligned on a 32-bit boundary, then ASSERT().
  289. If 32-bit I/O port operations are not supported, then ASSERT().
  290. @param Port The I/O port to write.
  291. @param Value The value to write to the I/O port.
  292. @return The value written the I/O port.
  293. **/
  294. UINT32
  295. EFIAPI
  296. IoWrite32 (
  297. IN UINTN Port,
  298. IN UINT32 Value
  299. )
  300. {
  301. //
  302. // Make sure Port is aligned on a 32-bit boundary.
  303. //
  304. ASSERT ((Port & 3) == 0);
  305. return (UINT32)IoWriteWorker (Port, EfiCpuIoWidthUint32, Value);
  306. }
  307. /**
  308. Reads a 64-bit I/O port.
  309. Reads the 64-bit I/O port specified by Port. The 64-bit read value is returned.
  310. This function must guarantee that all I/O read and write operations are
  311. serialized.
  312. If Port is not aligned on a 64-bit boundary, then ASSERT().
  313. If 64-bit I/O port operations are not supported, then ASSERT().
  314. @param Port The I/O port to read.
  315. @return The value read.
  316. **/
  317. UINT64
  318. EFIAPI
  319. IoRead64 (
  320. IN UINTN Port
  321. )
  322. {
  323. //
  324. // Make sure Port is aligned on a 64-bit boundary.
  325. //
  326. ASSERT ((Port & 7) == 0);
  327. return IoReadWorker (Port, EfiCpuIoWidthUint64);
  328. }
  329. /**
  330. Writes a 64-bit I/O port.
  331. Writes the 64-bit I/O port specified by Port with the value specified by Value
  332. and returns Value. This function must guarantee that all I/O read and write
  333. operations are serialized.
  334. If Port is not aligned on a 64-bit boundary, then ASSERT().
  335. If 64-bit I/O port operations are not supported, then ASSERT().
  336. @param Port The I/O port to write.
  337. @param Value The value to write to the I/O port.
  338. @return The value written the I/O port.
  339. **/
  340. UINT64
  341. EFIAPI
  342. IoWrite64 (
  343. IN UINTN Port,
  344. IN UINT64 Value
  345. )
  346. {
  347. //
  348. // Make sure Port is aligned on a 64-bit boundary.
  349. //
  350. ASSERT ((Port & 7) == 0);
  351. return IoWriteWorker (Port, EfiCpuIoWidthUint64, Value);
  352. }
  353. /**
  354. Reads an 8-bit I/O port fifo into a block of memory.
  355. Reads the 8-bit I/O fifo port specified by Port.
  356. The port is read Count times, and the read data is
  357. stored in the provided Buffer.
  358. This function must guarantee that all I/O read and write operations are
  359. serialized.
  360. If 8-bit I/O port operations are not supported, then ASSERT().
  361. @param Port The I/O port to read.
  362. @param Count The number of times to read I/O port.
  363. @param Buffer The buffer to store the read data into.
  364. **/
  365. VOID
  366. EFIAPI
  367. IoReadFifo8 (
  368. IN UINTN Port,
  369. IN UINTN Count,
  370. OUT VOID *Buffer
  371. )
  372. {
  373. IoReadFifoWorker (Port, EfiCpuIoWidthFifoUint8, Count, Buffer);
  374. }
  375. /**
  376. Writes a block of memory into an 8-bit I/O port fifo.
  377. Writes the 8-bit I/O fifo port specified by Port.
  378. The port is written Count times, and the write data is
  379. retrieved from the provided Buffer.
  380. This function must guarantee that all I/O write and write operations are
  381. serialized.
  382. If 8-bit I/O port operations are not supported, then ASSERT().
  383. @param Port The I/O port to write.
  384. @param Count The number of times to write I/O port.
  385. @param Buffer The buffer to retrieve the write data from.
  386. **/
  387. VOID
  388. EFIAPI
  389. IoWriteFifo8 (
  390. IN UINTN Port,
  391. IN UINTN Count,
  392. IN VOID *Buffer
  393. )
  394. {
  395. IoWriteFifoWorker (Port, EfiCpuIoWidthFifoUint8, Count, Buffer);
  396. }
  397. /**
  398. Reads a 16-bit I/O port fifo into a block of memory.
  399. Reads the 16-bit I/O fifo port specified by Port.
  400. The port is read Count times, and the read data is
  401. stored in the provided Buffer.
  402. This function must guarantee that all I/O read and write operations are
  403. serialized.
  404. If 16-bit I/O port operations are not supported, then ASSERT().
  405. @param Port The I/O port to read.
  406. @param Count The number of times to read I/O port.
  407. @param Buffer The buffer to store the read data into.
  408. **/
  409. VOID
  410. EFIAPI
  411. IoReadFifo16 (
  412. IN UINTN Port,
  413. IN UINTN Count,
  414. OUT VOID *Buffer
  415. )
  416. {
  417. //
  418. // Make sure Port is aligned on a 16-bit boundary.
  419. //
  420. ASSERT ((Port & 1) == 0);
  421. IoReadFifoWorker (Port, EfiCpuIoWidthFifoUint16, Count, Buffer);
  422. }
  423. /**
  424. Writes a block of memory into a 16-bit I/O port fifo.
  425. Writes the 16-bit I/O fifo port specified by Port.
  426. The port is written Count times, and the write data is
  427. retrieved from the provided Buffer.
  428. This function must guarantee that all I/O write and write operations are
  429. serialized.
  430. If 16-bit I/O port operations are not supported, then ASSERT().
  431. @param Port The I/O port to write.
  432. @param Count The number of times to write I/O port.
  433. @param Buffer The buffer to retrieve the write data from.
  434. **/
  435. VOID
  436. EFIAPI
  437. IoWriteFifo16 (
  438. IN UINTN Port,
  439. IN UINTN Count,
  440. IN VOID *Buffer
  441. )
  442. {
  443. //
  444. // Make sure Port is aligned on a 16-bit boundary.
  445. //
  446. ASSERT ((Port & 1) == 0);
  447. IoWriteFifoWorker (Port, EfiCpuIoWidthFifoUint16, Count, Buffer);
  448. }
  449. /**
  450. Reads a 32-bit I/O port fifo into a block of memory.
  451. Reads the 32-bit I/O fifo port specified by Port.
  452. The port is read Count times, and the read data is
  453. stored in the provided Buffer.
  454. This function must guarantee that all I/O read and write operations are
  455. serialized.
  456. If 32-bit I/O port operations are not supported, then ASSERT().
  457. @param Port The I/O port to read.
  458. @param Count The number of times to read I/O port.
  459. @param Buffer The buffer to store the read data into.
  460. **/
  461. VOID
  462. EFIAPI
  463. IoReadFifo32 (
  464. IN UINTN Port,
  465. IN UINTN Count,
  466. OUT VOID *Buffer
  467. )
  468. {
  469. //
  470. // Make sure Port is aligned on a 32-bit boundary.
  471. //
  472. ASSERT ((Port & 3) == 0);
  473. IoReadFifoWorker (Port, EfiCpuIoWidthFifoUint32, Count, Buffer);
  474. }
  475. /**
  476. Writes a block of memory into a 32-bit I/O port fifo.
  477. Writes the 32-bit I/O fifo port specified by Port.
  478. The port is written Count times, and the write data is
  479. retrieved from the provided Buffer.
  480. This function must guarantee that all I/O write and write operations are
  481. serialized.
  482. If 32-bit I/O port operations are not supported, then ASSERT().
  483. @param Port The I/O port to write.
  484. @param Count The number of times to write I/O port.
  485. @param Buffer The buffer to retrieve the write data from.
  486. **/
  487. VOID
  488. EFIAPI
  489. IoWriteFifo32 (
  490. IN UINTN Port,
  491. IN UINTN Count,
  492. IN VOID *Buffer
  493. )
  494. {
  495. //
  496. // Make sure Port is aligned on a 32-bit boundary.
  497. //
  498. ASSERT ((Port & 3) == 0);
  499. IoWriteFifoWorker (Port, EfiCpuIoWidthFifoUint32, Count, Buffer);
  500. }
  501. /**
  502. Reads an 8-bit MMIO register.
  503. Reads the 8-bit MMIO register specified by Address. The 8-bit read value is
  504. returned. This function must guarantee that all MMIO read and write
  505. operations are serialized.
  506. If 8-bit MMIO register operations are not supported, then ASSERT().
  507. @param Address The MMIO register to read.
  508. @return The value read.
  509. **/
  510. UINT8
  511. EFIAPI
  512. MmioRead8 (
  513. IN UINTN Address
  514. )
  515. {
  516. return (UINT8)MmioReadWorker (Address, EfiCpuIoWidthUint8);
  517. }
  518. /**
  519. Writes an 8-bit MMIO register.
  520. Writes the 8-bit MMIO register specified by Address with the value specified
  521. by Value and returns Value. This function must guarantee that all MMIO read
  522. and write operations are serialized.
  523. If 8-bit MMIO register operations are not supported, then ASSERT().
  524. @param Address The MMIO register to write.
  525. @param Value The value to write to the MMIO register.
  526. **/
  527. UINT8
  528. EFIAPI
  529. MmioWrite8 (
  530. IN UINTN Address,
  531. IN UINT8 Value
  532. )
  533. {
  534. return (UINT8)MmioWriteWorker (Address, EfiCpuIoWidthUint8, Value);
  535. }
  536. /**
  537. Reads a 16-bit MMIO register.
  538. Reads the 16-bit MMIO register specified by Address. The 16-bit read value is
  539. returned. This function must guarantee that all MMIO read and write
  540. operations are serialized.
  541. If Address is not aligned on a 16-bit boundary, then ASSERT().
  542. If 16-bit MMIO register operations are not supported, then ASSERT().
  543. @param Address The MMIO register to read.
  544. @return The value read.
  545. **/
  546. UINT16
  547. EFIAPI
  548. MmioRead16 (
  549. IN UINTN Address
  550. )
  551. {
  552. //
  553. // Make sure Address is aligned on a 16-bit boundary.
  554. //
  555. ASSERT ((Address & 1) == 0);
  556. return (UINT16)MmioReadWorker (Address, EfiCpuIoWidthUint16);
  557. }
  558. /**
  559. Writes a 16-bit MMIO register.
  560. Writes the 16-bit MMIO register specified by Address with the value specified
  561. by Value and returns Value. This function must guarantee that all MMIO read
  562. and write operations are serialized.
  563. If Address is not aligned on a 16-bit boundary, then ASSERT().
  564. If 16-bit MMIO register operations are not supported, then ASSERT().
  565. @param Address The MMIO register to write.
  566. @param Value The value to write to the MMIO register.
  567. **/
  568. UINT16
  569. EFIAPI
  570. MmioWrite16 (
  571. IN UINTN Address,
  572. IN UINT16 Value
  573. )
  574. {
  575. //
  576. // Make sure Address is aligned on a 16-bit boundary.
  577. //
  578. ASSERT ((Address & 1) == 0);
  579. return (UINT16)MmioWriteWorker (Address, EfiCpuIoWidthUint16, Value);
  580. }
  581. /**
  582. Reads a 32-bit MMIO register.
  583. Reads the 32-bit MMIO register specified by Address. The 32-bit read value is
  584. returned. This function must guarantee that all MMIO read and write
  585. operations are serialized.
  586. If Address is not aligned on a 32-bit boundary, then ASSERT().
  587. If 32-bit MMIO register operations are not supported, then ASSERT().
  588. @param Address The MMIO register to read.
  589. @return The value read.
  590. **/
  591. UINT32
  592. EFIAPI
  593. MmioRead32 (
  594. IN UINTN Address
  595. )
  596. {
  597. //
  598. // Make sure Address is aligned on a 32-bit boundary.
  599. //
  600. ASSERT ((Address & 3) == 0);
  601. return (UINT32)MmioReadWorker (Address, EfiCpuIoWidthUint32);
  602. }
  603. /**
  604. Writes a 32-bit MMIO register.
  605. Writes the 32-bit MMIO register specified by Address with the value specified
  606. by Value and returns Value. This function must guarantee that all MMIO read
  607. and write operations are serialized.
  608. If Address is not aligned on a 32-bit boundary, then ASSERT().
  609. If 32-bit MMIO register operations are not supported, then ASSERT().
  610. @param Address The MMIO register to write.
  611. @param Value The value to write to the MMIO register.
  612. **/
  613. UINT32
  614. EFIAPI
  615. MmioWrite32 (
  616. IN UINTN Address,
  617. IN UINT32 Value
  618. )
  619. {
  620. //
  621. // Make sure Address is aligned on a 32-bit boundary.
  622. //
  623. ASSERT ((Address & 3) == 0);
  624. return (UINT32)MmioWriteWorker (Address, EfiCpuIoWidthUint32, Value);
  625. }
  626. /**
  627. Reads a 64-bit MMIO register.
  628. Reads the 64-bit MMIO register specified by Address. The 64-bit read value is
  629. returned. This function must guarantee that all MMIO read and write
  630. operations are serialized.
  631. If Address is not aligned on a 64-bit boundary, then ASSERT().
  632. If 64-bit MMIO register operations are not supported, then ASSERT().
  633. @param Address The MMIO register to read.
  634. @return The value read.
  635. **/
  636. UINT64
  637. EFIAPI
  638. MmioRead64 (
  639. IN UINTN Address
  640. )
  641. {
  642. //
  643. // Make sure Address is aligned on a 64-bit boundary.
  644. //
  645. ASSERT ((Address & 7) == 0);
  646. return (UINT64)MmioReadWorker (Address, EfiCpuIoWidthUint64);
  647. }
  648. /**
  649. Writes a 64-bit MMIO register.
  650. Writes the 64-bit MMIO register specified by Address with the value specified
  651. by Value and returns Value. This function must guarantee that all MMIO read
  652. and write operations are serialized.
  653. If Address is not aligned on a 64-bit boundary, then ASSERT().
  654. If 64-bit MMIO register operations are not supported, then ASSERT().
  655. @param Address The MMIO register to write.
  656. @param Value The value to write to the MMIO register.
  657. **/
  658. UINT64
  659. EFIAPI
  660. MmioWrite64 (
  661. IN UINTN Address,
  662. IN UINT64 Value
  663. )
  664. {
  665. //
  666. // Make sure Address is aligned on a 64-bit boundary.
  667. //
  668. ASSERT ((Address & 7) == 0);
  669. return (UINT64)MmioWriteWorker (Address, EfiCpuIoWidthUint64, Value);
  670. }