OvmfPkg.dec 22 KB

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  1. ## @file
  2. # EFI/Framework Open Virtual Machine Firmware (OVMF) platform
  3. #
  4. # Copyright (c) 2020, Rebecca Cran <rebecca@bsdio.com>
  5. # Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>
  6. # Copyright (c) 2014, Pluribus Networks, Inc.
  7. #
  8. # SPDX-License-Identifier: BSD-2-Clause-Patent
  9. #
  10. ##
  11. [Defines]
  12. DEC_SPECIFICATION = 0x00010005
  13. PACKAGE_NAME = OvmfPkg
  14. PACKAGE_GUID = 2daf5f34-50e5-4b9d-b8e3-5562334d87e5
  15. PACKAGE_VERSION = 0.1
  16. [Includes]
  17. Include
  18. Csm/Include
  19. [LibraryClasses]
  20. ## @libraryclass Access bhyve's firmware control interface.
  21. BhyveFwCtlLib|Include/Library/BhyveFwCtlLib.h
  22. ## @libraryclass Verify blobs read from the VMM
  23. BlobVerifierLib|Include/Library/BlobVerifierLib.h
  24. ## @libraryclass Loads and boots a Linux kernel image
  25. #
  26. LoadLinuxLib|Include/Library/LoadLinuxLib.h
  27. ## @libraryclass Declares helper functions for Secure Encrypted
  28. # Virtualization (SEV) guests.
  29. MemEncryptSevLib|Include/Library/MemEncryptSevLib.h
  30. ## @libraryclass Save and restore variables using a file
  31. #
  32. NvVarsFileLib|Include/Library/NvVarsFileLib.h
  33. ## @libraryclass Provides services to work with PCI capabilities in PCI
  34. # config space.
  35. PciCapLib|Include/Library/PciCapLib.h
  36. ## @libraryclass Layered on top of PciCapLib, allows clients to plug an
  37. # EFI_PCI_IO_PROTOCOL backend into PciCapLib, for config
  38. # space access.
  39. PciCapPciIoLib|Include/Library/PciCapPciIoLib.h
  40. ## @libraryclass Layered on top of PciCapLib, allows clients to plug a
  41. # PciSegmentLib backend into PciCapLib, for config space
  42. # access.
  43. PciCapPciSegmentLib|Include/Library/PciCapPciSegmentLib.h
  44. ## @libraryclass Provide common utility functions to PciHostBridgeLib
  45. # instances in ArmVirtPkg and OvmfPkg.
  46. PciHostBridgeUtilityLib|Include/Library/PciHostBridgeUtilityLib.h
  47. ## @libraryclass Register a status code handler for printing the Boot
  48. # Manager's LoadImage() and StartImage() preparations, and
  49. # return codes, to the UEFI console.
  50. PlatformBmPrintScLib|Include/Library/PlatformBmPrintScLib.h
  51. ## @libraryclass Customize FVB2 protocol member functions for a platform.
  52. PlatformFvbLib|Include/Library/PlatformFvbLib.h
  53. ## @libraryclass Access QEMU's firmware configuration interface
  54. #
  55. QemuFwCfgLib|Include/Library/QemuFwCfgLib.h
  56. ## @libraryclass S3 support for QEMU fw_cfg
  57. #
  58. QemuFwCfgS3Lib|Include/Library/QemuFwCfgS3Lib.h
  59. ## @libraryclass Parse the contents of named fw_cfg files as simple
  60. # (scalar) data types.
  61. QemuFwCfgSimpleParserLib|Include/Library/QemuFwCfgSimpleParserLib.h
  62. ## @libraryclass Rewrite the BootOrder NvVar based on QEMU's "bootorder"
  63. # fw_cfg file.
  64. #
  65. QemuBootOrderLib|Include/Library/QemuBootOrderLib.h
  66. ## @libraryclass Load a kernel image and command line passed to QEMU via
  67. # the command line
  68. #
  69. QemuLoadImageLib|Include/Library/QemuLoadImageLib.h
  70. ## @libraryclass Serialize (and deserialize) variables
  71. #
  72. SerializeVariablesLib|Include/Library/SerializeVariablesLib.h
  73. ## @libraryclass Declares utility functions for virtio device drivers.
  74. VirtioLib|Include/Library/VirtioLib.h
  75. ## @libraryclass Install Virtio Device Protocol instances on virtio-mmio
  76. # transports.
  77. VirtioMmioDeviceLib|Include/Library/VirtioMmioDeviceLib.h
  78. ## @libraryclass Invoke Xen hypercalls
  79. #
  80. XenHypercallLib|Include/Library/XenHypercallLib.h
  81. ## @libraryclass Manage XenBus device path and I/O handles
  82. #
  83. XenIoMmioLib|Include/Library/XenIoMmioLib.h
  84. ## @libraryclass Get information about Xen
  85. #
  86. XenPlatformLib|Include/Library/XenPlatformLib.h
  87. [Guids]
  88. gUefiOvmfPkgTokenSpaceGuid = {0x93bb96af, 0xb9f2, 0x4eb8, {0x94, 0x62, 0xe0, 0xba, 0x74, 0x56, 0x42, 0x36}}
  89. gEfiXenInfoGuid = {0xd3b46f3b, 0xd441, 0x1244, {0x9a, 0x12, 0x0, 0x12, 0x27, 0x3f, 0xc1, 0x4d}}
  90. gOvmfPkKek1AppPrefixGuid = {0x4e32566d, 0x8e9e, 0x4f52, {0x81, 0xd3, 0x5b, 0xb9, 0x71, 0x5f, 0x97, 0x27}}
  91. gOvmfPlatformConfigGuid = {0x7235c51c, 0x0c80, 0x4cab, {0x87, 0xac, 0x3b, 0x08, 0x4a, 0x63, 0x04, 0xb1}}
  92. gVirtioMmioTransportGuid = {0x837dca9e, 0xe874, 0x4d82, {0xb2, 0x9a, 0x23, 0xfe, 0x0e, 0x23, 0xd1, 0xe2}}
  93. gQemuRamfbGuid = {0x557423a1, 0x63ab, 0x406c, {0xbe, 0x7e, 0x91, 0xcd, 0xbc, 0x08, 0xc4, 0x57}}
  94. gXenBusRootDeviceGuid = {0xa732241f, 0x383d, 0x4d9c, {0x8a, 0xe1, 0x8e, 0x09, 0x83, 0x75, 0x89, 0xd7}}
  95. gRootBridgesConnectedEventGroupGuid = {0x24a2d66f, 0xeedd, 0x4086, {0x90, 0x42, 0xf2, 0x6e, 0x47, 0x97, 0xee, 0x69}}
  96. gMicrosoftVendorGuid = {0x77fa9abd, 0x0359, 0x4d32, {0xbd, 0x60, 0x28, 0xf4, 0xe7, 0x8f, 0x78, 0x4b}}
  97. gEfiLegacyBiosGuid = {0x2E3044AC, 0x879F, 0x490F, {0x97, 0x60, 0xBB, 0xDF, 0xAF, 0x69, 0x5F, 0x50}}
  98. gEfiLegacyDevOrderVariableGuid = {0xa56074db, 0x65fe, 0x45f7, {0xbd, 0x21, 0x2d, 0x2b, 0xdd, 0x8e, 0x96, 0x52}}
  99. gQemuKernelLoaderFsMediaGuid = {0x1428f772, 0xb64a, 0x441e, {0xb8, 0xc3, 0x9e, 0xbd, 0xd7, 0xf8, 0x93, 0xc7}}
  100. gGrubFileGuid = {0xb5ae312c, 0xbc8a, 0x43b1, {0x9c, 0x62, 0xeb, 0xb8, 0x26, 0xdd, 0x5d, 0x07}}
  101. gConfidentialComputingSecretGuid = {0xadf956ad, 0xe98c, 0x484c, {0xae, 0x11, 0xb5, 0x1c, 0x7d, 0x33, 0x64, 0x47}}
  102. [Ppis]
  103. # PPI whose presence in the PPI database signals that the TPM base address
  104. # has been discovered and recorded
  105. gOvmfTpmDiscoveredPpiGuid = {0xb9a61ad0, 0x2802, 0x41f3, {0xb5, 0x13, 0x96, 0x51, 0xce, 0x6b, 0xd5, 0x75}}
  106. # This PPI signals that accessing the MMIO range of the TPM is possible in
  107. # the PEI phase, regardless of memory encryption
  108. gOvmfTpmMmioAccessiblePpiGuid = {0x35c84ff2, 0x7bfe, 0x453d, {0x84, 0x5f, 0x68, 0x3a, 0x49, 0x2c, 0xf7, 0xb7}}
  109. [Protocols]
  110. gVirtioDeviceProtocolGuid = {0xfa920010, 0x6785, 0x4941, {0xb6, 0xec, 0x49, 0x8c, 0x57, 0x9f, 0x16, 0x0a}}
  111. gXenBusProtocolGuid = {0x3d3ca290, 0xb9a5, 0x11e3, {0xb7, 0x5d, 0xb8, 0xac, 0x6f, 0x7d, 0x65, 0xe6}}
  112. gXenIoProtocolGuid = {0x6efac84f, 0x0ab0, 0x4747, {0x81, 0xbe, 0x85, 0x55, 0x62, 0x59, 0x04, 0x49}}
  113. gIoMmuAbsentProtocolGuid = {0xf8775d50, 0x8abd, 0x4adf, {0x92, 0xac, 0x85, 0x3e, 0x51, 0xf6, 0xc8, 0xdc}}
  114. gEfiLegacy8259ProtocolGuid = {0x38321dba, 0x4fe0, 0x4e17, {0x8a, 0xec, 0x41, 0x30, 0x55, 0xea, 0xed, 0xc1}}
  115. gEfiFirmwareVolumeProtocolGuid = {0x389F751F, 0x1838, 0x4388, {0x83, 0x90, 0xcd, 0x81, 0x54, 0xbd, 0x27, 0xf8}}
  116. gEfiIsaAcpiProtocolGuid = {0x64a892dc, 0x5561, 0x4536, {0x92, 0xc7, 0x79, 0x9b, 0xfc, 0x18, 0x33, 0x55}}
  117. gEfiIsaIoProtocolGuid = {0x7ee2bd44, 0x3da0, 0x11d4, {0x9a, 0x38, 0x0, 0x90, 0x27, 0x3f, 0xc1, 0x4d}}
  118. gEfiLegacyBiosProtocolGuid = {0xdb9a1e3d, 0x45cb, 0x4abb, {0x85, 0x3b, 0xe5, 0x38, 0x7f, 0xdb, 0x2e, 0x2d}}
  119. gEfiLegacyBiosPlatformProtocolGuid = {0x783658a3, 0x4172, 0x4421, {0xa2, 0x99, 0xe0, 0x09, 0x07, 0x9c, 0x0c, 0xb4}}
  120. gEfiLegacyInterruptProtocolGuid = {0x31ce593d, 0x108a, 0x485d, {0xad, 0xb2, 0x78, 0xf2, 0x1f, 0x29, 0x66, 0xbe}}
  121. gEfiVgaMiniPortProtocolGuid = {0xc7735a2f, 0x88f5, 0x4882, {0xae, 0x63, 0xfa, 0xac, 0x8c, 0x8b, 0x86, 0xb3}}
  122. gOvmfLoadedX86LinuxKernelProtocolGuid = {0xa3edc05d, 0xb618, 0x4ff6, {0x95, 0x52, 0x76, 0xd7, 0x88, 0x63, 0x43, 0xc8}}
  123. [PcdsFixedAtBuild]
  124. gUefiOvmfPkgTokenSpaceGuid.PcdOvmfPeiMemFvBase|0x0|UINT32|0
  125. gUefiOvmfPkgTokenSpaceGuid.PcdOvmfPeiMemFvSize|0x0|UINT32|1
  126. gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeMemFvBase|0x0|UINT32|0x15
  127. gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeMemFvSize|0x0|UINT32|0x16
  128. ## This flag is used to control the destination port for PlatformDebugLibIoPort
  129. gUefiOvmfPkgTokenSpaceGuid.PcdDebugIoPort|0x402|UINT16|4
  130. ## When VirtioScsiDxe is instantiated for a HBA, the numbers of targets and
  131. # LUNs are retrieved from the host during virtio-scsi setup.
  132. # MdeModulePkg/Bus/Scsi/ScsiBusDxe then scans all MaxTarget * MaxLun
  133. # possible devices. This can take extremely long, for example with
  134. # MaxTarget=255 and MaxLun=16383. The *inclusive* constants below limit
  135. # MaxTarget and MaxLun, independently, should the host report higher values,
  136. # so that scanning the number of devices given by their product is still
  137. # acceptably fast.
  138. gUefiOvmfPkgTokenSpaceGuid.PcdVirtioScsiMaxTargetLimit|31|UINT16|6
  139. gUefiOvmfPkgTokenSpaceGuid.PcdVirtioScsiMaxLunLimit|7|UINT32|7
  140. ## Sets the *inclusive* number of targets and LUNs that PvScsi exposes for
  141. # scan by ScsiBusDxe.
  142. # As specified above for VirtioScsi, ScsiBusDxe scans all MaxTarget * MaxLun
  143. # possible devices, which can take extremely long. Thus, the below constants
  144. # are used so that scanning the number of devices given by their product
  145. # is still acceptably fast.
  146. gUefiOvmfPkgTokenSpaceGuid.PcdPvScsiMaxTargetLimit|64|UINT8|0x36
  147. gUefiOvmfPkgTokenSpaceGuid.PcdPvScsiMaxLunLimit|0|UINT8|0x37
  148. ## After PvScsiDxe sends a SCSI request to the device, it waits for
  149. # the request completion in a polling loop.
  150. # This constant defines how many micro-seconds to wait between each
  151. # polling loop iteration.
  152. gUefiOvmfPkgTokenSpaceGuid.PcdPvScsiWaitForCmpStallInUsecs|5|UINT32|0x38
  153. ## Set the *inclusive* number of targets that MptScsi exposes for scan
  154. # by ScsiBusDxe.
  155. gUefiOvmfPkgTokenSpaceGuid.PcdMptScsiMaxTargetLimit|7|UINT8|0x39
  156. ## Microseconds to stall between polling for MptScsi request result
  157. gUefiOvmfPkgTokenSpaceGuid.PcdMptScsiStallPerPollUsec|5|UINT32|0x3a
  158. ## Set the *inclusive* number of targets and LUNs that LsiScsi exposes for
  159. # scan by ScsiBusDxe.
  160. gUefiOvmfPkgTokenSpaceGuid.PcdLsiScsiMaxTargetLimit|7|UINT8|0x3b
  161. gUefiOvmfPkgTokenSpaceGuid.PcdLsiScsiMaxLunLimit|0|UINT8|0x3c
  162. ## Microseconds to stall between polling for LsiScsi request result
  163. gUefiOvmfPkgTokenSpaceGuid.PcdLsiScsiStallPerPollUsec|5|UINT32|0x3d
  164. gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageEventLogBase|0x0|UINT32|0x8
  165. gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageEventLogSize|0x0|UINT32|0x9
  166. gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFirmwareFdSize|0x0|UINT32|0xa
  167. gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFirmwareBlockSize|0|UINT32|0xb
  168. gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageVariableBase|0x0|UINT32|0xc
  169. gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageFtwSpareBase|0x0|UINT32|0xd
  170. gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageFtwWorkingBase|0x0|UINT32|0xe
  171. gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFdBaseAddress|0x0|UINT32|0xf
  172. gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPageTablesBase|0x0|UINT32|0x11
  173. gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPageTablesSize|0x0|UINT32|0x12
  174. gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamBase|0x0|UINT32|0x13
  175. gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamSize|0x0|UINT32|0x14
  176. gUefiOvmfPkgTokenSpaceGuid.PcdOvmfLockBoxStorageBase|0x0|UINT32|0x18
  177. gUefiOvmfPkgTokenSpaceGuid.PcdOvmfLockBoxStorageSize|0x0|UINT32|0x19
  178. gUefiOvmfPkgTokenSpaceGuid.PcdGuidedExtractHandlerTableSize|0x0|UINT32|0x1a
  179. gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDecompressionScratchEnd|0x0|UINT32|0x1f
  180. ## Pcd8259LegacyModeMask defines the default mask value for platform. This
  181. # value is determined.
  182. # 1) If platform only support pure UEFI, value should be set to 0xFFFF or
  183. # 0xFFFE; Because only clock interrupt is allowed in legacy mode in pure
  184. # UEFI platform.
  185. # 2) If platform install CSM and use thunk module:
  186. # a) If thunk call provided by CSM binary requires some legacy interrupt
  187. # support, the corresponding bit should be opened as 0.
  188. # For example, if keyboard interfaces provided CSM binary use legacy
  189. # keyboard interrupt in 8259 bit 1, then the value should be set to
  190. # 0xFFFC.
  191. # b) If all thunk call provied by CSM binary do not require legacy
  192. # interrupt support, value should be set to 0xFFFF or 0xFFFE.
  193. #
  194. # The default value of legacy mode mask could be changed by
  195. # EFI_LEGACY_8259_PROTOCOL->SetMask(). But it is rarely need change it
  196. # except some special cases such as when initializing the CSM binary, it
  197. # should be set to 0xFFFF to mask all legacy interrupt. Please restore the
  198. # original legacy mask value if changing is made for these special case.
  199. gUefiOvmfPkgTokenSpaceGuid.Pcd8259LegacyModeMask|0xFFFF|UINT16|0x3
  200. ## Pcd8259LegacyModeEdgeLevel defines the default edge level for legacy
  201. # mode's interrrupt controller.
  202. # For the corresponding bits, 0 = Edge triggered and 1 = Level triggered.
  203. gUefiOvmfPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel|0x0000|UINT16|0x5
  204. ## Indicates if BiosVideo driver will switch to 80x25 Text VGA Mode when
  205. # exiting boot service.
  206. # TRUE - Switch to Text VGA Mode.
  207. # FALSE - Does not switch to Text VGA Mode.
  208. gUefiOvmfPkgTokenSpaceGuid.PcdBiosVideoSetTextVgaModeEnable|FALSE|BOOLEAN|0x28
  209. ## Indicates if BiosVideo driver will check for VESA BIOS Extension service
  210. # support.
  211. # TRUE - Check for VESA BIOS Extension service.
  212. # FALSE - Does not check for VESA BIOS Extension service.
  213. gUefiOvmfPkgTokenSpaceGuid.PcdBiosVideoCheckVbeEnable|TRUE|BOOLEAN|0x29
  214. ## Indicates if BiosVideo driver will check for VGA service support.
  215. # NOTE: If both PcdBiosVideoCheckVbeEnable and PcdBiosVideoCheckVgaEnable
  216. # are set to FALSE, that means Graphics Output protocol will not be
  217. # installed, the VGA miniport protocol will be installed instead.
  218. # TRUE - Check for VGA service.<BR>
  219. # FALSE - Does not check for VGA service.<BR>
  220. gUefiOvmfPkgTokenSpaceGuid.PcdBiosVideoCheckVgaEnable|TRUE|BOOLEAN|0x2a
  221. ## Indicates if memory space for legacy region will be set as cacheable.
  222. # TRUE - Set cachebility for legacy region.
  223. # FALSE - Does not set cachebility for legacy region.
  224. gUefiOvmfPkgTokenSpaceGuid.PcdLegacyBiosCacheLegacyRegion|TRUE|BOOLEAN|0x2b
  225. ## Specify memory size with bytes to reserve EBDA below 640K for OPROM.
  226. # The value should be a multiple of 4KB.
  227. gUefiOvmfPkgTokenSpaceGuid.PcdEbdaReservedMemorySize|0x8000|UINT32|0x2c
  228. ## Specify memory base address for OPROM to find free memory.
  229. # Some OPROMs do not use EBDA or PMM to allocate memory for its usage,
  230. # instead they find the memory filled with zero from 0x20000.
  231. # The value should be a multiple of 4KB.
  232. # The range should be below the EBDA reserved range from
  233. # (CONVENTIONAL_MEMORY_TOP - Reserved EBDA Memory Size) to
  234. # CONVENTIONAL_MEMORY_TOP.
  235. gUefiOvmfPkgTokenSpaceGuid.PcdOpromReservedMemoryBase|0x60000|UINT32|0x2d
  236. ## Specify memory size with bytes for OPROM to find free memory.
  237. # The value should be a multiple of 4KB. And the range should be below the
  238. # EBDA reserved range from
  239. # (CONVENTIONAL_MEMORY_TOP - Reserved EBDA Memory Size) to
  240. # CONVENTIONAL_MEMORY_TOP.
  241. gUefiOvmfPkgTokenSpaceGuid.PcdOpromReservedMemorySize|0x28000|UINT32|0x2e
  242. ## Specify the end of address below 1MB for the OPROM.
  243. # The last shadowed OpROM should not exceed this address.
  244. gUefiOvmfPkgTokenSpaceGuid.PcdEndOpromShadowAddress|0xdffff|UINT32|0x2f
  245. ## Specify the low PMM (Post Memory Manager) size with bytes below 1MB.
  246. # The value should be a multiple of 4KB.
  247. # @Prompt Low PMM (Post Memory Manager) Size
  248. gUefiOvmfPkgTokenSpaceGuid.PcdLowPmmMemorySize|0x10000|UINT32|0x30
  249. ## Specify the high PMM (Post Memory Manager) size with bytes above 1MB.
  250. # The value should be a multiple of 4KB.
  251. gUefiOvmfPkgTokenSpaceGuid.PcdHighPmmMemorySize|0x400000|UINT32|0x31
  252. gUefiOvmfPkgTokenSpaceGuid.PcdXenPvhStartOfDayStructPtr|0x0|UINT32|0x17
  253. gUefiOvmfPkgTokenSpaceGuid.PcdXenPvhStartOfDayStructPtrSize|0x0|UINT32|0x32
  254. ## Number of page frames to use for storing grant table entries.
  255. gUefiOvmfPkgTokenSpaceGuid.PcdXenGrantFrames|4|UINT32|0x33
  256. ## Specify the extra page table needed to mark the GHCB as unencrypted.
  257. # The value should be a multiple of 4KB for each.
  258. gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbPageTableBase|0x0|UINT32|0x3e
  259. gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbPageTableSize|0x0|UINT32|0x3f
  260. ## The base address of the SEC GHCB page used by SEV-ES.
  261. gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbBase|0|UINT32|0x40
  262. gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbSize|0|UINT32|0x41
  263. gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbBackupBase|0|UINT32|0x44
  264. gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbBackupSize|0|UINT32|0x45
  265. ## The base address and size of the SEV Launch Secret Area provisioned
  266. # after remote attestation. If this is set in the .fdf, the platform
  267. # is responsible for protecting the area from DXE phase overwrites.
  268. gUefiOvmfPkgTokenSpaceGuid.PcdSevLaunchSecretBase|0x0|UINT32|0x42
  269. gUefiOvmfPkgTokenSpaceGuid.PcdSevLaunchSecretSize|0x0|UINT32|0x43
  270. ## The base address and size of a hash table confirming allowed
  271. # parameters to be passed in via the Qemu firmware configuration
  272. # device
  273. gUefiOvmfPkgTokenSpaceGuid.PcdQemuHashTableBase|0x0|UINT32|0x47
  274. gUefiOvmfPkgTokenSpaceGuid.PcdQemuHashTableSize|0x0|UINT32|0x48
  275. ## The base address and size of the work area used during the SEC
  276. # phase by the SEV and TDX supports.
  277. gUefiOvmfPkgTokenSpaceGuid.PcdOvmfWorkAreaBase|0|UINT32|0x49
  278. gUefiOvmfPkgTokenSpaceGuid.PcdOvmfWorkAreaSize|0|UINT32|0x50
  279. ## The work area contains a fixed size header in the Include/WorkArea.h.
  280. # The size of this header is used early boot, and is provided through
  281. # a fixed PCD. It need to be kept in sync with any changes to the
  282. # header definition.
  283. gUefiOvmfPkgTokenSpaceGuid.PcdOvmfConfidentialComputingWorkAreaHeader|4|UINT32|0x51
  284. ## The base address and size of the TDX Cfv base and size.
  285. gUefiOvmfPkgTokenSpaceGuid.PcdCfvBase|0|UINT32|0x52
  286. gUefiOvmfPkgTokenSpaceGuid.PcdCfvRawDataOffset|0|UINT32|0x53
  287. gUefiOvmfPkgTokenSpaceGuid.PcdCfvRawDataSize|0|UINT32|0x54
  288. ## The base address and size of the TDX Bfv base and size.
  289. gUefiOvmfPkgTokenSpaceGuid.PcdBfvBase|0|UINT32|0x55
  290. gUefiOvmfPkgTokenSpaceGuid.PcdBfvRawDataOffset|0|UINT32|0x56
  291. gUefiOvmfPkgTokenSpaceGuid.PcdBfvRawDataSize|0|UINT32|0x57
  292. ## The base address and size of the SEV-SNP Secrets Area that contains
  293. # the VM platform communication key used to send and recieve the
  294. # messages to the PSP. If this is set in the .fdf, the platform
  295. # is responsible to reserve this area from DXE phase overwrites.
  296. gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSnpSecretsBase|0|UINT32|0x58
  297. gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSnpSecretsSize|0|UINT32|0x59
  298. ## The base address and size of a CPUID Area that contains the hypervisor
  299. # provided CPUID results. In the case of SEV-SNP, the CPUID results are
  300. # filtered by the SEV-SNP firmware. If this is set in the .fdf, the
  301. # platform is responsible to reserve this area from DXE phase overwrites.
  302. gUefiOvmfPkgTokenSpaceGuid.PcdOvmfCpuidBase|0|UINT32|0x60
  303. gUefiOvmfPkgTokenSpaceGuid.PcdOvmfCpuidSize|0|UINT32|0x61
  304. ## The range of memory that is validated by the SEC phase.
  305. gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecValidatedStart|0|UINT32|0x62
  306. gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecValidatedEnd|0|UINT32|0x63
  307. [PcdsDynamic, PcdsDynamicEx]
  308. gUefiOvmfPkgTokenSpaceGuid.PcdEmuVariableEvent|0|UINT64|2
  309. gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashVariablesEnable|FALSE|BOOLEAN|0x10
  310. gUefiOvmfPkgTokenSpaceGuid.PcdOvmfHostBridgePciDevId|0|UINT16|0x1b
  311. gUefiOvmfPkgTokenSpaceGuid.PcdQemuSmbiosValidated|FALSE|BOOLEAN|0x21
  312. ## The IO port aperture shared by all PCI root bridges.
  313. #
  314. gUefiOvmfPkgTokenSpaceGuid.PcdPciIoBase|0x0|UINT64|0x22
  315. gUefiOvmfPkgTokenSpaceGuid.PcdPciIoSize|0x0|UINT64|0x23
  316. ## The 32-bit MMIO aperture shared by all PCI root bridges.
  317. #
  318. gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio32Base|0x0|UINT64|0x24
  319. gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio32Size|0x0|UINT64|0x25
  320. ## The 64-bit MMIO aperture shared by all PCI root bridges.
  321. #
  322. gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio64Base|0x0|UINT64|0x26
  323. gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio64Size|0x0|UINT64|0x27
  324. ## The following setting controls how many megabytes we configure as TSEG on
  325. # Q35, for SMRAM purposes. Permitted defaults are: 1, 2, 8. Other defaults
  326. # cause undefined behavior. During boot, the PCD is updated by PlatformPei
  327. # to reflect the extended TSEG size, if one is advertized by QEMU.
  328. #
  329. # This PCD is only accessed if PcdSmmSmramRequire is TRUE (see below).
  330. gUefiOvmfPkgTokenSpaceGuid.PcdQ35TsegMbytes|8|UINT16|0x20
  331. ## Set to TRUE by PlatformPei if the Q35 board supports the "SMRAM at default
  332. # SMBASE" feature.
  333. #
  334. # This PCD is only accessed if PcdSmmSmramRequire is TRUE (see below).
  335. gUefiOvmfPkgTokenSpaceGuid.PcdQ35SmramAtDefaultSmbase|FALSE|BOOLEAN|0x34
  336. ## This PCD adds a communication channel between OVMF's SmmCpuFeaturesLib
  337. # instance in PiSmmCpuDxeSmm, and CpuHotplugSmm.
  338. gUefiOvmfPkgTokenSpaceGuid.PcdCpuHotEjectDataAddress|0|UINT64|0x46
  339. [PcdsFeatureFlag]
  340. gUefiOvmfPkgTokenSpaceGuid.PcdQemuBootOrderPciTranslation|TRUE|BOOLEAN|0x1c
  341. gUefiOvmfPkgTokenSpaceGuid.PcdQemuBootOrderMmioTranslation|FALSE|BOOLEAN|0x1d
  342. ## This feature flag enables SMM/SMRAM support. Note that it also requires
  343. # such support from the underlying QEMU instance; if that support is not
  344. # present, the firmware will reject continuing after a certain point.
  345. #
  346. # The flag also acts as a general "security switch"; when TRUE, many
  347. # components will change behavior, with the goal of preventing a malicious
  348. # runtime OS from tampering with firmware structures (special memory ranges
  349. # used by OVMF, the varstore pflash chip, LockBox etc).
  350. gUefiOvmfPkgTokenSpaceGuid.PcdSmmSmramRequire|FALSE|BOOLEAN|0x1e
  351. ## Informs modules (including pre-DXE-phase modules) whether the platform
  352. # firmware contains a CSM (Compatibility Support Module).
  353. #
  354. gUefiOvmfPkgTokenSpaceGuid.PcdCsmEnable|FALSE|BOOLEAN|0x35