AmdSevDxe.c 9.8 KB

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  1. /** @file
  2. AMD Sev Dxe driver. This driver is dispatched early in DXE, due to being list
  3. in APRIORI. It clears C-bit from MMIO and NonExistent Memory space when SEV
  4. is enabled.
  5. Copyright (c) 2017 - 2020, AMD Inc. All rights reserved.<BR>
  6. SPDX-License-Identifier: BSD-2-Clause-Patent
  7. **/
  8. #include <IndustryStandard/Q35MchIch9.h>
  9. #include <Library/BaseLib.h>
  10. #include <Library/BaseMemoryLib.h>
  11. #include <Library/DebugLib.h>
  12. #include <Library/DxeServicesTableLib.h>
  13. #include <Library/MemEncryptSevLib.h>
  14. #include <Library/MemoryAllocationLib.h>
  15. #include <Library/UefiBootServicesTableLib.h>
  16. #include <Guid/ConfidentialComputingSevSnpBlob.h>
  17. #include <Library/PcdLib.h>
  18. #include <Pi/PrePiDxeCis.h>
  19. #include <Protocol/SevMemoryAcceptance.h>
  20. #include <Protocol/MemoryAccept.h>
  21. #include <Uefi/UefiSpec.h>
  22. // Present, initialized, tested bits defined in MdeModulePkg/Core/Dxe/DxeMain.h
  23. #define EFI_MEMORY_INTERNAL_MASK 0x0700000000000000ULL
  24. STATIC CONFIDENTIAL_COMPUTING_SNP_BLOB_LOCATION mSnpBootDxeTable = {
  25. SIGNATURE_32 ('A', 'M', 'D', 'E'),
  26. 1,
  27. 0,
  28. (UINT64)(UINTN)FixedPcdGet32 (PcdOvmfSnpSecretsBase),
  29. FixedPcdGet32 (PcdOvmfSnpSecretsSize),
  30. (UINT64)(UINTN)FixedPcdGet32 (PcdOvmfCpuidBase),
  31. FixedPcdGet32 (PcdOvmfCpuidSize),
  32. };
  33. STATIC EFI_HANDLE mAmdSevDxeHandle = NULL;
  34. STATIC BOOLEAN mAcceptAllMemoryAtEBS = TRUE;
  35. STATIC EFI_EVENT mAcceptAllMemoryEvent = NULL;
  36. #define IS_ALIGNED(x, y) ((((x) & ((y) - 1)) == 0))
  37. STATIC
  38. EFI_STATUS
  39. EFIAPI
  40. AmdSevMemoryAccept (
  41. IN EDKII_MEMORY_ACCEPT_PROTOCOL *This,
  42. IN EFI_PHYSICAL_ADDRESS StartAddress,
  43. IN UINTN Size
  44. )
  45. {
  46. //
  47. // The StartAddress must be page-aligned, and the Size must be a positive
  48. // multiple of SIZE_4KB. Use an assert instead of returning an erros since
  49. // this is an EDK2-internal protocol.
  50. //
  51. ASSERT (IS_ALIGNED (StartAddress, SIZE_4KB));
  52. ASSERT (IS_ALIGNED (Size, SIZE_4KB));
  53. ASSERT (Size != 0);
  54. MemEncryptSevSnpPreValidateSystemRam (
  55. StartAddress,
  56. EFI_SIZE_TO_PAGES (Size)
  57. );
  58. return EFI_SUCCESS;
  59. }
  60. STATIC
  61. EFI_STATUS
  62. AcceptAllMemory (
  63. VOID
  64. )
  65. {
  66. EFI_GCD_MEMORY_SPACE_DESCRIPTOR *AllDescMap;
  67. UINTN NumEntries;
  68. UINTN Index;
  69. EFI_STATUS Status;
  70. DEBUG ((DEBUG_INFO, "Accepting all memory\n"));
  71. /*
  72. * Get a copy of the memory space map to iterate over while
  73. * changing the map.
  74. */
  75. Status = gDS->GetMemorySpaceMap (&NumEntries, &AllDescMap);
  76. if (EFI_ERROR (Status)) {
  77. return Status;
  78. }
  79. for (Index = 0; Index < NumEntries; Index++) {
  80. CONST EFI_GCD_MEMORY_SPACE_DESCRIPTOR *Desc;
  81. Desc = &AllDescMap[Index];
  82. if (Desc->GcdMemoryType != EFI_GCD_MEMORY_TYPE_UNACCEPTED) {
  83. continue;
  84. }
  85. Status = AmdSevMemoryAccept (
  86. NULL,
  87. Desc->BaseAddress,
  88. Desc->Length
  89. );
  90. if (EFI_ERROR (Status)) {
  91. break;
  92. }
  93. Status = gDS->RemoveMemorySpace (Desc->BaseAddress, Desc->Length);
  94. if (EFI_ERROR (Status)) {
  95. break;
  96. }
  97. Status = gDS->AddMemorySpace (
  98. EfiGcdMemoryTypeSystemMemory,
  99. Desc->BaseAddress,
  100. Desc->Length,
  101. // Allocable system memory resource capabilities as masked
  102. // in MdeModulePkg/Core/Dxe/Mem/Page.c:PromoteMemoryResource
  103. Desc->Capabilities & ~(EFI_MEMORY_INTERNAL_MASK | EFI_MEMORY_RUNTIME)
  104. );
  105. if (EFI_ERROR (Status)) {
  106. break;
  107. }
  108. }
  109. gBS->FreePool (AllDescMap);
  110. gBS->CloseEvent (mAcceptAllMemoryEvent);
  111. return Status;
  112. }
  113. VOID
  114. EFIAPI
  115. ResolveUnacceptedMemory (
  116. IN EFI_EVENT Event,
  117. IN VOID *Context
  118. )
  119. {
  120. EFI_STATUS Status;
  121. if (!mAcceptAllMemoryAtEBS) {
  122. return;
  123. }
  124. Status = AcceptAllMemory ();
  125. ASSERT_EFI_ERROR (Status);
  126. }
  127. STATIC
  128. EFI_STATUS
  129. EFIAPI
  130. AllowUnacceptedMemory (
  131. IN OVMF_SEV_MEMORY_ACCEPTANCE_PROTOCOL *This
  132. )
  133. {
  134. mAcceptAllMemoryAtEBS = FALSE;
  135. return EFI_SUCCESS;
  136. }
  137. STATIC
  138. OVMF_SEV_MEMORY_ACCEPTANCE_PROTOCOL
  139. mMemoryAcceptanceProtocol = { AllowUnacceptedMemory };
  140. STATIC EDKII_MEMORY_ACCEPT_PROTOCOL mMemoryAcceptProtocol = {
  141. AmdSevMemoryAccept
  142. };
  143. EFI_STATUS
  144. EFIAPI
  145. AmdSevDxeEntryPoint (
  146. IN EFI_HANDLE ImageHandle,
  147. IN EFI_SYSTEM_TABLE *SystemTable
  148. )
  149. {
  150. EFI_STATUS Status;
  151. EFI_GCD_MEMORY_SPACE_DESCRIPTOR *AllDescMap;
  152. UINTN NumEntries;
  153. UINTN Index;
  154. //
  155. // Do nothing when SEV is not enabled
  156. //
  157. if (!MemEncryptSevIsEnabled ()) {
  158. return EFI_UNSUPPORTED;
  159. }
  160. //
  161. // Iterate through the GCD map and clear the C-bit from MMIO and NonExistent
  162. // memory space. The NonExistent memory space will be used for mapping the
  163. // MMIO space added later (eg PciRootBridge). By clearing both known MMIO and
  164. // NonExistent memory space can gurantee that current and furture MMIO adds
  165. // will have C-bit cleared.
  166. //
  167. Status = gDS->GetMemorySpaceMap (&NumEntries, &AllDescMap);
  168. if (!EFI_ERROR (Status)) {
  169. for (Index = 0; Index < NumEntries; Index++) {
  170. CONST EFI_GCD_MEMORY_SPACE_DESCRIPTOR *Desc;
  171. Desc = &AllDescMap[Index];
  172. if ((Desc->GcdMemoryType == EfiGcdMemoryTypeMemoryMappedIo) ||
  173. (Desc->GcdMemoryType == EfiGcdMemoryTypeNonExistent))
  174. {
  175. Status = MemEncryptSevClearMmioPageEncMask (
  176. 0,
  177. Desc->BaseAddress,
  178. EFI_SIZE_TO_PAGES (Desc->Length)
  179. );
  180. ASSERT_EFI_ERROR (Status);
  181. }
  182. }
  183. FreePool (AllDescMap);
  184. }
  185. //
  186. // If PCI Express is enabled, the MMCONFIG area has been reserved, rather
  187. // than marked as MMIO, and so the C-bit won't be cleared by the above walk
  188. // through the GCD map. Check for the MMCONFIG area and clear the C-bit for
  189. // the range.
  190. //
  191. if (PcdGet16 (PcdOvmfHostBridgePciDevId) == INTEL_Q35_MCH_DEVICE_ID) {
  192. Status = MemEncryptSevClearMmioPageEncMask (
  193. 0,
  194. FixedPcdGet64 (PcdPciExpressBaseAddress),
  195. EFI_SIZE_TO_PAGES (SIZE_256MB)
  196. );
  197. ASSERT_EFI_ERROR (Status);
  198. }
  199. //
  200. // When SMM is enabled, clear the C-bit from SMM Saved State Area
  201. //
  202. // NOTES: The SavedStateArea address cleared here is before SMBASE
  203. // relocation. Currently, we do not clear the SavedStateArea address after
  204. // SMBASE is relocated due to the following reasons:
  205. //
  206. // 1) Guest BIOS never access the relocated SavedStateArea.
  207. //
  208. // 2) The C-bit works on page-aligned address, but the SavedStateArea
  209. // address is not a page-aligned. Theoretically, we could roundup the address
  210. // and clear the C-bit of aligned address but looking carefully we found
  211. // that some portion of the page contains code -- which will causes a bigger
  212. // issues for SEV guest. When SEV is enabled, all the code must be encrypted
  213. // otherwise hardware will cause trap.
  214. //
  215. // We restore the C-bit for this SMM Saved State Area after SMBASE relocation
  216. // is completed (See OvmfPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.c).
  217. //
  218. if (FeaturePcdGet (PcdSmmSmramRequire)) {
  219. UINTN MapPagesBase;
  220. UINTN MapPagesCount;
  221. Status = MemEncryptSevLocateInitialSmramSaveStateMapPages (
  222. &MapPagesBase,
  223. &MapPagesCount
  224. );
  225. ASSERT_EFI_ERROR (Status);
  226. //
  227. // Although these pages were set aside (i.e., allocated) by PlatformPei, we
  228. // could be after a warm reboot from the OS. Don't leak any stale OS data
  229. // to the hypervisor.
  230. //
  231. ZeroMem ((VOID *)MapPagesBase, EFI_PAGES_TO_SIZE (MapPagesCount));
  232. Status = MemEncryptSevClearPageEncMask (
  233. 0, // Cr3BaseAddress -- use current CR3
  234. MapPagesBase, // BaseAddress
  235. MapPagesCount // NumPages
  236. );
  237. if (EFI_ERROR (Status)) {
  238. DEBUG ((
  239. DEBUG_ERROR,
  240. "%a: MemEncryptSevClearPageEncMask(): %r\n",
  241. __FUNCTION__,
  242. Status
  243. ));
  244. ASSERT (FALSE);
  245. CpuDeadLoop ();
  246. }
  247. }
  248. if (MemEncryptSevSnpIsEnabled ()) {
  249. //
  250. // Memory acceptance began being required in SEV-SNP, so install the
  251. // memory accept protocol implementation for a SEV-SNP active guest.
  252. //
  253. Status = gBS->InstallMultipleProtocolInterfaces (
  254. &mAmdSevDxeHandle,
  255. &gEdkiiMemoryAcceptProtocolGuid,
  256. &mMemoryAcceptProtocol,
  257. &gOvmfSevMemoryAcceptanceProtocolGuid,
  258. &mMemoryAcceptanceProtocol,
  259. NULL
  260. );
  261. ASSERT_EFI_ERROR (Status);
  262. // SEV-SNP support does not automatically imply unaccepted memory support,
  263. // so make ExitBootServices accept all unaccepted memory if support is
  264. // not communicated.
  265. Status = gBS->CreateEventEx (
  266. EVT_NOTIFY_SIGNAL,
  267. TPL_CALLBACK,
  268. ResolveUnacceptedMemory,
  269. NULL,
  270. &gEfiEventBeforeExitBootServicesGuid,
  271. &mAcceptAllMemoryEvent
  272. );
  273. if (EFI_ERROR (Status)) {
  274. DEBUG ((DEBUG_ERROR, "AllowUnacceptedMemory event creation for EventBeforeExitBootServices failed.\n"));
  275. }
  276. //
  277. // If its SEV-SNP active guest then install the CONFIDENTIAL_COMPUTING_SEV_SNP_BLOB.
  278. // It contains the location for both the Secrets and CPUID page.
  279. //
  280. return gBS->InstallConfigurationTable (
  281. &gConfidentialComputingSevSnpBlobGuid,
  282. &mSnpBootDxeTable
  283. );
  284. }
  285. return EFI_SUCCESS;
  286. }