CacheLibInternal.h 2.5 KB

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  1. /** @file
  2. Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
  3. SPDX-License-Identifier: BSD-2-Clause-Patent
  4. **/
  5. #ifndef _CACHE_LIB_INTERNAL_H_
  6. #define _CACHE_LIB_INTERNAL_H_
  7. #define EFI_MSR_CACHE_VARIABLE_MTRR_BASE 0x00000200
  8. #define EFI_MSR_CACHE_VARIABLE_MTRR_END 0x0000020F
  9. #define V_EFI_FIXED_MTRR_NUMBER 11
  10. #define EFI_MSR_IA32_MTRR_FIX64K_00000 0x00000250
  11. #define EFI_MSR_IA32_MTRR_FIX16K_80000 0x00000258
  12. #define EFI_MSR_IA32_MTRR_FIX16K_A0000 0x00000259
  13. #define EFI_MSR_IA32_MTRR_FIX4K_C0000 0x00000268
  14. #define EFI_MSR_IA32_MTRR_FIX4K_C8000 0x00000269
  15. #define EFI_MSR_IA32_MTRR_FIX4K_D0000 0x0000026A
  16. #define EFI_MSR_IA32_MTRR_FIX4K_D8000 0x0000026B
  17. #define EFI_MSR_IA32_MTRR_FIX4K_E0000 0x0000026C
  18. #define EFI_MSR_IA32_MTRR_FIX4K_E8000 0x0000026D
  19. #define EFI_MSR_IA32_MTRR_FIX4K_F0000 0x0000026E
  20. #define EFI_MSR_IA32_MTRR_FIX4K_F8000 0x0000026F
  21. #define EFI_MSR_CACHE_IA32_MTRR_DEF_TYPE 0x000002FF
  22. #define B_EFI_MSR_CACHE_MTRR_VALID BIT11
  23. #define B_EFI_MSR_GLOBAL_MTRR_ENABLE BIT11
  24. #define B_EFI_MSR_FIXED_MTRR_ENABLE BIT10
  25. #define B_EFI_MSR_CACHE_MEMORY_TYPE (BIT2 | BIT1 | BIT0)
  26. #define EFI_MSR_VALID_MASK 0xFFFFFFFFF
  27. #define EFI_CACHE_VALID_ADDRESS 0xFFFFFF000
  28. #define EFI_SMRR_CACHE_VALID_ADDRESS 0xFFFFF000
  29. #define EFI_CACHE_VALID_EXTENDED_ADDRESS 0xFFFFFFFFFF000
  30. // Leave one MTRR pairs for OS use
  31. #define EFI_CACHE_NUM_VAR_MTRR_PAIRS_FOR_OS 1
  32. #define EFI_CACHE_LAST_VARIABLE_MTRR_FOR_BIOS (EFI_MSR_CACHE_VARIABLE_MTRR_END) - \
  33. (EFI_CACHE_NUM_VAR_MTRR_PAIRS_FOR_OS * 2)
  34. #define EFI_MSR_IA32_MTRR_CAP 0x000000FE
  35. #define B_EFI_MSR_IA32_MTRR_CAP_EMRR_SUPPORT BIT12
  36. #define B_EFI_MSR_IA32_MTRR_CAP_SMRR_SUPPORT BIT11
  37. #define B_EFI_MSR_IA32_MTRR_CAP_WC_SUPPORT BIT10
  38. #define B_EFI_MSR_IA32_MTRR_CAP_FIXED_SUPPORT BIT8
  39. #define B_EFI_MSR_IA32_MTRR_CAP_VARIABLE_SUPPORT (BIT7 | BIT6 | BIT5 | BIT4 | BIT3 | BIT2 | BIT1 | BIT0)
  40. #define CPUID_VIR_PHY_ADDRESS_SIZE 0x80000008
  41. #define CPUID_EXTENDED_FUNCTION 0x80000000
  42. #endif