CpuTimerLib.c 7.2 KB

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  1. /** @file
  2. CPUID Leaf 0x15 for Core Crystal Clock frequency instance of Timer Library.
  3. Copyright (c) 2019 Intel Corporation. All rights reserved.<BR>
  4. SPDX-License-Identifier: BSD-2-Clause-Patent
  5. **/
  6. #include <Base.h>
  7. #include <Library/TimerLib.h>
  8. #include <Library/BaseLib.h>
  9. #include <Library/PcdLib.h>
  10. #include <Library/DebugLib.h>
  11. #include <Register/Cpuid.h>
  12. GUID mCpuCrystalFrequencyHobGuid = {
  13. 0xe1ec5ad0, 0x8569, 0x46bd, { 0x8d, 0xcd, 0x3b, 0x9f, 0x6f, 0x45, 0x82, 0x7a }
  14. };
  15. /**
  16. Internal function to retrieves the 64-bit frequency in Hz.
  17. Internal function to retrieves the 64-bit frequency in Hz.
  18. @return The frequency in Hz.
  19. **/
  20. UINT64
  21. InternalGetPerformanceCounterFrequency (
  22. VOID
  23. );
  24. /**
  25. CPUID Leaf 0x15 for Core Crystal Clock Frequency.
  26. The TSC counting frequency is determined by using CPUID leaf 0x15. Frequency in MHz = Core XTAL frequency * EBX/EAX.
  27. In newer flavors of the CPU, core xtal frequency is returned in ECX or 0 if not supported.
  28. @return The number of TSC counts per second.
  29. **/
  30. UINT64
  31. CpuidCoreClockCalculateTscFrequency (
  32. VOID
  33. )
  34. {
  35. UINT64 TscFrequency;
  36. UINT64 CoreXtalFrequency;
  37. UINT32 RegEax;
  38. UINT32 RegEbx;
  39. UINT32 RegEcx;
  40. //
  41. // Use CPUID leaf 0x15 Time Stamp Counter and Nominal Core Crystal Clock Information
  42. // EBX returns 0 if not supported. ECX, if non zero, provides Core Xtal Frequency in hertz.
  43. // TSC frequency = (ECX, Core Xtal Frequency) * EBX/EAX.
  44. //
  45. AsmCpuid (CPUID_TIME_STAMP_COUNTER, &RegEax, &RegEbx, &RegEcx, NULL);
  46. //
  47. // If EAX or EBX returns 0, the XTAL ratio is not enumerated.
  48. //
  49. if ((RegEax == 0) || (RegEbx == 0)) {
  50. ASSERT (RegEax != 0);
  51. ASSERT (RegEbx != 0);
  52. return 0;
  53. }
  54. //
  55. // If ECX returns 0, the XTAL frequency is not enumerated.
  56. // And PcdCpuCoreCrystalClockFrequency defined should base on processor series.
  57. //
  58. if (RegEcx == 0) {
  59. CoreXtalFrequency = PcdGet64 (PcdCpuCoreCrystalClockFrequency);
  60. } else {
  61. CoreXtalFrequency = (UINT64)RegEcx;
  62. }
  63. //
  64. // Calculate TSC frequency = (ECX, Core Xtal Frequency) * EBX/EAX
  65. //
  66. TscFrequency = DivU64x32 (MultU64x32 (CoreXtalFrequency, RegEbx) + (UINT64)(RegEax >> 1), RegEax);
  67. return TscFrequency;
  68. }
  69. /**
  70. Stalls the CPU for at least the given number of ticks.
  71. Stalls the CPU for at least the given number of ticks. It's invoked by
  72. MicroSecondDelay() and NanoSecondDelay().
  73. @param Delay A period of time to delay in ticks.
  74. **/
  75. VOID
  76. InternalCpuDelay (
  77. IN UINT64 Delay
  78. )
  79. {
  80. UINT64 Ticks;
  81. //
  82. // The target timer count is calculated here
  83. //
  84. Ticks = AsmReadTsc () + Delay;
  85. //
  86. // Wait until time out
  87. // Timer wrap-arounds are NOT handled correctly by this function.
  88. // Thus, this function must be called within 10 years of reset since
  89. // Intel guarantees a minimum of 10 years before the TSC wraps.
  90. //
  91. while (AsmReadTsc () <= Ticks) {
  92. CpuPause ();
  93. }
  94. }
  95. /**
  96. Stalls the CPU for at least the given number of microseconds.
  97. Stalls the CPU for the number of microseconds specified by MicroSeconds.
  98. @param[in] MicroSeconds The minimum number of microseconds to delay.
  99. @return MicroSeconds
  100. **/
  101. UINTN
  102. EFIAPI
  103. MicroSecondDelay (
  104. IN UINTN MicroSeconds
  105. )
  106. {
  107. InternalCpuDelay (
  108. DivU64x32 (
  109. MultU64x64 (
  110. MicroSeconds,
  111. InternalGetPerformanceCounterFrequency ()
  112. ),
  113. 1000000u
  114. )
  115. );
  116. return MicroSeconds;
  117. }
  118. /**
  119. Stalls the CPU for at least the given number of nanoseconds.
  120. Stalls the CPU for the number of nanoseconds specified by NanoSeconds.
  121. @param NanoSeconds The minimum number of nanoseconds to delay.
  122. @return NanoSeconds
  123. **/
  124. UINTN
  125. EFIAPI
  126. NanoSecondDelay (
  127. IN UINTN NanoSeconds
  128. )
  129. {
  130. InternalCpuDelay (
  131. DivU64x32 (
  132. MultU64x64 (
  133. NanoSeconds,
  134. InternalGetPerformanceCounterFrequency ()
  135. ),
  136. 1000000000u
  137. )
  138. );
  139. return NanoSeconds;
  140. }
  141. /**
  142. Retrieves the current value of a 64-bit free running performance counter.
  143. Retrieves the current value of a 64-bit free running performance counter. The
  144. counter can either count up by 1 or count down by 1. If the physical
  145. performance counter counts by a larger increment, then the counter values
  146. must be translated. The properties of the counter can be retrieved from
  147. GetPerformanceCounterProperties().
  148. @return The current value of the free running performance counter.
  149. **/
  150. UINT64
  151. EFIAPI
  152. GetPerformanceCounter (
  153. VOID
  154. )
  155. {
  156. return AsmReadTsc ();
  157. }
  158. /**
  159. Retrieves the 64-bit frequency in Hz and the range of performance counter
  160. values.
  161. If StartValue is not NULL, then the value that the performance counter starts
  162. with immediately after is it rolls over is returned in StartValue. If
  163. EndValue is not NULL, then the value that the performance counter end with
  164. immediately before it rolls over is returned in EndValue. The 64-bit
  165. frequency of the performance counter in Hz is always returned. If StartValue
  166. is less than EndValue, then the performance counter counts up. If StartValue
  167. is greater than EndValue, then the performance counter counts down. For
  168. example, a 64-bit free running counter that counts up would have a StartValue
  169. of 0 and an EndValue of 0xFFFFFFFFFFFFFFFF. A 24-bit free running counter
  170. that counts down would have a StartValue of 0xFFFFFF and an EndValue of 0.
  171. @param StartValue The value the performance counter starts with when it
  172. rolls over.
  173. @param EndValue The value that the performance counter ends with before
  174. it rolls over.
  175. @return The frequency in Hz.
  176. **/
  177. UINT64
  178. EFIAPI
  179. GetPerformanceCounterProperties (
  180. OUT UINT64 *StartValue OPTIONAL,
  181. OUT UINT64 *EndValue OPTIONAL
  182. )
  183. {
  184. if (StartValue != NULL) {
  185. *StartValue = 0;
  186. }
  187. if (EndValue != NULL) {
  188. *EndValue = 0xffffffffffffffffULL;
  189. }
  190. return InternalGetPerformanceCounterFrequency ();
  191. }
  192. /**
  193. Converts elapsed ticks of performance counter to time in nanoseconds.
  194. This function converts the elapsed ticks of running performance counter to
  195. time value in unit of nanoseconds.
  196. @param Ticks The number of elapsed ticks of running performance counter.
  197. @return The elapsed time in nanoseconds.
  198. **/
  199. UINT64
  200. EFIAPI
  201. GetTimeInNanoSecond (
  202. IN UINT64 Ticks
  203. )
  204. {
  205. UINT64 Frequency;
  206. UINT64 NanoSeconds;
  207. UINT64 Remainder;
  208. INTN Shift;
  209. Frequency = GetPerformanceCounterProperties (NULL, NULL);
  210. //
  211. // Ticks
  212. // Time = --------- x 1,000,000,000
  213. // Frequency
  214. //
  215. NanoSeconds = MultU64x32 (DivU64x64Remainder (Ticks, Frequency, &Remainder), 1000000000u);
  216. //
  217. // Ensure (Remainder * 1,000,000,000) will not overflow 64-bit.
  218. // Since 2^29 < 1,000,000,000 = 0x3B9ACA00 < 2^30, Remainder should < 2^(64-30) = 2^34,
  219. // i.e. highest bit set in Remainder should <= 33.
  220. //
  221. Shift = MAX (0, HighBitSet64 (Remainder) - 33);
  222. Remainder = RShiftU64 (Remainder, (UINTN)Shift);
  223. Frequency = RShiftU64 (Frequency, (UINTN)Shift);
  224. NanoSeconds += DivU64x64Remainder (MultU64x32 (Remainder, 1000000000u), Frequency, NULL);
  225. return NanoSeconds;
  226. }