Eist.c 3.2 KB

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  1. /** @file
  2. Enhanced Intel SpeedStep feature.
  3. Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
  4. SPDX-License-Identifier: BSD-2-Clause-Patent
  5. **/
  6. #include "CpuCommonFeatures.h"
  7. /**
  8. Detects if Enhanced Intel SpeedStep feature supported on current processor.
  9. @param[in] ProcessorNumber The index of the CPU executing this function.
  10. @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFORMATION
  11. structure for the CPU executing this function.
  12. @param[in] ConfigData A pointer to the configuration buffer returned
  13. by CPU_FEATURE_GET_CONFIG_DATA. NULL if
  14. CPU_FEATURE_GET_CONFIG_DATA was not provided in
  15. RegisterCpuFeature().
  16. @retval TRUE Enhanced Intel SpeedStep feature is supported.
  17. @retval FALSE Enhanced Intel SpeedStep feature is not supported.
  18. @note This service could be called by BSP/APs.
  19. **/
  20. BOOLEAN
  21. EFIAPI
  22. EistSupport (
  23. IN UINTN ProcessorNumber,
  24. IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo,
  25. IN VOID *ConfigData OPTIONAL
  26. )
  27. {
  28. return (CpuInfo->CpuIdVersionInfoEcx.Bits.EIST == 1);
  29. }
  30. /**
  31. Initializes Enhanced Intel SpeedStep feature to specific state.
  32. @param[in] ProcessorNumber The index of the CPU executing this function.
  33. @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFORMATION
  34. structure for the CPU executing this function.
  35. @param[in] ConfigData A pointer to the configuration buffer returned
  36. by CPU_FEATURE_GET_CONFIG_DATA. NULL if
  37. CPU_FEATURE_GET_CONFIG_DATA was not provided in
  38. RegisterCpuFeature().
  39. @param[in] State If TRUE, then the Enhanced Intel SpeedStep feature
  40. must be enabled.
  41. If FALSE, then the Enhanced Intel SpeedStep feature
  42. must be disabled.
  43. @retval RETURN_SUCCESS Enhanced Intel SpeedStep feature is initialized.
  44. @note This service could be called by BSP only.
  45. **/
  46. RETURN_STATUS
  47. EFIAPI
  48. EistInitialize (
  49. IN UINTN ProcessorNumber,
  50. IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo,
  51. IN VOID *ConfigData OPTIONAL,
  52. IN BOOLEAN State
  53. )
  54. {
  55. //
  56. // The scope of the MSR_IA32_MISC_ENABLE is core for below processor type, only program
  57. // MSR_IA32_MISC_ENABLE for thread 0 in each core.
  58. //
  59. if (IS_ATOM_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) ||
  60. IS_CORE_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) ||
  61. IS_CORE2_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel))
  62. {
  63. if (CpuInfo->ProcessorInfo.Location.Thread != 0) {
  64. return RETURN_SUCCESS;
  65. }
  66. }
  67. CPU_REGISTER_TABLE_WRITE_FIELD (
  68. ProcessorNumber,
  69. Msr,
  70. MSR_IA32_MISC_ENABLE,
  71. MSR_IA32_MISC_ENABLE_REGISTER,
  72. Bits.EIST,
  73. (State) ? 1 : 0
  74. );
  75. return RETURN_SUCCESS;
  76. }