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@@ -0,0 +1,431 @@
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+/** @file
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+ This driver is used for SMM S3 support for the bootloader that
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+ doesn't support SMM.
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+ The payload would save SMM rebase info to SMM communication area.
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+ The bootloader is expected to rebase the SMM and trigger SMI by
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+ writting 0xB2 port with given value from SMM communication area.
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+ The paylaod SMM handler got chance to restore regs in S3 path.
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+
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+ Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>
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+ SPDX-License-Identifier: BSD-2-Clause-Patent
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+
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+**/
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+
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+#include <BlSupportSmm.h>
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+
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+PLD_S3_COMMUNICATION mPldS3Hob;
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+EFI_SMRAM_HOB_DESCRIPTOR_BLOCK *mSmramHob = NULL;
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+PLD_SMM_REGISTERS *mSmmRegisterHob = NULL;;
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+UINT64 mSmmFeatureControl = 0;
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+
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+/**
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+ Save SMM rebase and SMI handler information to SMM communication area
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+
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+ The function detects SMM communication region for boot loader, if it is detected, it
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+ will save SMM rebase information and S3 SMI handler information to SMM communication
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+ region. Bootloader should consume these information in S3 path to restore smm base,
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+ and write the 0xB2 port to trigger SMI so that payload could resume S3 registers.
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+
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+ @param[in] BlSwSmiHandlerInput Value written to 0xB2 to trigger SMI handler.
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+
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+ @retval EFI_SUCCESS Save SMM info success.
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+ @retval Others Failed to save SMM info.
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+**/
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+EFI_STATUS
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+SaveSmmInfoForS3 (
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+ IN UINT8 BlSwSmiHandlerInput
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+ )
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+{
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+ EFI_STATUS Status;
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+ EFI_PROCESSOR_INFORMATION ProcessorInfo;
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+ EFI_MP_SERVICES_PROTOCOL *MpService;
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+ CPU_SMMBASE *SmmBaseInfo;
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+ PLD_TO_BL_SMM_INFO *PldSmmInfo;
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+ UINTN Index;
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+
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+ PldSmmInfo = (PLD_TO_BL_SMM_INFO *)(UINTN)mPldS3Hob.CommBuffer.PhysicalStart;
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+ PldSmmInfo->Header.Header.HobLength = (UINT16)(sizeof (PLD_TO_BL_SMM_INFO) + gSmst->NumberOfCpus * sizeof (CPU_SMMBASE));
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+ for (Index = 0; Index < mSmramHob->NumberOfSmmReservedRegions; Index++) {
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+ if ((mPldS3Hob.CommBuffer.PhysicalStart >= mSmramHob->Descriptor[Index].PhysicalStart) &&
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+ (mPldS3Hob.CommBuffer.PhysicalStart < mSmramHob->Descriptor[Index].PhysicalStart + mSmramHob->Descriptor[Index].PhysicalSize)) {
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+ break;
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+ }
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+ }
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+ if (Index == mSmramHob->NumberOfSmmReservedRegions) {
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+ return EFI_NOT_FOUND;
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+ }
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+
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+ //
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+ // Make sure the dedicated region for SMM info communication whose attribute is "allocated" (i.e., excluded from SMM memory service)
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+ //
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+ if ((mSmramHob->Descriptor[Index].RegionState & EFI_ALLOCATED) == 0) {
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+ DEBUG ((DEBUG_ERROR, "SMM communication region not set to EFI_ALLOCATED\n"));
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+ return EFI_INVALID_PARAMETER;
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+ }
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+
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+ if (((UINTN)PldSmmInfo + PldSmmInfo->Header.Header.HobLength) > (mSmramHob->Descriptor[Index].PhysicalStart + mSmramHob->Descriptor[Index].PhysicalSize)) {
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+ DEBUG ((DEBUG_ERROR, "SMM communication buffer (0x%x) is too small.\n", (UINTN)PldSmmInfo + PldSmmInfo->Header.Header.HobLength));
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+ return EFI_BUFFER_TOO_SMALL;
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+ }
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+
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+ CopyGuid (&PldSmmInfo->Header.Name, &gS3CommunicationGuid);
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+ PldSmmInfo->Header.Header.HobType = EFI_HOB_TYPE_GUID_EXTENSION;
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+ PldSmmInfo->S3Info.SwSmiTriggerValue = BlSwSmiHandlerInput;
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+
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+ //
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+ // Save APIC ID and SMM base
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+ //
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+ Status = gBS->LocateProtocol (&gEfiMpServiceProtocolGuid, NULL, (VOID **)&MpService);
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+ if (EFI_ERROR(Status)) {
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+ return Status;
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+ }
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+ PldSmmInfo->S3Info.CpuCount = (UINT32)gSmst->NumberOfCpus;
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+ SmmBaseInfo = &PldSmmInfo->S3Info.SmmBase[0];
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+ for (Index = 0; Index < gSmst->NumberOfCpus; Index++) {
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+ Status = MpService->GetProcessorInfo (MpService, Index, &ProcessorInfo);
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+ if (EFI_ERROR(Status)) {
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+ return Status;
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+ }
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+
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+ SmmBaseInfo->ApicId = (UINT32)(UINTN)ProcessorInfo.ProcessorId;
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+ SmmBaseInfo->SmmBase = (UINT32)(UINTN)gSmst->CpuSaveState[Index] - SMRAM_SAVE_STATE_MAP_OFFSET;
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+ DEBUG ((DEBUG_INFO, "CPU%d ID:%02X Base: %08X\n", Index, SmmBaseInfo->ApicId, SmmBaseInfo->SmmBase));
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+ SmmBaseInfo++;
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+ }
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+
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+ return EFI_SUCCESS;
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+}
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+
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+
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+/**
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+ Get specified SMI register based on given register ID
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+
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+ @param[in] Id The register ID to get.
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+
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+ @retval NULL The register is not found
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+ @return smi register
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+
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+**/
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+PLD_GENERIC_REGISTER *
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+GetRegisterById (
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+ UINT64 Id
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+ )
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+{
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+ UINT32 Index;
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+
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+ for (Index = 0; Index < mSmmRegisterHob->Count; Index++) {
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+ if (mSmmRegisterHob->Registers[Index].Id == Id) {
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+ return &mSmmRegisterHob->Registers[Index];
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+ }
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+ }
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+ return NULL;
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+}
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+
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+/**
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+ Set SMM SMI Global enable lock
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+
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+**/
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+VOID
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+LockSmiGlobalEn (
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+ VOID
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+ )
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+{
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+ PLD_GENERIC_REGISTER *SmiLockReg;
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+
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+ DEBUG ((DEBUG_ERROR, "LockSmiGlobalEn .....\n"));
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+
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+ SmiLockReg = GetRegisterById (REGISTER_ID_SMI_GBL_EN_LOCK);
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+ if (SmiLockReg == NULL) {
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+ DEBUG ((DEBUG_ERROR, "SMI global enable lock reg not found.\n"));
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+ return;
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+ }
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+
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+ //
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+ // Set SMM SMI lock in S3 path
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+ //
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+ if ((SmiLockReg->Address.AccessSize == EFI_ACPI_3_0_DWORD) &&
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+ (SmiLockReg->Address.Address != 0) &&
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+ (SmiLockReg->Address.RegisterBitWidth == 1) &&
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+ (SmiLockReg->Address.AddressSpaceId == EFI_ACPI_3_0_SYSTEM_MEMORY) &&
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+ (SmiLockReg->Value == 1)) {
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+ DEBUG ((DEBUG_ERROR, "LockSmiGlobalEn ....is locked\n"));
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+
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+ MmioOr32 ((UINT32)SmiLockReg->Address.Address, 1 << SmiLockReg->Address.RegisterBitOffset);
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+ } else {
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+ DEBUG ((DEBUG_ERROR, "Unexpected SMM SMI lock register, need enhancement here.\n"));
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+ }
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+}
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+
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+/**
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+ Check and set SMM feature lock bit and code check enable bit
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+ in S3 path.
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+
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+**/
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+VOID
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+SmmFeatureLockOnS3 (
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+ VOID
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+ )
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+{
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+
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+ if (mSmmFeatureControl != 0) {
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+ return;
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+ }
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+
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+ mSmmFeatureControl = AsmReadMsr64(MSR_SMM_FEATURE_CONTROL);
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+ if ((mSmmFeatureControl & 0x5) != 0x5) {
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+ //
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+ // Set Lock bit [BIT0] for this register and SMM code check enable bit [BIT2]
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+ //
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+ AsmWriteMsr64 (MSR_SMM_FEATURE_CONTROL, mSmmFeatureControl | 0x5);
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+ }
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+ mSmmFeatureControl = AsmReadMsr64(MSR_SMM_FEATURE_CONTROL);
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+}
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+
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+
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+
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+/**
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+ Function to program SMRR base and mask.
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+
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+ @param[in] ProcedureArgument Pointer to SMRR_BASE_MASK structure.
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+**/
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+VOID
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+SetSmrr (
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+ IN VOID *ProcedureArgument
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+ )
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+{
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+ if (ProcedureArgument != NULL) {
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+ AsmWriteMsr64 (MSR_IA32_SMRR_PHYSBASE, ((SMRR_BASE_MASK *)ProcedureArgument)->Base);
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+ AsmWriteMsr64 (MSR_IA32_SMRR_PHYSMASK, ((SMRR_BASE_MASK *)ProcedureArgument)->Mask);
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+ }
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+}
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+
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+/**
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+ Set SMRR in S3 path.
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+
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+**/
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+VOID
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+SetSmrrOnS3 (
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+ VOID
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+ )
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+{
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+ EFI_STATUS Status;
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+ SMRR_BASE_MASK Arguments;
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+ UINTN Index;
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+ UINT32 SmmBase;
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+ UINT32 SmmSize;
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+
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+ if ((AsmReadMsr64 (MSR_IA32_SMRR_PHYSBASE) != 0) && ((AsmReadMsr64 (MSR_IA32_SMRR_PHYSMASK) & BIT11) != 0)) {
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+ return;
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+ }
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+
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+ SmmBase = (UINT32)(UINTN)mSmramHob->Descriptor[0].PhysicalStart;
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+ SmmSize = (UINT32)(UINTN)mSmramHob->Descriptor[0].PhysicalSize;
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+ if ((mSmramHob->NumberOfSmmReservedRegions > 2) || (mSmramHob->NumberOfSmmReservedRegions == 0)) {
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+ DEBUG ((DEBUG_ERROR, "%d SMM ranges are not supported.\n", mSmramHob->NumberOfSmmReservedRegions));
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+ return;
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+ } else if (mSmramHob->NumberOfSmmReservedRegions == 2) {
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+ if ((mSmramHob->Descriptor[1].PhysicalStart + mSmramHob->Descriptor[1].PhysicalSize) == SmmBase){
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+ SmmBase = (UINT32)(UINTN)mSmramHob->Descriptor[1].PhysicalStart;
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+ } else if (mSmramHob->Descriptor[1].PhysicalStart != (SmmBase + SmmSize)) {
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+ DEBUG ((DEBUG_ERROR, "Two SMM regions are not continous.\n"));
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+ return;
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+ }
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+ SmmSize += (UINT32)(UINTN)mSmramHob->Descriptor[1].PhysicalSize;
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+ }
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+
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+ if ((SmmBase == 0) || (SmmSize < SIZE_4KB)) {
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+ DEBUG ((DEBUG_ERROR, "Invalid SMM range.\n"));
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+ return ;
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+ }
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+
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+ //
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+ // SMRR size must be of length 2^n
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+ // SMRR base alignment cannot be less than SMRR length
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+ //
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+ if ((SmmSize != GetPowerOfTwo32 (SmmSize)) || ((SmmBase & ~(SmmSize - 1)) != SmmBase)) {
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+ DEBUG ((DEBUG_ERROR, " Invalid SMM range.\n"));
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+ return ;
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+ }
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+
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+ //
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+ // Calculate smrr base, mask and pass them as arguments.
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+ //
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+ Arguments.Base = (SmmSize | MTRR_CACHE_WRITE_BACK);
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+ Arguments.Mask = (~(SmmSize - 1) & EFI_MSR_SMRR_MASK);
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+
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+ //
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+ // Set SMRR valid bit
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+ //
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+ Arguments.Mask |= BIT11;
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+
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+ //
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+ // Program smrr base and mask on BSP first and then on APs
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+ //
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+ SetSmrr(&Arguments);
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+ for (Index = 0; Index < gSmst->NumberOfCpus; Index++) {
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+ if (Index != gSmst->CurrentlyExecutingCpu) {
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+ Status = gSmst->SmmStartupThisAp (SetSmrr, Index, (VOID *)&Arguments);
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+ if (EFI_ERROR(Status)) {
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+ DEBUG ((DEBUG_ERROR, "Programming SMRR on AP# %d status: %r\n", Index, Status));
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+ }
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+ }
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+ }
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+}
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+
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+
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+/**
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+ Software SMI callback for restoring SMRR base and mask in S3 path.
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+
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+ @param[in] DispatchHandle The unique handle assigned to this handler by SmiHandlerRegister().
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+ @param[in] Context Points to an optional handler context which was specified when the
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+ handler was registered.
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+ @param[in, out] CommBuffer A pointer to a collection of data in memory that will
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+ be conveyed from a non-SMM environment into an SMM environment.
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+ @param[in, out] CommBufferSize The size of the CommBuffer.
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+
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+ @retval EFI_SUCCESS The interrupt was handled successfully.
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+
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+**/
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+EFI_STATUS
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+EFIAPI
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+BlSwSmiHandler (
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+ IN EFI_HANDLE DispatchHandle,
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+ IN CONST VOID *Context,
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+ IN OUT VOID *CommBuffer,
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+ IN OUT UINTN *CommBufferSize
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+ )
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+{
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+ SetSmrrOnS3 ();
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+ SmmFeatureLockOnS3 ();
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+ LockSmiGlobalEn ();
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+
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+ return EFI_SUCCESS;
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+}
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+
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+
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+/**
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+ Lock SMI in this SMM ready to lock event.
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+
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+ @param Protocol Points to the protocol's unique identifier
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+ @param Interface Points to the interface instance
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+ @param Handle The handle on which the interface was installed
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+
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+ @retval EFI_SUCCESS SmmEventCallback runs successfully
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+ @retval EFI_NOT_FOUND The Fvb protocol for variable is not found.
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+ **/
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+EFI_STATUS
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+EFIAPI
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+BlSupportSmmReadyToLockCallback (
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+ IN CONST EFI_GUID *Protocol,
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+ IN VOID *Interface,
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+ IN EFI_HANDLE Handle
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+ )
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+{
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+ //
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+ // Set SMM SMI lock
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+ //
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+ LockSmiGlobalEn ();
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+ return EFI_SUCCESS;
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+}
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+
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+
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+/**
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+ The driver's entry point.
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+
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+ @param[in] ImageHandle The firmware allocated handle for the EFI image.
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+ @param[in] SystemTable A pointer to the EFI System Table.
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+
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+ @retval EFI_SUCCESS The entry point is executed successfully.
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+ @retval Others Some error occurs when executing this entry point.
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+
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+**/
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+EFI_STATUS
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+EFIAPI
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+BlSupportSmm (
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+ IN EFI_HANDLE ImageHandle,
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+ IN EFI_SYSTEM_TABLE *SystemTable
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+ )
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+{
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+ EFI_STATUS Status;
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+ EFI_SMM_SW_DISPATCH2_PROTOCOL *SwDispatch;
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+ EFI_SMM_SW_REGISTER_CONTEXT SwContext;
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+ EFI_HANDLE SwHandle;
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+ EFI_HOB_GUID_TYPE *GuidHob;
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+ VOID *SmmHob;
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+ VOID *Registration;
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+
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+ //
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+ // Get SMM S3 communication hob and save it
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+ //
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+ GuidHob = GetFirstGuidHob (&gS3CommunicationGuid);
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+ if (GuidHob != NULL) {
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+ SmmHob = (VOID *) (GET_GUID_HOB_DATA(GuidHob));
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+ CopyMem (&mPldS3Hob, SmmHob, GET_GUID_HOB_DATA_SIZE(GuidHob));
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+ } else {
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+ return EFI_NOT_FOUND;
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+ }
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+
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+ if (mPldS3Hob.PldAcpiS3Enable) {
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+ // Other drivers will take care of S3.
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+ return EFI_SUCCESS;
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+ }
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+
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+ //
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+ // Get smram hob and save it
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+ //
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+ GuidHob = GetFirstGuidHob (&gEfiSmmSmramMemoryGuid);
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+ if (GuidHob != NULL) {
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+ SmmHob = (VOID *) (GET_GUID_HOB_DATA(GuidHob));
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+ mSmramHob = AllocatePool (GET_GUID_HOB_DATA_SIZE(GuidHob));
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+ if (mSmramHob == NULL) {
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+ return EFI_OUT_OF_RESOURCES;
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+ }
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+ CopyMem (mSmramHob, SmmHob, GET_GUID_HOB_DATA_SIZE(GuidHob));
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+ } else {
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+ return EFI_NOT_FOUND;
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+ }
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+
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+ //
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+ // Get SMM register hob and save it
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+ //
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+ GuidHob = GetFirstGuidHob (&gSmmRegisterInfoGuid);
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+ if (GuidHob != NULL) {
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|
+ SmmHob = (VOID *) (GET_GUID_HOB_DATA(GuidHob));
|
|
|
+ mSmmRegisterHob = AllocatePool (GET_GUID_HOB_DATA_SIZE(GuidHob));
|
|
|
+ if (mSmmRegisterHob == NULL) {
|
|
|
+ return EFI_OUT_OF_RESOURCES;
|
|
|
+ }
|
|
|
+ CopyMem (mSmmRegisterHob, SmmHob, GET_GUID_HOB_DATA_SIZE(GuidHob));
|
|
|
+ } else {
|
|
|
+ return EFI_NOT_FOUND;
|
|
|
+ }
|
|
|
+
|
|
|
+ //
|
|
|
+ // Get the Sw dispatch protocol and register SMI handler.
|
|
|
+ //
|
|
|
+ Status = gSmst->SmmLocateProtocol (&gEfiSmmSwDispatch2ProtocolGuid, NULL, (VOID**)&SwDispatch);
|
|
|
+ if (EFI_ERROR (Status)) {
|
|
|
+ return Status;
|
|
|
+ }
|
|
|
+ SwContext.SwSmiInputValue = (UINTN) -1;
|
|
|
+ Status = SwDispatch->Register (SwDispatch, BlSwSmiHandler, &SwContext, &SwHandle);
|
|
|
+ if (EFI_ERROR (Status)) {
|
|
|
+ DEBUG ((DEBUG_ERROR, "Registering S3 smi handler failed: %r\n", Status));
|
|
|
+ return Status;
|
|
|
+ }
|
|
|
+
|
|
|
+ //
|
|
|
+ // Register SMM ready to lock callback
|
|
|
+ //
|
|
|
+ Status = gSmst->SmmRegisterProtocolNotify (
|
|
|
+ &gEfiSmmReadyToLockProtocolGuid,
|
|
|
+ BlSupportSmmReadyToLockCallback,
|
|
|
+ &Registration
|
|
|
+ );
|
|
|
+ ASSERT_EFI_ERROR (Status);
|
|
|
+
|
|
|
+ SaveSmmInfoForS3 ((UINT8)SwContext.SwSmiInputValue);
|
|
|
+
|
|
|
+ return EFI_SUCCESS;
|
|
|
+}
|
|
|
+
|