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@@ -15,41 +15,31 @@
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#
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#------------------------------------------------------------------------------
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-#.INCLUDE "UcodeLoadGcc.inc" - begin
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.equ MSR_IA32_PLATFORM_ID, 0x00000017
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.equ MSR_IA32_BIOS_UPDT_TRIG, 0x00000079
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.equ MSR_IA32_BIOS_SIGN_ID, 0x0000008b
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-Ucode:
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-.equ UcodeVersion, 0x0000
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-.equ UcodeRevision, 0x0004
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-.equ UcodeDate, 0x0008
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-.equ UcodeProcessor, 0x000C
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-.equ UcodeChecksum, 0x0010
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-.equ UcodeLoader, 0x0014
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-.equ UcodeRsvd, 0x0018
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-UcodeEnd:
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-
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-UcodeHdr:
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-.equ UcodeHdrVersion, 0x0000
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-.equ UcodeHdrRevision, 0x0004
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-.equ UcodeHdrDate, 0x0008
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-.equ UcodeHdrProcessor, 0x000c
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-.equ UcodeHdrChecksum, 0x0010
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-.equ UcodeHdrLoader, 0x0014
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-.equ UcodeHdrFlags, 0x0018
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-.equ UcodeHdrDataSize, 0x001C
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-.equ UcodeHdrTotalSize, 0x0020
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-.equ UcodeHdrRsvd, 0x0024
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-UcodeHdrEnd:
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-.equ UcodeHdrLength, 0x0030 # UcodeHdrLength = UcodeHdrEnd - UcodeHdr
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+
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+MicrocodeHdr:
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+.equ MicrocodeHdrVersion, 0x0000
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+.equ MicrocodeHdrRevision, 0x0004
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+.equ MicrocodeHdrDate, 0x0008
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+.equ MicrocodeHdrProcessor, 0x000c
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+.equ MicrocodeHdrChecksum, 0x0010
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+.equ MicrocodeHdrLoader, 0x0014
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+.equ MicrocodeHdrFlags, 0x0018
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+.equ MicrocodeHdrDataSize, 0x001C
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+.equ MicrocodeHdrTotalSize, 0x0020
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+.equ MicrocodeHdrRsvd, 0x0024
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+MicrocodeHdrEnd:
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+.equ MicrocodeHdrLength, 0x0030 # MicrocodeHdrLength = MicrocodeHdrEnd - MicrocodeHdr
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ExtSigHdr:
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.equ ExtSigHdrCount, 0x0000
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.equ ExtSigHdrChecksum, 0x0004
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-.equ rsvd, 0x0008
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+.equ ExtSigHdrRsvd, 0x0008
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ExtSigHdrEnd:
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.equ ExtSigHdrLength, 0x0014 #ExtSigHdrLength = ExtSigHdrEnd - ExtSigHdr
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@@ -60,14 +50,12 @@ ExtSig:
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ExtSigEnd:
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.equ ExtSigLength, 0x000C #ExtSigLength = ExtSigEnd - ExtSig
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-LoadUcodeParams:
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-.equ LoadUcodeParamsUcodeCodeAddr, 0x0000
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-.equ LoadUcodeParamsUcodeCodeSize, 0x0004
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-LoadUcodeParamsEnd:
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+LoadMicrocodeParams:
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+.equ MicrocodeCodeAddr, 0x0000
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+.equ MicrocodeCodeSize, 0x0004
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+LoadMicrocodeParamsEnd:
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-#.INCLUDE "UcodeLoadGcc.inc" - end
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-#.INCLUDE "SaveRestoreSseGcc.inc" - begin
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.macro SAVE_REGS
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pinsrw $0x00, %ebp, %xmm7
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@@ -147,12 +135,68 @@ LoadUcodeParamsEnd:
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.endm
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.macro ENABLE_SSE
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- movl %cr4, %eax
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- orl $0x00000600, %eax # Set OSFXSR bit (bit #9) & OSXMMEXCPT bit (bit #10)
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- movl %eax,%cr4
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+ jmp NextAddress
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+.align 4
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+ #
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+ # Float control word initial value:
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+ # all exceptions masked, double-precision, round-to-nearest
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+ #
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+ASM_PFX(mFpuControlWord): .word 0x027F
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+ #
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+ # Multimedia-extensions control word:
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+ # all exceptions masked, round-to-nearest, flush to zero for masked underflow
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+ #
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+ASM_PFX(mMmxControlWord): .long 0x01F80
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+SseError:
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+ #
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+ # Processor has to support SSE
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+ #
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+ jmp SseError
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+NextAddress:
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+ #
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+ # Initialize floating point units
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+ #
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+ finit
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+ fldcw ASM_PFX(mFpuControlWord)
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+
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+ #
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+ # Use CpuId instructuion (CPUID.01H:EDX.SSE[bit 25] = 1) to test
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+ # whether the processor supports SSE instruction.
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+ #
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+ movl $1, %eax
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+ cpuid
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+ btl $25, %edx
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+ jnc SseError
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+
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+ #
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+ # Set OSFXSR bit (bit #9) & OSXMMEXCPT bit (bit #10)
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+ #
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+ movl %cr4, %eax
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+ orl $BIT9, %eax
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+ movl %eax, %cr4
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+
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+ #
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+ # The processor should support SSE instruction and we can use
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+ # ldmxcsr instruction
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+ #
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+ ldmxcsr ASM_PFX(mMmxControlWord)
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+.endm
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+
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+#Save in ECX-SLOT 3 in xmm6.
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+.macro SAVE_EAX_MICROCODE_RET_STATUS
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+ pinsrw $0x6, %eax, %xmm6
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+ ror $0x10, %eax
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+ pinsrw $0x7, %eax, %xmm6
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+ rol $0x10, %eax
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+.endm
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+
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+#Restore from ECX-SLOT 3 in xmm6.
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+.macro LOAD_EAX_MICROCODE_RET_STATUS
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+ pshufd $0x93, %xmm6, %xmm6
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+ movd %xmm6, %eax
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+ pshufd $0x39, %xmm6, %xmm6
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.endm
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-#.INCLUDE "SaveRestoreSseGcc.inc" - end
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#
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@@ -182,28 +226,6 @@ ASM_GLOBAL ASM_PFX(Pei2LoaderSwitchStack)
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.equ DATA_LEN_OF_MCUD, 0x018
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.equ DATA_LEN_AT_STACK_TOP, (DATA_LEN_OF_PER0 + DATA_LEN_OF_MCUD + 4)
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-#------------------------------------------------------------------------------
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-# FspSelfCheckDefault
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-# Inputs:
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-# eax -> Return address
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-# Outputs:
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-# eax -> 0 - Successful, Non-zero - Failed.
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-# Register Usage:
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-# eax is cleared and ebp is used for return address.
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-# All others reserved.
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-#------------------------------------------------------------------------------
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-ASM_GLOBAL ASM_PFX(FspSelfCheckDefault)
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-ASM_PFX(FspSelfCheckDefault):
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- #
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- # Save return address to EBP
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- #
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- movl %eax, %ebp
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- xorl %eax, %eax
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-
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-FspSelfCheckDefaultExit:
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- jmp *%ebp
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-
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-
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#------------------------------------------------------------------------------
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# SecPlatformInitDefault
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# Inputs:
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@@ -227,10 +249,10 @@ SecPlatformInitDefaultExit:
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#------------------------------------------------------------------------------
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-# LoadUcode
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+# LoadMicrocodeDefault
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#
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# Inputs:
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-# esp -> LOAD_UCODE_PARAMS pointer
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+# esp -> LoadMicrocodeParams pointer
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# Register Usage:
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# esp Preserved
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# All others destroyed
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@@ -239,8 +261,8 @@ SecPlatformInitDefaultExit:
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# Executed by SBSP and NBSP
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# Beginning of microcode update region starts on paragraph boundary
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#------------------------------------------------------------------------------
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-ASM_GLOBAL ASM_PFX(LoadUcode)
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-ASM_PFX(LoadUcode):
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+ASM_GLOBAL ASM_PFX(LoadMicrocodeDefault)
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+ASM_PFX(LoadMicrocodeDefault):
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#
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# Save return address to EBP
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#
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@@ -248,17 +270,17 @@ ASM_PFX(LoadUcode):
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cmpl $0x00, %esp
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jz ParamError
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- movl (%esp), %eax #dword ptr [] Parameter pointer
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+ movl 4(%esp), %eax #dword ptr [] Parameter pointer
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cmpl $0x00, %eax
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jz ParamError
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movl %eax, %esp
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- movl LoadUcodeParamsUcodeCodeAddr(%esp), %esi #mov esi, [esp].LOAD_UCODE_PARAMS.ucode_code_addr
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+ movl MicrocodeCodeAddr(%esp), %esi
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cmpl $0x00, %esi
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jnz CheckMainHeader
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ParamError:
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movl $0x080000002, %eax
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- jmp LoadUcodeExit
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+ jmp LoadMicrocodeExit
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CheckMainHeader:
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#
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@@ -291,68 +313,68 @@ CheckMainHeader:
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# Minimal test checking for header version and loader version as 1
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#
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movl $0x01, %eax
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- cmpl %eax, UcodeHdrVersion(%esi) #cmp [esi].ucode_hdr.version, eax
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+ cmpl %eax, MicrocodeHdrVersion(%esi)
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jne AdvanceFixedSize
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- cmpl %eax, UcodeHdrLoader(%esi) #cmp [esi].ucode_hdr.loader, eax
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+ cmpl %eax, MicrocodeHdrLoader(%esi)
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jne AdvanceFixedSize
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#
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# Check if signature and plaform ID match
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#
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- cmpl UcodeHdrProcessor(%esi), %ebx #cmp ebx, [esi].ucode_hdr.processor
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- jne LoadUcodeL0
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- testl UcodeHdrFlags(%esi), %edx #test edx, [esi].ucode_hdr.flags
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+ cmpl MicrocodeHdrProcessor(%esi), %ebx
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+ jne LoadMicrocodeL0
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+ testl MicrocodeHdrFlags(%esi), %edx
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jnz LoadCheck #Jif signature and platform ID match
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-LoadUcodeL0:
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+LoadMicrocodeL0:
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#
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# Check if extended header exists
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- # First check if total_size and data_size are valid
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+ # First check if MicrocodeHdrTotalSize and MicrocodeHdrDataSize are valid
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#
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xorl %eax, %eax
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- cmpl %eax, UcodeHdrTotalSize(%esi) #cmp [esi].ucode_hdr.total_size, eax
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+ cmpl %eax, MicrocodeHdrTotalSize(%esi)
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je NextMicrocode
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- cmpl %eax, UcodeHdrDataSize(%esi) #cmp [esi].ucode_hdr.data_size, eax
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+ cmpl %eax, MicrocodeHdrDataSize(%esi)
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je NextMicrocode
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#
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# Then verify total size - sizeof header > data size
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#
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- movl UcodeHdrTotalSize(%esi), %ecx #mov ecx, [esi].ucode_hdr.total_size
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- subl $UcodeHdrLength, %ecx #sub ecx, sizeof ucode_hdr
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- cmpl UcodeHdrDataSize(%esi), %ecx #cmp ecx, [esi].ucode_hdr.data_size
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- jle NextMicrocode
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+ movl MicrocodeHdrTotalSize(%esi), %ecx
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+ subl $MicrocodeHdrLength, %ecx
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+ cmpl MicrocodeHdrDataSize(%esi), %ecx
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+ jle NextMicrocode
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#
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# Set edi -> extended header
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#
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movl %esi, %edi
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- addl $UcodeHdrLength, %edi #add edi, sizeof ucode_hdr
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- addl UcodeHdrDataSize(%esi), %edi #add edi, [esi].ucode_hdr.data_size
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+ addl $MicrocodeHdrLength, %edi
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+ addl MicrocodeHdrDataSize(%esi), %edi
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#
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# Get count of extended structures
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#
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- movl ExtSigHdrCount(%edi), %ecx #mov ecx, [edi].ext_sig_hdr.count
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+ movl ExtSigHdrCount(%edi), %ecx
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#
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# Move pointer to first signature structure
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#
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- addl ExtSigHdrLength, %edi #add edi, sizeof ext_sig_hdr
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+ addl ExtSigHdrLength, %edi
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CheckExtSig:
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#
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# Check if extended signature and platform ID match
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#
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- cmpl %ebx, ExtSigProcessor(%edi) #cmp [edi].ext_sig.processor, ebx
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- jne LoadUcodeL1
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- test %edx, ExtSigFlags(%edi) #test [edi].ext_sig.flags, edx
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+ cmpl %ebx, ExtSigProcessor(%edi)
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+ jne LoadMicrocodeL1
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+ test %edx, ExtSigFlags(%edi)
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jnz LoadCheck # Jif signature and platform ID match
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-LoadUcodeL1:
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+LoadMicrocodeL1:
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#
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# Check if any more extended signatures exist
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#
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- addl $ExtSigLength, %edi #add edi, sizeof ext_sig
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+ addl $ExtSigLength, %edi
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loop CheckExtSig
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NextMicrocode:
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@@ -360,11 +382,11 @@ NextMicrocode:
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# Advance just after end of this microcode
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#
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xorl %eax, %eax
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- cmpl %eax, UcodeHdrTotalSize(%esi) #cmp [esi].ucode_hdr.total_size, eax
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- je LoadUcodeL2
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- addl UcodeHdrTotalSize(%esi), %esi #add esi, [esi].ucode_hdr.total_size
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+ cmpl %eax, MicrocodeHdrTotalSize(%esi)
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+ je LoadMicrocodeL2
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+ addl MicrocodeHdrTotalSize(%esi), %esi
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jmp CheckAddress
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-LoadUcodeL2:
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+LoadMicrocodeL2:
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addl $0x800, %esi #add esi, dword ptr 2048
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jmp CheckAddress
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@@ -378,24 +400,24 @@ CheckAddress:
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#
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# Is valid Microcode start point ?
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#
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- cmpl $0x0ffffffff, UcodeHdrVersion(%esi)
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+ cmpl $0x0ffffffff, MicrocodeHdrVersion(%esi)
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#
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# Is automatic size detection ?
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#
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- movl LoadUcodeParamsUcodeCodeSize(%esp), %eax
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+ movl MicrocodeCodeSize(%esp), %eax
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cmpl $0x0ffffffff, %eax
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- jz LoadUcodeL3
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+ jz LoadMicrocodeL3
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#
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# Address >= microcode region address + microcode region size?
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#
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- addl LoadUcodeParamsUcodeCodeAddr(%esp), %eax #mov eax, [esp].LOAD_UCODE_PARAMS.ucode_code_addr
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+ addl MicrocodeCodeAddr(%esp), %eax
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cmpl %eax, %esi
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- jae Done #Jif address is outside of ucode region
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+ jae Done #Jif address is outside of microcode region
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jmp CheckMainHeader
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-LoadUcodeL3:
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+LoadMicrocodeL3:
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LoadCheck:
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#
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# Get the revision of the current microcode update loaded
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@@ -413,10 +435,10 @@ LoadCheck:
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#
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# Verify this microcode update is not already loaded
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#
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- cmpl %edx, UcodeHdrRevision(%esi) #cmp [esi].ucode_hdr.revision, edx
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+ cmpl %edx, MicrocodeHdrRevision(%esi)
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je Continue
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-LoadMicrocode:
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+LoadMicrocode0:
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#
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# EAX contains the linear address of the start of the Update Data
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# EDX contains zero
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@@ -424,7 +446,7 @@ LoadMicrocode:
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# Start microcode load with wrmsr
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#
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movl %esi, %eax
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- addl $UcodeHdrLength, %eax #add eax, sizeof ucode_hdr
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+ addl $MicrocodeHdrLength, %eax
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xorl %edx, %edx
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movl $MSR_IA32_BIOS_UPDT_TRIG, %ecx
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wrmsr
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@@ -441,10 +463,10 @@ Done:
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rdmsr # Get current microcode signature
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xorl %eax, %eax
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cmpl $0x00, %edx
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- jnz LoadUcodeExit
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+ jnz LoadMicrocodeExit
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movl $0x08000000E, %eax
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-LoadUcodeExit:
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+LoadMicrocodeExit:
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jmp *%ebp
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@@ -455,10 +477,10 @@ LoadUcodeExit:
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ASM_GLOBAL ASM_PFX(EstablishStackFsp)
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ASM_PFX(EstablishStackFsp):
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#
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- # Save parameter pointer in edx
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+ # Save parameter pointer in edx
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#
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movl 4(%esp), %edx
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-
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+
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#
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# Enable FSP STACK
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#
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@@ -469,17 +491,9 @@ ASM_PFX(EstablishStackFsp):
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pushl $0x4455434D # Signature of the data region 'MCUD'
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pushl 12(%edx) # Code size
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pushl 8(%edx) # Code base
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- cmpl $0, %edx # Is parameter pointer valid ?
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- jz InvalidMicrocodeRegion
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pushl 4(%edx) # Microcode size
|
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|
pushl (%edx) # Microcode base
|
|
|
- jmp EstablishStackFspExit
|
|
|
|
|
|
-InvalidMicrocodeRegion:
|
|
|
- push $0 # Microcode size
|
|
|
- push $0 # Microcode base
|
|
|
-
|
|
|
-EstablishStackFspExit:
|
|
|
#
|
|
|
# Save API entry/exit timestamp into stack
|
|
|
#
|
|
@@ -495,11 +509,11 @@ EstablishStackFspExit:
|
|
|
|
|
|
#
|
|
|
# Terminator for the data on stack
|
|
|
- #
|
|
|
+ #
|
|
|
push $0x00
|
|
|
|
|
|
#
|
|
|
- # Set ECX/EDX to the bootloader temporary memory range
|
|
|
+ # Set ECX/EDX to the BootLoader temporary memory range
|
|
|
#
|
|
|
movl PcdGet32 (PcdTemporaryRamBase), %ecx
|
|
|
movl %ecx, %edx
|
|
@@ -507,7 +521,7 @@ EstablishStackFspExit:
|
|
|
subl PcdGet32 (PcdFspTemporaryRamSize), %edx
|
|
|
|
|
|
xorl %eax, %eax
|
|
|
-
|
|
|
+
|
|
|
movd %mm7, %esi #RET_ESI
|
|
|
jmp *%esi
|
|
|
|
|
@@ -548,18 +562,12 @@ ASM_PFX(TempRamInitApi):
|
|
|
|
|
|
#
|
|
|
# CPUID/DeviceID check
|
|
|
- #
|
|
|
- movl $TempRamInitApiL0, %eax
|
|
|
- jmp ASM_PFX(FspSelfCheckDefault) # @note: ESP can not be changed.
|
|
|
-TempRamInitApiL0:
|
|
|
- cmpl $0x00, %eax
|
|
|
- jnz NemInitExit
|
|
|
-
|
|
|
- #
|
|
|
- # Sec Platform Init
|
|
|
+ # and Sec Platform Init
|
|
|
#
|
|
|
movl $TempRamInitApiL1, %esi #CALL_MMX SecPlatformInit
|
|
|
- movd %mm7, %esi
|
|
|
+ movd %esi, %mm7
|
|
|
+ .weak ASM_PFX(SecPlatformInit)
|
|
|
+ .set ASM_PFX(SecPlatformInit), ASM_PFX(SecPlatformInitDefault)
|
|
|
jmp ASM_PFX(SecPlatformInit)
|
|
|
TempRamInitApiL1:
|
|
|
cmpl $0x00, %eax
|
|
@@ -569,19 +577,21 @@ TempRamInitApiL1:
|
|
|
# Load microcode
|
|
|
#
|
|
|
LOAD_ESP
|
|
|
- movl $TempRamInitApiL2, %esi #CALL_MMX LoadUcode
|
|
|
- movd %mm7, %esi
|
|
|
- jmp ASM_PFX(LoadUcode)
|
|
|
+ movl $TempRamInitApiL2, %esi #CALL_MMX LoadMicrocode
|
|
|
+ movd %esi, %mm7
|
|
|
+ .weak ASM_PFX(LoadMicrocode)
|
|
|
+ .set ASM_PFX(LoadMicrocode), ASM_PFX(LoadMicrocodeDefault)
|
|
|
+ jmp ASM_PFX(LoadMicrocode)
|
|
|
TempRamInitApiL2:
|
|
|
- cmpl $0x00, %eax
|
|
|
- jnz NemInitExit
|
|
|
+ SAVE_EAX_MICROCODE_RET_STATUS #Save microcode return status in ECX-SLOT 3 in xmm6.
|
|
|
+ #@note If return value eax is not 0, microcode did not load, but continue and attempt to boot from ECX-SLOT 3 in xmm6.
|
|
|
|
|
|
#
|
|
|
# Call Sec CAR Init
|
|
|
#
|
|
|
LOAD_ESP
|
|
|
movl $TempRamInitApiL3, %esi #CALL_MMX SecCarInit
|
|
|
- movd %mm7, %esi
|
|
|
+ movd %esi, %mm7
|
|
|
jmp ASM_PFX(SecCarInit)
|
|
|
TempRamInitApiL3:
|
|
|
cmpl $0x00, %eax
|
|
@@ -592,10 +602,12 @@ TempRamInitApiL3:
|
|
|
#
|
|
|
LOAD_ESP
|
|
|
movl $TempRamInitApiL4, %esi #CALL_MMX EstablishStackFsp
|
|
|
- movd %mm7, %esi
|
|
|
+ movd %esi, %mm7
|
|
|
jmp ASM_PFX(EstablishStackFsp)
|
|
|
TempRamInitApiL4:
|
|
|
|
|
|
+ LOAD_EAX_MICROCODE_RET_STATUS #Restore microcode status if no CAR init error.
|
|
|
+
|
|
|
NemInitExit:
|
|
|
#
|
|
|
# Load EBP, EBX, ESI, EDI & ESP from XMM7 & XMM6
|
|
@@ -603,6 +615,7 @@ NemInitExit:
|
|
|
LOAD_REGS
|
|
|
ret
|
|
|
|
|
|
+
|
|
|
#----------------------------------------------------------------------------
|
|
|
# FspInit API
|
|
|
#
|
|
@@ -743,7 +756,7 @@ FspApiCommonL2:
|
|
|
pushl %eax
|
|
|
|
|
|
#
|
|
|
- # Pass the bootloader stack to SecStartup
|
|
|
+ # Pass the BootLoader stack to SecStartup
|
|
|
#
|
|
|
pushl %edi
|
|
|
|
|
@@ -787,4 +800,3 @@ FspApiCommonL2:
|
|
|
FspApiCommonExit:
|
|
|
ret
|
|
|
|
|
|
-
|