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@@ -1,16 +1,16 @@
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/** @file
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Produces the CPU I/O 2 Protocol.
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-Copyright (c) 2009 - 2017, Intel Corporation. All rights reserved.<BR>
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+Copyright (c) 2009 - 2018, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
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-This program and the accompanying materials
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-are licensed and made available under the terms and conditions of the BSD License
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-which accompanies this distribution. The full text of the license may be found at
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-http://opensource.org/licenses/bsd-license.php
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-
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-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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+This program and the accompanying materials
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+are licensed and made available under the terms and conditions of the BSD License
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+which accompanies this distribution. The full text of the license may be found at
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+http://opensource.org/licenses/bsd-license.php
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+
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+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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@@ -74,16 +74,16 @@ UINT8 mOutStride[] = {
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/**
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Check parameters to a CPU I/O 2 Protocol service request.
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- The I/O operations are carried out exactly as requested. The caller is responsible
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- for satisfying any alignment and I/O width restrictions that a PI System on a
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- platform might require. For example on some platforms, width requests of
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- EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
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+ The I/O operations are carried out exactly as requested. The caller is responsible
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+ for satisfying any alignment and I/O width restrictions that a PI System on a
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+ platform might require. For example on some platforms, width requests of
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+ EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
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be handled by the driver.
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-
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+
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@param[in] MmioOperation TRUE for an MMIO operation, FALSE for I/O Port operation.
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@param[in] Width Signifies the width of the I/O or Memory operation.
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- @param[in] Address The base address of the I/O operation.
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- @param[in] Count The number of I/O operations to perform. The number of
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+ @param[in] Address The base address of the I/O operation.
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+ @param[in] Count The number of I/O operations to perform. The number of
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bytes moved is Width size * Count, starting at Address.
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@param[in] Buffer For read operations, the destination buffer to store the results.
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For write operations, the source buffer from which to write data.
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@@ -92,7 +92,7 @@ UINT8 mOutStride[] = {
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@retval EFI_INVALID_PARAMETER Width is invalid for this PI system.
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@retval EFI_INVALID_PARAMETER Buffer is NULL.
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@retval EFI_UNSUPPORTED The Buffer is not aligned for the given Width.
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- @retval EFI_UNSUPPORTED The address range specified by Address, Width,
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+ @retval EFI_UNSUPPORTED The address range specified by Address, Width,
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and Count is not valid for this PI system.
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**/
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@@ -137,7 +137,7 @@ CpuIoCheckParameter (
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if (!MmioOperation && (Width == EfiCpuIoWidthUint64)) {
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return EFI_INVALID_PARAMETER;
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}
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-
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+
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//
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// Check to see if Address is aligned
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//
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@@ -146,18 +146,18 @@ CpuIoCheckParameter (
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}
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//
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- // Check to see if any address associated with this transfer exceeds the maximum
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+ // Check to see if any address associated with this transfer exceeds the maximum
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// allowed address. The maximum address implied by the parameters passed in is
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// Address + Size * Count. If the following condition is met, then the transfer
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// is not supported.
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//
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// Address + Size * Count > (MmioOperation ? MAX_ADDRESS : MAX_IO_PORT_ADDRESS) + 1
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//
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- // Since MAX_ADDRESS can be the maximum integer value supported by the CPU and Count
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+ // Since MAX_ADDRESS can be the maximum integer value supported by the CPU and Count
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// can also be the maximum integer value supported by the CPU, this range
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// check must be adjusted to avoid all oveflow conditions.
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- //
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- // The following form of the range check is equivalent but assumes that
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+ //
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+ // The following form of the range check is equivalent but assumes that
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// MAX_ADDRESS and MAX_IO_PORT_ADDRESS are of the form (2^n - 1).
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//
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Limit = (MmioOperation ? MAX_ADDRESS : MAX_IO_PORT_ADDRESS);
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@@ -165,7 +165,7 @@ CpuIoCheckParameter (
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if (Address > Limit) {
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return EFI_UNSUPPORTED;
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}
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- } else {
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+ } else {
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MaxCount = RShiftU64 (Limit, Width);
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if (MaxCount < (Count - 1)) {
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return EFI_UNSUPPORTED;
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@@ -189,30 +189,30 @@ CpuIoCheckParameter (
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/**
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Reads memory-mapped registers.
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- The I/O operations are carried out exactly as requested. The caller is responsible
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- for satisfying any alignment and I/O width restrictions that a PI System on a
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- platform might require. For example on some platforms, width requests of
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- EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
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+ The I/O operations are carried out exactly as requested. The caller is responsible
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+ for satisfying any alignment and I/O width restrictions that a PI System on a
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+ platform might require. For example on some platforms, width requests of
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+ EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
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be handled by the driver.
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-
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- If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32,
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- or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for
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+
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+ If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32,
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+ or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for
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each of the Count operations that is performed.
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-
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- If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16,
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- EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is
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- incremented for each of the Count operations that is performed. The read or
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+
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+ If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16,
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+ EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is
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+ incremented for each of the Count operations that is performed. The read or
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write operation is performed Count times on the same Address.
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-
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- If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16,
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- EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is
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- incremented for each of the Count operations that is performed. The read or
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+
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+ If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16,
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+ EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is
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+ incremented for each of the Count operations that is performed. The read or
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write operation is performed Count times from the first element of Buffer.
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-
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+
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@param[in] This A pointer to the EFI_CPU_IO2_PROTOCOL instance.
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@param[in] Width Signifies the width of the I/O or Memory operation.
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- @param[in] Address The base address of the I/O operation.
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- @param[in] Count The number of I/O operations to perform. The number of
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+ @param[in] Address The base address of the I/O operation.
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+ @param[in] Count The number of I/O operations to perform. The number of
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bytes moved is Width size * Count, starting at Address.
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@param[out] Buffer For read operations, the destination buffer to store the results.
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For write operations, the source buffer from which to write data.
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@@ -221,7 +221,7 @@ CpuIoCheckParameter (
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@retval EFI_INVALID_PARAMETER Width is invalid for this PI system.
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@retval EFI_INVALID_PARAMETER Buffer is NULL.
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@retval EFI_UNSUPPORTED The Buffer is not aligned for the given Width.
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- @retval EFI_UNSUPPORTED The address range specified by Address, Width,
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+ @retval EFI_UNSUPPORTED The address range specified by Address, Width,
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and Count is not valid for this PI system.
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**/
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@@ -269,30 +269,30 @@ CpuMemoryServiceRead (
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/**
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Writes memory-mapped registers.
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- The I/O operations are carried out exactly as requested. The caller is responsible
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- for satisfying any alignment and I/O width restrictions that a PI System on a
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- platform might require. For example on some platforms, width requests of
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- EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
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+ The I/O operations are carried out exactly as requested. The caller is responsible
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+ for satisfying any alignment and I/O width restrictions that a PI System on a
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+ platform might require. For example on some platforms, width requests of
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+ EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
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be handled by the driver.
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-
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- If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32,
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- or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for
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+
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+ If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32,
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+ or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for
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each of the Count operations that is performed.
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-
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- If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16,
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- EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is
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- incremented for each of the Count operations that is performed. The read or
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+
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+ If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16,
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+ EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is
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+ incremented for each of the Count operations that is performed. The read or
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write operation is performed Count times on the same Address.
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-
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- If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16,
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- EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is
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- incremented for each of the Count operations that is performed. The read or
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+
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+ If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16,
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+ EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is
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+ incremented for each of the Count operations that is performed. The read or
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write operation is performed Count times from the first element of Buffer.
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-
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+
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@param[in] This A pointer to the EFI_CPU_IO2_PROTOCOL instance.
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@param[in] Width Signifies the width of the I/O or Memory operation.
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- @param[in] Address The base address of the I/O operation.
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- @param[in] Count The number of I/O operations to perform. The number of
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+ @param[in] Address The base address of the I/O operation.
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+ @param[in] Count The number of I/O operations to perform. The number of
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bytes moved is Width size * Count, starting at Address.
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@param[in] Buffer For read operations, the destination buffer to store the results.
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For write operations, the source buffer from which to write data.
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@@ -301,7 +301,7 @@ CpuMemoryServiceRead (
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@retval EFI_INVALID_PARAMETER Width is invalid for this PI system.
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@retval EFI_INVALID_PARAMETER Buffer is NULL.
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@retval EFI_UNSUPPORTED The Buffer is not aligned for the given Width.
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- @retval EFI_UNSUPPORTED The address range specified by Address, Width,
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+ @retval EFI_UNSUPPORTED The address range specified by Address, Width,
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and Count is not valid for this PI system.
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**/
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@@ -349,30 +349,30 @@ CpuMemoryServiceWrite (
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/**
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Reads I/O registers.
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- The I/O operations are carried out exactly as requested. The caller is responsible
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- for satisfying any alignment and I/O width restrictions that a PI System on a
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- platform might require. For example on some platforms, width requests of
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- EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
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+ The I/O operations are carried out exactly as requested. The caller is responsible
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+ for satisfying any alignment and I/O width restrictions that a PI System on a
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+ platform might require. For example on some platforms, width requests of
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+ EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
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be handled by the driver.
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-
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- If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32,
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- or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for
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+
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+ If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32,
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+ or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for
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each of the Count operations that is performed.
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-
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- If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16,
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- EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is
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- incremented for each of the Count operations that is performed. The read or
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+
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+ If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16,
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+ EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is
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+ incremented for each of the Count operations that is performed. The read or
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write operation is performed Count times on the same Address.
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-
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- If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16,
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- EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is
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- incremented for each of the Count operations that is performed. The read or
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+
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+ If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16,
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+ EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is
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+ incremented for each of the Count operations that is performed. The read or
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write operation is performed Count times from the first element of Buffer.
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-
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+
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@param[in] This A pointer to the EFI_CPU_IO2_PROTOCOL instance.
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@param[in] Width Signifies the width of the I/O or Memory operation.
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- @param[in] Address The base address of the I/O operation.
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- @param[in] Count The number of I/O operations to perform. The number of
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+ @param[in] Address The base address of the I/O operation.
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+ @param[in] Count The number of I/O operations to perform. The number of
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bytes moved is Width size * Count, starting at Address.
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@param[out] Buffer For read operations, the destination buffer to store the results.
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For write operations, the source buffer from which to write data.
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@@ -381,7 +381,7 @@ CpuMemoryServiceWrite (
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@retval EFI_INVALID_PARAMETER Width is invalid for this PI system.
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@retval EFI_INVALID_PARAMETER Buffer is NULL.
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@retval EFI_UNSUPPORTED The Buffer is not aligned for the given Width.
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- @retval EFI_UNSUPPORTED The address range specified by Address, Width,
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+ @retval EFI_UNSUPPORTED The address range specified by Address, Width,
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and Count is not valid for this PI system.
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**/
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@@ -453,30 +453,30 @@ CpuIoServiceRead (
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/**
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Write I/O registers.
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- The I/O operations are carried out exactly as requested. The caller is responsible
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- for satisfying any alignment and I/O width restrictions that a PI System on a
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- platform might require. For example on some platforms, width requests of
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- EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
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+ The I/O operations are carried out exactly as requested. The caller is responsible
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+ for satisfying any alignment and I/O width restrictions that a PI System on a
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+ platform might require. For example on some platforms, width requests of
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+ EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
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be handled by the driver.
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-
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- If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32,
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- or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for
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+
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+ If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32,
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+ or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for
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each of the Count operations that is performed.
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-
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- If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16,
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- EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is
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- incremented for each of the Count operations that is performed. The read or
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+
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+ If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16,
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+ EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is
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+ incremented for each of the Count operations that is performed. The read or
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write operation is performed Count times on the same Address.
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-
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- If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16,
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- EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is
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- incremented for each of the Count operations that is performed. The read or
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+
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+ If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16,
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+ EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is
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+ incremented for each of the Count operations that is performed. The read or
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write operation is performed Count times from the first element of Buffer.
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-
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+
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@param[in] This A pointer to the EFI_CPU_IO2_PROTOCOL instance.
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@param[in] Width Signifies the width of the I/O or Memory operation.
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- @param[in] Address The base address of the I/O operation.
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- @param[in] Count The number of I/O operations to perform. The number of
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+ @param[in] Address The base address of the I/O operation.
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+ @param[in] Count The number of I/O operations to perform. The number of
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bytes moved is Width size * Count, starting at Address.
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@param[in] Buffer For read operations, the destination buffer to store the results.
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For write operations, the source buffer from which to write data.
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@@ -485,9 +485,9 @@ CpuIoServiceRead (
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@retval EFI_INVALID_PARAMETER Width is invalid for this PI system.
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@retval EFI_INVALID_PARAMETER Buffer is NULL.
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@retval EFI_UNSUPPORTED The Buffer is not aligned for the given Width.
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- @retval EFI_UNSUPPORTED The address range specified by Address, Width,
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+ @retval EFI_UNSUPPORTED The address range specified by Address, Width,
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and Count is not valid for this PI system.
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-
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+
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**/
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EFI_STATUS
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EFIAPI
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@@ -553,16 +553,16 @@ CpuIoServiceWrite (
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IoWrite32 ((UINTN)Address, *((UINT32 *)Uint8Buffer));
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}
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}
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-
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+
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return EFI_SUCCESS;
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}
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/**
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The user Entry Point for module CpuIo2Dxe. The user code starts with this function.
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- @param[in] ImageHandle The firmware allocated handle for the EFI image.
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+ @param[in] ImageHandle The firmware allocated handle for the EFI image.
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@param[in] SystemTable A pointer to the EFI System Table.
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-
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+
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@retval EFI_SUCCESS The entry point is executed successfully.
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@retval other Some error occurs when executing this entry point.
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