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@@ -71,7 +71,7 @@ CHAR8 *gLdmStack[] = {
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#define SIGN(_U) ((_U) ? "" : "-")
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-#define WRITE(_W) ((_W) ? "!" : "")
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+#define WRITE(_Write) ((_Write) ? "!" : "")
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#define BYTE(_B) ((_B) ? "B":"")
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#define USER(_B) ((_B) ? "^" : "")
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@@ -159,23 +159,24 @@ DisassembleArmInstruction (
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)
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{
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UINT32 OpCode;
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- CHAR8 *Type, *Root;
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- BOOLEAN I, P, U, B, W, L, S, H;
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+ CHAR8 *Type;
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+ CHAR8 *Root;
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+ BOOLEAN Imm, Pre, Up, WriteBack, Write, Load, Sign, Half;
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UINT32 Rn, Rd, Rm;
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- UINT32 imode, offset_8, offset_12;
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+ UINT32 IMod, Offset8, Offset12;
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UINT32 Index;
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- UINT32 shift_imm, shift;
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+ UINT32 ShiftImm, Shift;
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OpCode = **OpCodePtr;
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- I = (OpCode & BIT25) == BIT25;
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- P = (OpCode & BIT24) == BIT24;
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- U = (OpCode & BIT23) == BIT23;
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- B = (OpCode & BIT22) == BIT22; // Also called S
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- W = (OpCode & BIT21) == BIT21;
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- L = (OpCode & BIT20) == BIT20;
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- S = (OpCode & BIT6) == BIT6;
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- H = (OpCode & BIT5) == BIT5;
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+ Imm = (OpCode & BIT25) == BIT25; // I
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+ Pre = (OpCode & BIT24) == BIT24; // P
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+ Up = (OpCode & BIT23) == BIT23; // U
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+ WriteBack = (OpCode & BIT22) == BIT22; // B, also called S
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+ Write = (OpCode & BIT21) == BIT21; // W
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+ Load = (OpCode & BIT20) == BIT20; // L
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+ Sign = (OpCode & BIT6) == BIT6; // S
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+ Half = (OpCode & BIT5) == BIT5; // H
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Rn = (OpCode >> 16) & 0xf;
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Rd = (OpCode >> 12) & 0xf;
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Rm = (OpCode & 0xf);
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@@ -189,7 +190,7 @@ DisassembleArmInstruction (
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// LDREX, STREX
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if ((OpCode & 0x0fe000f0) == 0x01800090) {
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- if (L) {
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+ if (Load) {
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// A4.1.27 LDREX{<cond>} <Rd>, [<Rn>]
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AsciiSPrint (Buf, Size, "LDREX%a %a, [%a]", COND (OpCode), gReg[Rd], gReg[Rn]);
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} else {
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@@ -201,89 +202,89 @@ DisassembleArmInstruction (
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// LDM/STM
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if ((OpCode & 0x0e000000) == 0x08000000) {
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- if (L) {
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+ if (Load) {
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// A4.1.20 LDM{<cond>}<addressing_mode> <Rn>{!}, <registers>
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// A4.1.21 LDM{<cond>}<addressing_mode> <Rn>, <registers_without_pc>^
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// A4.1.22 LDM{<cond>}<addressing_mode> <Rn>{!}, <registers_and_pc>^
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- AsciiSPrint (Buf, Size, "LDM%a%a, %a%a, %a", COND (OpCode), LDM_EXT (Rn ,(OpCode >> 23) & 3), gReg[Rn], WRITE (W), MRegList (OpCode), USER (B));
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+ AsciiSPrint (Buf, Size, "LDM%a%a, %a%a, %a", COND (OpCode), LDM_EXT (Rn ,(OpCode >> 23) & 3), gReg[Rn], WRITE (Write), MRegList (OpCode), USER (WriteBack));
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} else {
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// A4.1.97 STM{<cond>}<addressing_mode> <Rn>{!}, <registers>
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// A4.1.98 STM{<cond>}<addressing_mode> <Rn>, <registers>^
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- AsciiSPrint (Buf, Size, "STM%a%a, %a%a, %a", COND (OpCode), LDM_EXT (Rn ,(OpCode >> 23) & 3), gReg[Rn], WRITE (W), MRegList (OpCode), USER (B));
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+ AsciiSPrint (Buf, Size, "STM%a%a, %a%a, %a", COND (OpCode), LDM_EXT (Rn ,(OpCode >> 23) & 3), gReg[Rn], WRITE (Write), MRegList (OpCode), USER (WriteBack));
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}
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return;
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}
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// LDR/STR Address Mode 2
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if ( ((OpCode & 0x0c000000) == 0x04000000) || ((OpCode & 0xfd70f000 ) == 0xf550f000) ) {
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- offset_12 = OpCode & 0xfff;
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+ Offset12 = OpCode & 0xfff;
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if ((OpCode & 0xfd70f000 ) == 0xf550f000) {
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Index = AsciiSPrint (Buf, Size, "PLD");
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} else {
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- Index = AsciiSPrint (Buf, Size, "%a%a%a%a %a, ", L ? "LDR" : "STR", COND (OpCode), BYTE (B), (!(P) && W) ? "T":"", gReg[Rd]);
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+ Index = AsciiSPrint (Buf, Size, "%a%a%a%a %a, ", Load ? "LDR" : "STR", COND (OpCode), BYTE (WriteBack), (!(Pre) && Write) ? "T":"", gReg[Rd]);
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}
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- if (P) {
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- if (!I) {
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+ if (Pre) {
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+ if (!Imm) {
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// A5.2.2 [<Rn>, #+/-<offset_12>]
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// A5.2.5 [<Rn>, #+/-<offset_12>]
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- AsciiSPrint (&Buf[Index], Size - Index, "[%a, #%a0x%x]%a", gReg[Rn], SIGN (U), offset_12, WRITE (W));
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+ AsciiSPrint (&Buf[Index], Size - Index, "[%a, #%a0x%x]%a", gReg[Rn], SIGN (Up), Offset12, WRITE (Write));
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} else if ((OpCode & 0x03000ff0) == 0x03000000) {
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// A5.2.3 [<Rn>, +/-<Rm>]
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// A5.2.6 [<Rn>, +/-<Rm>]!
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- AsciiSPrint (&Buf[Index], Size - Index, "[%a, #%a%a]%a", gReg[Rn], SIGN (U), WRITE (W));
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+ AsciiSPrint (&Buf[Index], Size - Index, "[%a, #%a%a]%a", gReg[Rn], SIGN (Up), WRITE (Write));
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} else {
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// A5.2.4 [<Rn>, +/-<Rm>, LSL #<shift_imm>]
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// A5.2.7 [<Rn>, +/-<Rm>, LSL #<shift_imm>]!
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- shift_imm = (OpCode >> 7) & 0x1f;
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- shift = (OpCode >> 5) & 0x3;
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- if (shift == 0x0) {
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+ ShiftImm = (OpCode >> 7) & 0x1f;
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+ Shift = (OpCode >> 5) & 0x3;
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+ if (Shift == 0x0) {
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Type = "LSL";
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- } else if (shift == 0x1) {
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+ } else if (Shift == 0x1) {
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Type = "LSR";
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- if (shift_imm == 0) {
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- shift_imm = 32;
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+ if (ShiftImm == 0) {
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+ ShiftImm = 32;
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}
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- } else if (shift == 0x2) {
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+ } else if (Shift == 0x2) {
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Type = "ASR";
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- } else if (shift_imm == 0) {
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- AsciiSPrint (&Buf[Index], Size - Index, "[%a, #%a%a, %a, RRX]%a", gReg[Rn], SIGN (U), gReg[Rm], WRITE (W));
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+ } else if (ShiftImm == 0) {
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+ AsciiSPrint (&Buf[Index], Size - Index, "[%a, #%a%a, %a, RRX]%a", gReg[Rn], SIGN (Up), gReg[Rm], WRITE (Write));
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return;
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} else {
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Type = "ROR";
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}
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- AsciiSPrint (&Buf[Index], Size - Index, "[%a, #%a%a, %a, #%d]%a", gReg[Rn], SIGN (U), gReg[Rm], Type, shift_imm, WRITE (W));
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+ AsciiSPrint (&Buf[Index], Size - Index, "[%a, #%a%a, %a, #%d]%a", gReg[Rn], SIGN (Up), gReg[Rm], Type, ShiftImm, WRITE (Write));
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}
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- } else { // !P
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- if (!I) {
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+ } else { // !Pre
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+ if (!Imm) {
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// A5.2.8 [<Rn>], #+/-<offset_12>
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- AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a0x%x", gReg[Rn], SIGN (U), offset_12);
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+ AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a0x%x", gReg[Rn], SIGN (Up), Offset12);
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} else if ((OpCode & 0x03000ff0) == 0x03000000) {
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// A5.2.9 [<Rn>], +/-<Rm>
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- AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a%a", gReg[Rn], SIGN (U), gReg[Rm]);
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+ AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a%a", gReg[Rn], SIGN (Up), gReg[Rm]);
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} else {
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// A5.2.10 [<Rn>], +/-<Rm>, LSL #<shift_imm>
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- shift_imm = (OpCode >> 7) & 0x1f;
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- shift = (OpCode >> 5) & 0x3;
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+ ShiftImm = (OpCode >> 7) & 0x1f;
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+ Shift = (OpCode >> 5) & 0x3;
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- if (shift == 0x0) {
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+ if (Shift == 0x0) {
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Type = "LSL";
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- } else if (shift == 0x1) {
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+ } else if (Shift == 0x1) {
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Type = "LSR";
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- if (shift_imm == 0) {
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- shift_imm = 32;
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+ if (ShiftImm == 0) {
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+ ShiftImm = 32;
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}
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- } else if (shift == 0x2) {
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+ } else if (Shift == 0x2) {
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Type = "ASR";
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- } else if (shift_imm == 0) {
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- AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a%a, %a, RRX", gReg[Rn], SIGN (U), gReg[Rm]);
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+ } else if (ShiftImm == 0) {
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+ AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a%a, %a, RRX", gReg[Rn], SIGN (Up), gReg[Rm]);
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// FIx me
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return;
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} else {
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Type = "ROR";
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}
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- AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a%a, %a, #%d", gReg[Rn], SIGN (U), gReg[Rm], Type, shift_imm);
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+ AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a%a, %a, #%d", gReg[Rn], SIGN (Up), gReg[Rm], Type, ShiftImm);
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}
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}
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return;
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@@ -292,18 +293,18 @@ DisassembleArmInstruction (
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if ((OpCode & 0x0e000000) == 0x00000000) {
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// LDR/STR address mode 3
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// LDR|STR{<cond>}H|SH|SB|D <Rd>, <addressing_mode>
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- if (L) {
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- if (!S) {
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+ if (Load) {
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+ if (!Sign) {
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Root = "LDR%aH %a, ";
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- } else if (!H) {
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+ } else if (!Half) {
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Root = "LDR%aSB %a, ";
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} else {
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Root = "LDR%aSH %a, ";
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}
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} else {
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- if (!S) {
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+ if (!Sign) {
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Root = "STR%aH %a ";
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- } else if (!H) {
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+ } else if (!Half) {
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Root = "LDR%aD %a ";
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} else {
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Root = "STR%aD %a ";
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@@ -312,28 +313,28 @@ DisassembleArmInstruction (
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Index = AsciiSPrint (Buf, Size, Root, COND (OpCode), gReg[Rd]);
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- S = (OpCode & BIT6) == BIT6;
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- H = (OpCode & BIT5) == BIT5;
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- offset_8 = ((OpCode >> 4) | (OpCode * 0xf)) & 0xff;
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- if (P & !W) {
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+ Sign = (OpCode & BIT6) == BIT6;
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+ Half = (OpCode & BIT5) == BIT5;
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+ Offset8 = ((OpCode >> 4) | (OpCode * 0xf)) & 0xff;
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+ if (Pre & !Write) {
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// Immediate offset/index
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- if (B) {
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+ if (WriteBack) {
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// A5.3.2 [<Rn>, #+/-<offset_8>]
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// A5.3.4 [<Rn>, #+/-<offset_8>]!
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- AsciiSPrint (&Buf[Index], Size - Index, "[%a, #%a%d]%a", gReg[Rn], SIGN (U), offset_8, WRITE (W));
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+ AsciiSPrint (&Buf[Index], Size - Index, "[%a, #%a%d]%a", gReg[Rn], SIGN (Up), Offset8, WRITE (Write));
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} else {
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// A5.3.3 [<Rn>, +/-<Rm>]
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// A5.3.5 [<Rn>, +/-<Rm>]!
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- AsciiSPrint (&Buf[Index], Size - Index, "[%a, #%a%]a", gReg[Rn], SIGN (U), gReg[Rm], WRITE (W));
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+ AsciiSPrint (&Buf[Index], Size - Index, "[%a, #%a%]a", gReg[Rn], SIGN (Up), gReg[Rm], WRITE (Write));
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}
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} else {
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// Register offset/index
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- if (B) {
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+ if (WriteBack) {
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// A5.3.6 [<Rn>], #+/-<offset_8>
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- AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a%d", gReg[Rn], SIGN (U), offset_8);
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+ AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a%d", gReg[Rn], SIGN (Up), Offset8);
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} else {
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// A5.3.7 [<Rn>], +/-<Rm>
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- AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a%a", gReg[Rn], SIGN (U), gReg[Rm]);
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+ AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a%a", gReg[Rn], SIGN (Up), gReg[Rm]);
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}
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}
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return;
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@@ -342,19 +343,19 @@ DisassembleArmInstruction (
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if ((OpCode & 0x0fb000f0) == 0x01000050) {
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// A4.1.108 SWP SWP{<cond>}B <Rd>, <Rm>, [<Rn>]
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// A4.1.109 SWPB SWP{<cond>}B <Rd>, <Rm>, [<Rn>]
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- AsciiSPrint (Buf, Size, "SWP%a%a %a, %a, [%a]", COND (OpCode), BYTE (B), gReg[Rd], gReg[Rm], gReg[Rn]);
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+ AsciiSPrint (Buf, Size, "SWP%a%a %a, %a, [%a]", COND (OpCode), BYTE (WriteBack), gReg[Rd], gReg[Rm], gReg[Rn]);
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return;
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}
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if ((OpCode & 0xfe5f0f00) == 0xf84d0500) {
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// A4.1.90 SRS SRS<addressing_mode> #<mode>{!}
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- AsciiSPrint (Buf, Size, "SRS%a #0x%x%a", gLdmStack[(OpCode >> 23) & 3], OpCode & 0x1f, WRITE (W));
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+ AsciiSPrint (Buf, Size, "SRS%a #0x%x%a", gLdmStack[(OpCode >> 23) & 3], OpCode & 0x1f, WRITE (Write));
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return;
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}
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if ((OpCode & 0xfe500f00) == 0xf8100500) {
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// A4.1.59 RFE<addressing_mode> <Rn>{!}
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- AsciiSPrint (Buf, Size, "RFE%a %a", gLdmStack[(OpCode >> 23) & 3], gReg[Rn], WRITE (W));
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+ AsciiSPrint (Buf, Size, "RFE%a %a", gLdmStack[(OpCode >> 23) & 3], gReg[Rn], WRITE (Write));
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return;
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}
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@@ -369,9 +370,9 @@ DisassembleArmInstruction (
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if (((OpCode >> 6) & 0x7) == 0) {
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AsciiSPrint (Buf, Size, "CPS #0x%x", (OpCode & 0x2f));
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} else {
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- imode = (OpCode >> 18) & 0x3;
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+ IMod = (OpCode >> 18) & 0x3;
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Index = AsciiSPrint (Buf, Size, "CPS%a %a%a%a",
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- (imode == 3) ? "ID":"IE",
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+ (IMod == 3) ? "ID":"IE",
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((OpCode & BIT8) != 0) ? "A":"",
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((OpCode & BIT7) != 0) ? "I":"",
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((OpCode & BIT6) != 0) ? "F":"");
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@@ -390,19 +391,19 @@ DisassembleArmInstruction (
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if ((OpCode & 0x0fb00000) == 0x01000000) {
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// A4.1.38 MRS{<cond>} <Rd>, CPSR MRS{<cond>} <Rd>, SPSR
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- AsciiSPrint (Buf, Size, "MRS%a %a, %a", COND (OpCode), gReg[Rd], B ? "SPSR" : "CPSR");
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+ AsciiSPrint (Buf, Size, "MRS%a %a, %a", COND (OpCode), gReg[Rd], WriteBack ? "SPSR" : "CPSR");
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return;
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}
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if ((OpCode & 0x0db00000) == 0x01200000) {
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// A4.1.38 MSR{<cond>} CPSR_<fields>, #<immediate> MSR{<cond>} CPSR_<fields>, <Rm>
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- if (I) {
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+ if (Imm) {
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// MSR{<cond>} CPSR_<fields>, #<immediate>
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- AsciiSPrint (Buf, Size, "MRS%a %a_%a, #0x%x", COND (OpCode), B ? "SPSR" : "CPSR", FieldMask ((OpCode >> 16) & 0xf), RotateRight (OpCode & 0xf, ((OpCode >> 8) & 0xf) *2));
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+ AsciiSPrint (Buf, Size, "MRS%a %a_%a, #0x%x", COND (OpCode), WriteBack ? "SPSR" : "CPSR", FieldMask ((OpCode >> 16) & 0xf), RotateRight (OpCode & 0xf, ((OpCode >> 8) & 0xf) *2));
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} else {
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// MSR{<cond>} CPSR_<fields>, <Rm>
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- AsciiSPrint (Buf, Size, "MRS%a %a_%a, %a", COND (OpCode), B ? "SPSR" : "CPSR", gReg[Rd]);
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+ AsciiSPrint (Buf, Size, "MRS%a %a_%a, %a", COND (OpCode), WriteBack ? "SPSR" : "CPSR", gReg[Rd]);
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}
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return;
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}
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@@ -416,35 +417,35 @@ DisassembleArmInstruction (
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if ((OpCode & 0x0e000000) == 0x0c000000) {
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// A4.1.19 LDC and A4.1.96 SDC
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if ((OpCode & 0xf0000000) == 0xf0000000) {
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- Index = AsciiSPrint (Buf, Size, "%a2 0x%x, CR%d, ", L ? "LDC":"SDC", (OpCode >> 8) & 0xf, Rd);
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+ Index = AsciiSPrint (Buf, Size, "%a2 0x%x, CR%d, ", Load ? "LDC":"SDC", (OpCode >> 8) & 0xf, Rd);
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} else {
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- Index = AsciiSPrint (Buf, Size, "%a%a 0x%x, CR%d, ", L ? "LDC":"SDC", COND (OpCode), (OpCode >> 8) & 0xf, Rd);
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+ Index = AsciiSPrint (Buf, Size, "%a%a 0x%x, CR%d, ", Load ? "LDC":"SDC", COND (OpCode), (OpCode >> 8) & 0xf, Rd);
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}
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- if (!P) {
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- if (!W) {
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+ if (!Pre) {
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+ if (!Write) {
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// A5.5.5.5 [<Rn>], <option>
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AsciiSPrint (&Buf[Index], Size - Index, "[%a], {0x%x}", gReg[Rn], OpCode & 0xff);
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} else {
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// A.5.5.4 [<Rn>], #+/-<offset_8>*4
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- AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a0x%x*4", gReg[Rn], SIGN (U), OpCode & 0xff);
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+ AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a0x%x*4", gReg[Rn], SIGN (Up), OpCode & 0xff);
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}
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} else {
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// A5.5.5.2 [<Rn>, #+/-<offset_8>*4 ]!
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- AsciiSPrint (&Buf[Index], Size - Index, "[%a, #%a0x%x*4]%a", gReg[Rn], SIGN (U), OpCode & 0xff, WRITE (W));
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+ AsciiSPrint (&Buf[Index], Size - Index, "[%a, #%a0x%x*4]%a", gReg[Rn], SIGN (Up), OpCode & 0xff, WRITE (Write));
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}
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}
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if ((OpCode & 0x0f000010) == 0x0e000010) {
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// A4.1.32 MRC2, MCR2
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- AsciiSPrint (Buf, Size, "%a%a 0x%x, 0x%x, %a, CR%d, CR%d, 0x%x", L ? "MRC":"MCR", COND (OpCode), (OpCode >> 8) & 0xf, (OpCode >> 20) & 0xf, gReg[Rd], Rn, Rm, (OpCode >> 5) &0x7);
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+ AsciiSPrint (Buf, Size, "%a%a 0x%x, 0x%x, %a, CR%d, CR%d, 0x%x", Load ? "MRC":"MCR", COND (OpCode), (OpCode >> 8) & 0xf, (OpCode >> 20) & 0xf, gReg[Rd], Rn, Rm, (OpCode >> 5) &0x7);
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return;
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}
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if ((OpCode & 0x0ff00000) == 0x0c400000) {
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// A4.1.33 MRRC2, MCRR2
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- AsciiSPrint (Buf, Size, "%a%a 0x%x, 0x%x, %a, %a, CR%d", L ? "MRRC":"MCRR", COND (OpCode), (OpCode >> 4) & 0xf, (OpCode >> 20) & 0xf, gReg[Rd], gReg[Rn], Rm);
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+ AsciiSPrint (Buf, Size, "%a%a 0x%x, 0x%x, %a, %a, CR%d", Load ? "MRRC":"MCRR", COND (OpCode), (OpCode >> 4) & 0xf, (OpCode >> 20) & 0xf, gReg[Rd], gReg[Rn], Rm);
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return;
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}
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