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MdePkg/BaseLib: Remove .S files for IA32 and X64 arch

.nasm file has been added for X86 arch. .S assembly code
is not required any more.
https://bugzilla.tianocore.org/show_bug.cgi?id=1594

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Shenglei Zhang <shenglei.zhang@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Shenglei Zhang 5 年之前
父节点
当前提交
1ee58b7103
共有 39 个文件被更改,包括 0 次插入2412 次删除
  1. 0 38
      MdePkg/Library/BaseLib/BaseLib.inf
  2. 0 43
      MdePkg/Library/BaseLib/Ia32/ARShiftU64.S
  3. 0 63
      MdePkg/Library/BaseLib/Ia32/CpuId.S
  4. 0 67
      MdePkg/Library/BaseLib/Ia32/CpuIdEx.S
  5. 0 39
      MdePkg/Library/BaseLib/Ia32/DisableCache.S
  6. 0 52
      MdePkg/Library/BaseLib/Ia32/DisablePaging32.S
  7. 0 41
      MdePkg/Library/BaseLib/Ia32/DivU64x32.S
  8. 0 46
      MdePkg/Library/BaseLib/Ia32/DivU64x32Remainder.S
  9. 0 89
      MdePkg/Library/BaseLib/Ia32/DivU64x64Remainder.S
  10. 0 39
      MdePkg/Library/BaseLib/Ia32/EnableCache.S
  11. 0 36
      MdePkg/Library/BaseLib/Ia32/EnableDisableInterrupts.S
  12. 0 52
      MdePkg/Library/BaseLib/Ia32/EnablePaging32.S
  13. 0 63
      MdePkg/Library/BaseLib/Ia32/EnablePaging64.S
  14. 0 48
      MdePkg/Library/BaseLib/Ia32/InternalSwitchStack.S
  15. 0 48
      MdePkg/Library/BaseLib/Ia32/LRotU64.S
  16. 0 43
      MdePkg/Library/BaseLib/Ia32/LShiftU64.S
  17. 0 41
      MdePkg/Library/BaseLib/Ia32/LongJump.S
  18. 0 40
      MdePkg/Library/BaseLib/Ia32/ModU64x32.S
  19. 0 40
      MdePkg/Library/BaseLib/Ia32/Monitor.S
  20. 0 41
      MdePkg/Library/BaseLib/Ia32/MultU64x32.S
  21. 0 44
      MdePkg/Library/BaseLib/Ia32/MultU64x64.S
  22. 0 38
      MdePkg/Library/BaseLib/Ia32/Mwait.S
  23. 0 48
      MdePkg/Library/BaseLib/Ia32/RRotU64.S
  24. 0 46
      MdePkg/Library/BaseLib/Ia32/RShiftU64.S
  25. 0 80
      MdePkg/Library/BaseLib/Ia32/RdRand.S
  26. 0 44
      MdePkg/Library/BaseLib/Ia32/SetJump.S
  27. 0 38
      MdePkg/Library/BaseLib/Ia32/SwapBytes64.S
  28. 0 222
      MdePkg/Library/BaseLib/Ia32/Thunk16.S
  29. 0 60
      MdePkg/Library/BaseLib/X64/CpuId.S
  30. 0 62
      MdePkg/Library/BaseLib/X64/CpuIdEx.S
  31. 0 39
      MdePkg/Library/BaseLib/X64/DisableCache.S
  32. 0 82
      MdePkg/Library/BaseLib/X64/DisablePaging64.S
  33. 0 39
      MdePkg/Library/BaseLib/X64/EnableCache.S
  34. 0 36
      MdePkg/Library/BaseLib/X64/EnableDisableInterrupts.S
  35. 0 54
      MdePkg/Library/BaseLib/X64/LongJump.S
  36. 0 72
      MdePkg/Library/BaseLib/X64/RdRand.S
  37. 0 53
      MdePkg/Library/BaseLib/X64/SetJump.S
  38. 0 52
      MdePkg/Library/BaseLib/X64/SwitchStack.S
  39. 0 334
      MdePkg/Library/BaseLib/X64/Thunk16.S

+ 0 - 38
MdePkg/Library/BaseLib/BaseLib.inf

@@ -260,62 +260,35 @@
 
   Ia32/GccInline.c | GCC
   Ia32/Thunk16.nasm | GCC
-  Ia32/Thunk16.S | XCODE
   Ia32/EnableDisableInterrupts.nasm| GCC
-  Ia32/EnableDisableInterrupts.S | GCC
   Ia32/EnablePaging64.nasm| GCC
-  Ia32/EnablePaging64.S | GCC
   Ia32/DisablePaging32.nasm| GCC
-  Ia32/DisablePaging32.S | GCC
   Ia32/EnablePaging32.nasm| GCC
-  Ia32/EnablePaging32.S | GCC
   Ia32/Mwait.nasm| GCC
-  Ia32/Mwait.S | GCC
   Ia32/Monitor.nasm| GCC
-  Ia32/Monitor.S | GCC
   Ia32/CpuIdEx.nasm| GCC
-  Ia32/CpuIdEx.S | GCC
   Ia32/CpuId.nasm| GCC
-  Ia32/CpuId.S | GCC
   Ia32/LongJump.nasm| GCC
-  Ia32/LongJump.S | GCC
   Ia32/SetJump.nasm| GCC
-  Ia32/SetJump.S | GCC
   Ia32/SwapBytes64.nasm| GCC
-  Ia32/SwapBytes64.S | GCC
   Ia32/DivU64x64Remainder.nasm| GCC
-  Ia32/DivU64x64Remainder.S | GCC
   Ia32/DivU64x32Remainder.nasm| GCC
-  Ia32/DivU64x32Remainder.S | GCC
   Ia32/ModU64x32.nasm| GCC
-  Ia32/ModU64x32.S | GCC
   Ia32/DivU64x32.nasm| GCC
-  Ia32/DivU64x32.S | GCC
   Ia32/MultU64x64.nasm| GCC
-  Ia32/MultU64x64.S | GCC
   Ia32/MultU64x32.nasm| GCC
-  Ia32/MultU64x32.S | GCC
   Ia32/RRotU64.nasm| GCC
-  Ia32/RRotU64.S | GCC
   Ia32/LRotU64.nasm| GCC
-  Ia32/LRotU64.S | GCC
   Ia32/ARShiftU64.nasm| GCC
-  Ia32/ARShiftU64.S | GCC
   Ia32/RShiftU64.nasm| GCC
-  Ia32/RShiftU64.S | GCC
   Ia32/LShiftU64.nasm| GCC
-  Ia32/LShiftU64.S | GCC
   Ia32/EnableCache.nasm| GCC
-  Ia32/EnableCache.S | GCC
   Ia32/DisableCache.nasm| GCC
-  Ia32/DisableCache.S | GCC
   Ia32/RdRand.nasm| GCC
-  Ia32/RdRand.S | GCC
 
   Ia32/DivS64x64Remainder.c
   Ia32/InternalSwitchStack.c | MSFT
   Ia32/InternalSwitchStack.c | INTEL
-  Ia32/InternalSwitchStack.S | GCC
   Ia32/InternalSwitchStack.nasm | GCC
   Ia32/Non-existing.c
   Unaligned.c
@@ -518,27 +491,16 @@
   X86PatchInstruction.c
   X86SpeculationBarrier.c
   X64/GccInline.c | GCC
-  X64/Thunk16.S | XCODE
   X64/SwitchStack.nasm| GCC
-  X64/SwitchStack.S | GCC
   X64/SetJump.nasm| GCC
-  X64/SetJump.S | GCC
   X64/LongJump.nasm| GCC
-  X64/LongJump.S | GCC
   X64/EnableDisableInterrupts.nasm| GCC
-  X64/EnableDisableInterrupts.S | GCC
   X64/DisablePaging64.nasm| GCC
-  X64/DisablePaging64.S | GCC
   X64/CpuId.nasm| GCC
-  X64/CpuId.S | GCC
   X64/CpuIdEx.nasm| GCC
-  X64/CpuIdEx.S | GCC
   X64/EnableCache.nasm| GCC
-  X64/EnableCache.S | GCC
   X64/DisableCache.nasm| GCC
-  X64/DisableCache.S | GCC
   X64/RdRand.nasm| GCC
-  X64/RdRand.S | GCC
   ChkStkGcc.c  | GCC
 
 [Sources.EBC]

+ 0 - 43
MdePkg/Library/BaseLib/Ia32/ARShiftU64.S

@@ -1,43 +0,0 @@
-#------------------------------------------------------------------------------
-#
-# Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution.  The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php.
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-# Module Name:
-#
-#   ARShiftU64.S
-#
-# Abstract:
-#
-#   64-bit arithmetic right shift function for IA-32
-#
-#------------------------------------------------------------------------------
-
-ASM_GLOBAL ASM_PFX(InternalMathARShiftU64)
-
-#------------------------------------------------------------------------------
-# UINT64
-# EFIAPI
-# InternalMathARShiftU64 (
-#   IN      UINT64                    Operand,
-#   IN      UINTN                     Count
-#   );
-#------------------------------------------------------------------------------
-ASM_PFX(InternalMathARShiftU64):
-    movb    12(%esp), %cl
-    movl    8(%esp), %eax
-    cltd
-    testb   $32, %cl
-    jnz     L0
-    movl    %eax, %edx
-    movl    4(%esp), %eax
-L0:
-    shrdl   %cl, %edx, %eax
-    sar     %cl, %edx
-    ret

+ 0 - 63
MdePkg/Library/BaseLib/Ia32/CpuId.S

@@ -1,63 +0,0 @@
-#------------------------------------------------------------------------------
-#
-# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution.  The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php.
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-# Module Name:
-#
-#   CpuId.S
-#
-# Abstract:
-#
-#   AsmCpuid function
-#
-# Notes:
-#
-#------------------------------------------------------------------------------
-
-ASM_GLOBAL  ASM_PFX(AsmCpuid)
-
-#------------------------------------------------------------------------------
-#  VOID
-#  EFIAPI
-#  AsmCpuid (
-#    IN   UINT32  RegisterInEax,
-#    OUT  UINT32  *RegisterOutEax  OPTIONAL,
-#    OUT  UINT32  *RegisterOutEbx  OPTIONAL,
-#    OUT  UINT32  *RegisterOutEcx  OPTIONAL,
-#    OUT  UINT32  *RegisterOutEdx  OPTIONAL
-#    )
-#------------------------------------------------------------------------------
-ASM_PFX(AsmCpuid):
-    push    %ebx
-    push    %ebp
-    movl    %esp, %ebp
-    movl    12(%ebp), %eax
-    cpuid
-    push    %ecx
-    movl    16(%ebp), %ecx
-    jecxz   L1
-    movl    %eax, (%ecx)
-L1:
-    movl    20(%ebp), %ecx
-    jecxz   L2
-    movl    %ebx, (%ecx)
-L2:
-    movl    24(%ebp), %ecx
-    jecxz   L3
-    popl    (%ecx)
-L3:
-    movl    28(%ebp), %ecx
-    jecxz   L4
-    movl    %edx, (%ecx)
-L4:
-    movl    12(%ebp), %eax
-    leave
-    pop     %ebx
-    ret

+ 0 - 67
MdePkg/Library/BaseLib/Ia32/CpuIdEx.S

@@ -1,67 +0,0 @@
-#------------------------------------------------------------------------------
-#
-# Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution.  The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php.
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-# Module Name:
-#
-#   CpuIdEx.S
-#
-# Abstract:
-#
-#   AsmCpuidEx function
-#
-# Notes:
-#
-#------------------------------------------------------------------------------
-
-
-    .code:
-
-#------------------------------------------------------------------------------
-#  UINT32
-#  EFIAPI
-#  AsmCpuidEx (
-#    IN   UINT32  RegisterInEax,
-#    IN   UINT32  RegisterInEcx,
-#    OUT  UINT32  *RegisterOutEax  OPTIONAL,
-#    OUT  UINT32  *RegisterOutEbx  OPTIONAL,
-#    OUT  UINT32  *RegisterOutEcx  OPTIONAL,
-#    OUT  UINT32  *RegisterOutEdx  OPTIONAL
-#    )
-#------------------------------------------------------------------------------
-ASM_GLOBAL ASM_PFX(AsmCpuidEx)
-ASM_PFX(AsmCpuidEx):
-    push    %ebx
-    push    %ebp
-    movl    %esp, %ebp
-    movl    12(%ebp), %eax
-    movl    16(%ebp), %ecx
-    cpuid
-    push    %ecx
-    movl    20(%ebp), %ecx
-    jecxz   L1
-    movl    %eax, (%ecx)
-L1:
-    movl    24(%ebp), %ecx
-    jecxz   L2
-    movl    %ebx, (%ecx)
-L2:
-    movl    32(%ebp), %ecx
-    jecxz   L3
-    movl    %edx, (%ecx)
-L3:
-    movl    28(%ebp), %ecx
-    jecxz   L4
-    popl    (%ecx)
-L4:
-    movl    12(%ebp), %eax
-    leave
-    pop     %ebx
-    ret

+ 0 - 39
MdePkg/Library/BaseLib/Ia32/DisableCache.S

@@ -1,39 +0,0 @@
-#------------------------------------------------------------------------------
-#
-# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution.  The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php.
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-# Module Name:
-#
-#   DisableCache.S
-#
-# Abstract:
-#
-#   Set the CD bit of CR0 to 1, clear the NW bit of CR0 to 0, and flush all caches with a
-#   WBINVD instruction.
-#
-# Notes:
-#
-#------------------------------------------------------------------------------
-
-#------------------------------------------------------------------------------
-# VOID
-# EFIAPI
-# AsmDisableCache (
-#   VOID
-#   );
-#------------------------------------------------------------------------------
-ASM_GLOBAL ASM_PFX(AsmDisableCache)
-ASM_PFX(AsmDisableCache):
-    movl    %cr0, %eax
-    btsl    $30, %eax
-    btrl    $29, %eax
-    movl    %eax, %cr0
-    wbinvd
-    ret

+ 0 - 52
MdePkg/Library/BaseLib/Ia32/DisablePaging32.S

@@ -1,52 +0,0 @@
-#------------------------------------------------------------------------------
-#
-# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution.  The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php.
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-# Module Name:
-#
-#   DisablePaging32.S
-#
-# Abstract:
-#
-#   InternalX86DisablePaging32 function
-#
-# Notes:
-#
-#------------------------------------------------------------------------------
-
-ASM_GLOBAL ASM_PFX(InternalX86DisablePaging32)
-
-#------------------------------------------------------------------------------
-# VOID
-# EFIAPI
-# InternalX86DisablePaging32 (
-#   IN      SWITCH_STACK_ENTRY_POINT  EntryPoint,
-#   IN      VOID                      *Context1,    OPTIONAL
-#   IN      VOID                      *Context2,    OPTIONAL
-#   IN      VOID                      *NewStack
-#   );
-#------------------------------------------------------------------------------
-ASM_PFX(InternalX86DisablePaging32):
-    movl    4(%esp), %ebx
-    movl    8(%esp), %ecx
-    movl    12(%esp), %edx
-    pushfl
-    pop     %edi                        # save EFLAGS to edi
-    cli
-    movl    %cr0, %eax
-    btrl    $31, %eax
-    movl    16(%esp), %esp
-    movl    %eax, %cr0
-    push    %edi
-    popfl                               # restore EFLAGS from edi
-    push    %edx
-    push    %ecx
-    call    *%ebx
-    jmp     .                           # EntryPoint() should not return

+ 0 - 41
MdePkg/Library/BaseLib/Ia32/DivU64x32.S

@@ -1,41 +0,0 @@
-#------------------------------------------------------------------------------
-#
-# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution.  The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php.
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-# Module Name:
-#
-#   DivU64x32.S
-#
-# Abstract:
-#
-#   Calculate the quotient of a 64-bit integer by a 32-bit integer
-#
-#------------------------------------------------------------------------------
-
-ASM_GLOBAL ASM_PFX(InternalMathDivU64x32)
-
-#------------------------------------------------------------------------------
-# UINT64
-# EFIAPI
-# InternalMathDivU64x32 (
-#   IN      UINT64                    Dividend,
-#   IN      UINT32                    Divisor
-#   );
-#------------------------------------------------------------------------------
-ASM_PFX(InternalMathDivU64x32):
-    movl    8(%esp), %eax
-    movl    12(%esp), %ecx
-    xorl    %edx, %edx
-    divl    %ecx
-    push    %eax                    # save quotient on stack
-    movl    8(%esp), %eax
-    divl    %ecx
-    pop     %edx                    # restore high-order dword of the quotient
-    ret

+ 0 - 46
MdePkg/Library/BaseLib/Ia32/DivU64x32Remainder.S

@@ -1,46 +0,0 @@
-#------------------------------------------------------------------------------
-#
-# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution.  The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php.
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-# Module Name:
-#
-#   DivError.S
-#
-# Abstract:
-#
-#   Set error flag for all division functions
-#
-#------------------------------------------------------------------------------
-
-ASM_GLOBAL ASM_PFX(InternalMathDivRemU64x32)
-
-#------------------------------------------------------------------------------
-# UINT64
-# EFIAPI
-# InternalMathDivRemU64x32 (
-#   IN      UINT64                    Dividend,
-#   IN      UINT32                    Divisor,
-#   OUT     UINT32                    *Remainder
-#   );
-#------------------------------------------------------------------------------
-ASM_PFX(InternalMathDivRemU64x32):
-    movl    12(%esp), %ecx          # ecx <- divisor
-    movl    8(%esp), %eax           # eax <- dividend[32..63]
-    xorl    %edx, %edx
-    divl    %ecx                    # eax <- quotient[32..63], edx <- remainder
-    push    %eax
-    movl    8(%esp), %eax           # eax <- dividend[0..31]
-    divl    %ecx                    # eax <- quotient[0..31]
-    movl    20(%esp), %ecx          # ecx <- Remainder
-    jecxz   L1                      # abandon remainder if Remainder == NULL
-    movl    %edx, (%ecx)
-L1:
-    pop     %edx                    # edx <- quotient[32..63]
-    ret

+ 0 - 89
MdePkg/Library/BaseLib/Ia32/DivU64x64Remainder.S

@@ -1,89 +0,0 @@
-#------------------------------------------------------------------------------
-#
-# Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution.  The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php.
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-# Module Name:
-#
-#   DivU64x64Remainder.S
-#
-# Abstract:
-#
-#   Calculate the quotient of a 64-bit integer by a 64-bit integer and returns
-#   both the quotient and the remainder
-#
-#------------------------------------------------------------------------------
-
-ASM_GLOBAL ASM_PFX(InternalMathDivRemU64x32), ASM_PFX(InternalMathDivRemU64x64)
-
-#------------------------------------------------------------------------------
-# UINT64
-# EFIAPI
-# InternalMathDivRemU64x64 (
-#   IN      UINT64                    Dividend,
-#   IN      UINT64                    Divisor,
-#   OUT     UINT64                    *Remainder    OPTIONAL
-#   );
-#------------------------------------------------------------------------------
-ASM_PFX(InternalMathDivRemU64x64):
-    movl    16(%esp), %ecx              # ecx <- divisor[32..63]
-    testl   %ecx, %ecx
-    jnz     Hard                        # call _@DivRemU64x64 if Divisor > 2^32
-    movl    20(%esp), %ecx
-    jecxz   L1
-    andl     $0, 4(%ecx)                # zero high dword of remainder
-    movl    %ecx, 16(%esp)              # set up stack frame to match DivRemU64x32
-L1:
-    jmp     ASM_PFX(InternalMathDivRemU64x32)
-Hard:
-    push    %ebx
-    push    %esi
-    push    %edi
-    mov     20(%esp), %edx
-    mov     16(%esp), %eax              # edx:eax <- dividend
-    movl    %edx, %edi
-    movl    %eax, %esi                  # edi:esi <- dividend
-    mov     24(%esp), %ebx              # ecx:ebx <- divisor
-L2:
-    shrl    %edx
-    rcrl    $1, %eax
-    shrdl   $1, %ecx, %ebx
-    shrl    %ecx
-    jnz     L2
-    divl    %ebx
-    movl    %eax, %ebx                  # ebx <- quotient
-    movl    28(%esp), %ecx              # ecx <- high dword of divisor
-    mull    24(%esp)                    # edx:eax <- quotient * divisor[0..31]
-    imull   %ebx, %ecx                  # ecx <- quotient * divisor[32..63]
-    addl    %ecx, %edx                  # edx <- (quotient * divisor)[32..63]
-    mov     32(%esp), %ecx              # ecx <- addr for Remainder
-    jc      TooLarge                    # product > 2^64
-    cmpl    %edx, %edi                  # compare high 32 bits
-    ja      Correct
-    jb      TooLarge                    # product > dividend
-    cmpl    %eax, %esi
-    jae     Correct                     # product <= dividend
-TooLarge:
-    decl    %ebx                        # adjust quotient by -1
-    jecxz   Return                      # return if Remainder == NULL
-    sub     24(%esp), %eax
-    sbb     28(%esp), %edx              # edx:eax <- (quotient - 1) * divisor
-Correct:
-    jecxz   Return
-    subl    %eax, %esi
-    sbbl    %edx, %edi                  # edi:esi <- remainder
-    movl    %esi, (%ecx)
-    movl    %edi, 4(%ecx)
-Return:
-    movl    %ebx, %eax                  # eax <- quotient
-    xorl    %edx, %edx                  # quotient is 32 bits long
-    pop     %edi
-    pop     %esi
-    pop     %ebx
-    ret

+ 0 - 39
MdePkg/Library/BaseLib/Ia32/EnableCache.S

@@ -1,39 +0,0 @@
-#------------------------------------------------------------------------------
-#
-# Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution.  The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php.
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-# Module Name:
-#
-#   EnableCache.S
-#
-# Abstract:
-#
-#   Flush all caches with a WBINVD instruction, clear the CD bit of CR0 to 0, and clear
-#   the NW bit of CR0 to 0
-#
-# Notes:
-#
-#------------------------------------------------------------------------------
-
-#------------------------------------------------------------------------------
-# VOID
-# EFIAPI
-# AsmEnableCache (
-#   VOID
-#   );
-#------------------------------------------------------------------------------
-ASM_GLOBAL ASM_PFX(AsmEnableCache)
-ASM_PFX(AsmEnableCache):
-    wbinvd
-    movl    %cr0, %eax
-    btrl    $30, %eax
-    btrl    $29, %eax
-    movl    %eax, %cr0
-    ret

+ 0 - 36
MdePkg/Library/BaseLib/Ia32/EnableDisableInterrupts.S

@@ -1,36 +0,0 @@
-#------------------------------------------------------------------------------
-#
-# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution.  The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php.
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-# Module Name:
-#
-#   EnableDisableInterrupts.S
-#
-# Abstract:
-#
-#   EnableDisableInterrupts function
-#
-# Notes:
-#
-#------------------------------------------------------------------------------
-
-ASM_GLOBAL ASM_PFX(EnableDisableInterrupts)
-
-#------------------------------------------------------------------------------
-# VOID
-# EFIAPI
-# EnableDisableInterrupts (
-#   VOID
-#   );
-#------------------------------------------------------------------------------
-ASM_PFX(EnableDisableInterrupts):
-    sti
-    cli
-    ret

+ 0 - 52
MdePkg/Library/BaseLib/Ia32/EnablePaging32.S

@@ -1,52 +0,0 @@
-#------------------------------------------------------------------------------
-#
-# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution.  The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php.
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-# Module Name:
-#
-#   EnablePaging32.S
-#
-# Abstract:
-#
-#   InternalX86EnablePaging32 function
-#
-# Notes:
-#
-#------------------------------------------------------------------------------
-
-ASM_GLOBAL ASM_PFX(InternalX86EnablePaging32)
-
-#------------------------------------------------------------------------------
-# VOID
-# EFIAPI
-# InternalX86EnablePaging32 (
-#   IN      SWITCH_STACK_ENTRY_POINT  EntryPoint,
-#   IN      VOID                      *Context1,    OPTIONAL
-#   IN      VOID                      *Context2,    OPTIONAL
-#   IN      VOID                      *NewStack
-#   );
-#------------------------------------------------------------------------------
-ASM_PFX(InternalX86EnablePaging32):
-    movl    4(%esp), %ebx
-    movl    8(%esp), %ecx
-    movl    12(%esp), %edx
-    pushfl
-    pop     %edi                        # save flags in edi
-    cli
-    movl    %cr0, %eax
-    btsl    $31, %eax
-    movl    16(%esp), %esp
-    movl    %eax, %cr0
-    push    %edi
-    popfl                               # restore flags
-    push    %edx
-    push    %ecx
-    call    *%ebx
-    jmp     .

+ 0 - 63
MdePkg/Library/BaseLib/Ia32/EnablePaging64.S

@@ -1,63 +0,0 @@
-#------------------------------------------------------------------------------
-#
-# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution.  The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php.
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-# Module Name:
-#
-#   EnablePaging64.S
-#
-# Abstract:
-#
-#   InternalX86EnablePaging64 function
-#
-# Notes:
-#
-#------------------------------------------------------------------------------
-
-ASM_GLOBAL ASM_PFX(InternalX86EnablePaging64)
-
-#------------------------------------------------------------------------------
-# VOID
-# EFIAPI
-# InternalX86EnablePaging64 (
-#   IN      UINT16                    CodeSelector,
-#   IN      UINT64                    EntryPoint,
-#   IN      UINT64                    Context1,    OPTIONAL
-#   IN      UINT64                    Context2,    OPTIONAL
-#   IN      UINT64                    NewStack
-#   );
-#------------------------------------------------------------------------------
-ASM_PFX(InternalX86EnablePaging64):
-    cli
-    movl    $LongStart, (%esp)          # offset for far retf, seg is the 1st arg
-    movl    %cr4, %eax
-    orb     $0x20, %al
-    movl    %eax, %cr4                  # enable PAE
-    movl    $0xc0000080, %ecx
-    rdmsr
-    orb     $1, %ah                     # set LME
-    wrmsr
-    movl    %cr0, %eax
-    btsl    $31, %eax                   # set PG
-    movl    %eax, %cr0                  # enable paging
-    lret                                # topmost 2 dwords hold the address
-LongStart:                              # long mode starts here
-    .byte   0x67, 0x48                  # 32-bit address size, 64-bit operand size
-    movl    (%esp), %ebx                # mov rbx, [esp]
-    .byte   0x67, 0x48
-    movl    8(%esp), %ecx               # mov rcx, [esp + 8]
-    .byte   0x67, 0x48
-    movl    0x10(%esp), %edx            # mov rdx, [esp + 10h]
-    .byte   0x67, 0x48
-    movl    0x18(%esp), %esp            # mov rsp, [esp + 18h]
-    .byte   0x48
-    addl    $-0x20, %esp                # add rsp, -20h
-    call    *%ebx                       # call rbx
-    jmp     .                           # no one should get here

+ 0 - 48
MdePkg/Library/BaseLib/Ia32/InternalSwitchStack.S

@@ -1,48 +0,0 @@
-#------------------------------------------------------------------------------
-#
-# Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
-# Portions copyright (c) 2011, Apple Inc. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution.  The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php.
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-# Module Name:
-#
-#   InternalSwitchStack.S
-#
-# Abstract:
-#
-#   Implementation of a stack switch on IA-32.
-#
-#------------------------------------------------------------------------------
-
-ASM_GLOBAL ASM_PFX(InternalSwitchStack)
-
-#------------------------------------------------------------------------------
-# VOID
-# EFIAPI
-# InternalSwitchStack (
-#   IN      SWITCH_STACK_ENTRY_POINT  EntryPoint,
-#   IN      VOID                      *Context1,   OPTIONAL
-#   IN      VOID                      *Context2,   OPTIONAL
-#   IN      VOID                      *NewStack
-#   );
-#------------------------------------------------------------------------------
-ASM_PFX(InternalSwitchStack):
-  pushl %ebp
-  movl  %esp, %ebp
-
-  movl  20(%ebp), %esp      # switch stack
-  subl  $8, %esp
-
-  movl  16(%ebp), %eax
-  movl  %eax, 4(%esp)
-  movl  12(%ebp), %eax
-  movl  %eax, (%esp)
-  pushl $0                  # keeps gdb from unwinding stack
-  jmp   *8(%ebp)            # call and never return
-

+ 0 - 48
MdePkg/Library/BaseLib/Ia32/LRotU64.S

@@ -1,48 +0,0 @@
-#------------------------------------------------------------------------------
-#
-# Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution.  The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php.
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-# Module Name:
-#
-#   LRotU64.S
-#
-# Abstract:
-#
-#   64-bit left rotation for Ia32
-#
-#------------------------------------------------------------------------------
-
-ASM_GLOBAL ASM_PFX(InternalMathLRotU64)
-
-#------------------------------------------------------------------------------
-# UINT64
-# EFIAPI
-# InternalMathLRotU64 (
-#   IN      UINT64                    Operand,
-#   IN      UINTN                     Count
-#   );
-#------------------------------------------------------------------------------
-ASM_PFX(InternalMathLRotU64):
-    push    %ebx
-    movb    16(%esp), %cl
-    movl    12(%esp), %edx
-    movl    8(%esp), %eax
-    shldl   %cl, %edx, %ebx
-    shldl   %cl, %eax, %edx
-    rorl    %cl, %ebx
-    shldl   %cl, %ebx, %eax
-    testb   $32, %cl                    # Count >= 32?
-    jz      L0
-    movl    %eax, %ecx
-    movl    %edx, %eax
-    movl    %ecx, %edx
-L0:
-    pop     %ebx
-    ret

+ 0 - 43
MdePkg/Library/BaseLib/Ia32/LShiftU64.S

@@ -1,43 +0,0 @@
-#------------------------------------------------------------------------------
-#
-# Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution.  The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php.
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-# Module Name:
-#
-#   LShiftU64.S
-#
-# Abstract:
-#
-#   64-bit left shift function for IA-32
-#
-#------------------------------------------------------------------------------
-
-ASM_GLOBAL ASM_PFX(InternalMathLShiftU64)
-
-#------------------------------------------------------------------------------
-# UINT64
-# EFIAPI
-# InternalMathLShiftU64 (
-#   IN      UINT64                    Operand,
-#   IN      UINTN                     Count
-#   );
-#------------------------------------------------------------------------------
-ASM_PFX(InternalMathLShiftU64):
-    movb    12(%esp), %cl
-    xorl    %eax, %eax
-    movl    4(%esp), %edx
-    testb   $32, %cl                    # Count >= 32?
-    jnz     L0
-    movl    %edx, %eax
-    movl    0x8(%esp), %edx
-L0:
-    shld    %cl, %eax, %edx
-    shl     %cl, %eax
-    ret

+ 0 - 41
MdePkg/Library/BaseLib/Ia32/LongJump.S

@@ -1,41 +0,0 @@
-#------------------------------------------------------------------------------
-#
-# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution.  The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php.
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-# Module Name:
-#
-#   LongJump.S
-#
-# Abstract:
-#
-#   Implementation of _LongJump() on IA-32.
-#
-#------------------------------------------------------------------------------
-
-ASM_GLOBAL ASM_PFX(InternalLongJump)
-
-#------------------------------------------------------------------------------
-# VOID
-# EFIAPI
-# InternalLongJump (
-#   IN      BASE_LIBRARY_JUMP_BUFFER  *JumpBuffer,
-#   IN      UINTN                     Value
-#   );
-#------------------------------------------------------------------------------
-ASM_PFX(InternalLongJump):
-    pop     %eax                        # skip return address
-    pop     %edx                        # edx <- JumpBuffer
-    pop     %eax                        # eax <- Value
-    movl    (%edx), %ebx
-    movl    4(%edx), %esi
-    movl    8(%edx), %edi
-    movl    12(%edx), %ebp
-    movl    16(%edx), %esp
-    jmp     *20(%edx)                   # restore "eip"

+ 0 - 40
MdePkg/Library/BaseLib/Ia32/ModU64x32.S

@@ -1,40 +0,0 @@
-#------------------------------------------------------------------------------
-#
-# Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution.  The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php.
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-# Module Name:
-#
-#   DivU64x32.S
-#
-# Abstract:
-#
-#   Calculate the remainder of a 64-bit integer by a 32-bit integer
-#
-#------------------------------------------------------------------------------
-
-ASM_GLOBAL ASM_PFX(InternalMathModU64x32)
-
-#------------------------------------------------------------------------------
-# UINT32
-# EFIAPI
-# InternalMathModU64x32 (
-#   IN      UINT64                    Dividend,
-#   IN      UINT32                    Divisor
-#   );
-#------------------------------------------------------------------------------
-ASM_PFX(InternalMathModU64x32):
-    movl    8(%esp), %eax
-    movl    12(%esp), %ecx
-    xorl    %edx, %edx
-    divl    %ecx
-    movl    4(%esp), %eax
-    divl    %ecx
-    movl    %edx, %eax
-    ret

+ 0 - 40
MdePkg/Library/BaseLib/Ia32/Monitor.S

@@ -1,40 +0,0 @@
-#------------------------------------------------------------------------------
-#
-# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution.  The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php.
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-# Module Name:
-#
-#   Monitor.S
-#
-# Abstract:
-#
-#   AsmMonitor function
-#
-# Notes:
-#
-#------------------------------------------------------------------------------
-
-ASM_GLOBAL ASM_PFX(AsmMonitor)
-
-#------------------------------------------------------------------------------
-# UINT64
-# EFIAPI
-# AsmMonitor (
-#   IN      UINTN                     Eax,
-#   IN      UINTN                     Ecx,
-#   IN      UINTN                     Edx
-#   );
-#------------------------------------------------------------------------------
-ASM_PFX(AsmMonitor):
-    movl    4(%esp), %eax
-    movl    8(%esp), %ecx
-    movl    12(%esp), %edx
-    monitor %eax, %ecx, %edx            # monitor
-    ret

+ 0 - 41
MdePkg/Library/BaseLib/Ia32/MultU64x32.S

@@ -1,41 +0,0 @@
-#------------------------------------------------------------------------------
-#
-# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution.  The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php.
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-# Module Name:
-#
-#   MultU64x32.S
-#
-# Abstract:
-#
-#   Calculate the product of a 64-bit integer and a 32-bit integer
-#
-#------------------------------------------------------------------------------
-
-
-    .code:
-
-ASM_GLOBAL ASM_PFX(InternalMathMultU64x32)
-
-#------------------------------------------------------------------------------
-# UINT64
-# EFIAPI
-# InternalMathMultU64x32 (
-#   IN      UINT64                    Multiplicand,
-#   IN      UINT32                    Multiplier
-#   );
-#------------------------------------------------------------------------------
-ASM_PFX(InternalMathMultU64x32):
-    movl    12(%esp), %ecx
-    movl    %ecx, %eax
-    imull   8(%esp), %ecx               # overflow not detectable
-    mull    0x4(%esp)
-    addl    %ecx, %edx
-    ret

+ 0 - 44
MdePkg/Library/BaseLib/Ia32/MultU64x64.S

@@ -1,44 +0,0 @@
-#------------------------------------------------------------------------------
-#
-# Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution.  The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php.
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-# Module Name:
-#
-#   MultU64x64.S
-#
-# Abstract:
-#
-#   Calculate the product of a 64-bit integer and another 64-bit integer
-#
-#------------------------------------------------------------------------------
-
-ASM_GLOBAL ASM_PFX(InternalMathMultU64x64)
-
-#------------------------------------------------------------------------------
-# UINT64
-# EFIAPI
-# InternalMathMultU64x64 (
-#   IN      UINT64                    Multiplicand,
-#   IN      UINT64                    Multiplier
-#   );
-#------------------------------------------------------------------------------
-ASM_PFX(InternalMathMultU64x64):
-    push    %ebx
-    movl    8(%esp), %ebx             # ebx <- M1[0..31]
-    movl    16(%esp), %edx            # edx <- M2[0..31]
-    movl    %ebx, %ecx
-    movl    %edx, %eax
-    imull   20(%esp), %ebx            # ebx <- M1[0..31] * M2[32..63]
-    imull   12(%esp), %edx            # edx <- M1[32..63] * M2[0..31]
-    addl    %edx, %ebx                # carries are abandoned
-    mull    %ecx                      # edx:eax <- M1[0..31] * M2[0..31]
-    addl    %ebx, %edx                # carries are abandoned
-    pop     %ebx
-    ret

+ 0 - 38
MdePkg/Library/BaseLib/Ia32/Mwait.S

@@ -1,38 +0,0 @@
-#------------------------------------------------------------------------------
-#
-# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution.  The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php.
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-# Module Name:
-#
-#   Mwait.S
-#
-# Abstract:
-#
-#   AsmMwait function
-#
-# Notes:
-#
-#------------------------------------------------------------------------------
-
-ASM_GLOBAL ASM_PFX(AsmMwait)
-
-#------------------------------------------------------------------------------
-# UINT64
-# EFIAPI
-# AsmMwait (
-#   IN      UINTN                     Eax,
-#   IN      UINTN                     Ecx
-#   );
-#------------------------------------------------------------------------------
-ASM_PFX(AsmMwait):
-    movl    4(%esp), %eax
-    movl    8(%esp), %ecx
-    mwait
-    ret

+ 0 - 48
MdePkg/Library/BaseLib/Ia32/RRotU64.S

@@ -1,48 +0,0 @@
-#------------------------------------------------------------------------------
-#
-# Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution.  The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php.
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-# Module Name:
-#
-#   RRotU64.S
-#
-# Abstract:
-#
-#   64-bit right rotation for Ia32
-#
-#------------------------------------------------------------------------------
-
-ASM_GLOBAL ASM_PFX(InternalMathRRotU64)
-
-#------------------------------------------------------------------------------
-# UINT64
-# EFIAPI
-# InternalMathRRotU64 (
-#   IN      UINT64                    Operand,
-#   IN      UINTN                     Count
-#   );
-#------------------------------------------------------------------------------
-ASM_PFX(InternalMathRRotU64):
-    push    %ebx
-    movb    16(%esp), %cl
-    movl    8(%esp), %eax
-    movl    12(%esp), %edx
-    shrdl   %cl, %eax, %ebx
-    shrdl   %cl, %edx, %eax
-    roll    %cl, %ebx
-    shrdl   %cl, %ebx, %edx
-    testb   $32, %cl                    # Count >= 32?
-    jz      L0
-    movl    %eax, %ecx                  # switch eax & edx if Count >= 32
-    movl    %edx, %eax
-    movl    %ecx, %edx
-L0:
-    pop     %ebx
-    ret

+ 0 - 46
MdePkg/Library/BaseLib/Ia32/RShiftU64.S

@@ -1,46 +0,0 @@
-#------------------------------------------------------------------------------
-#
-# Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution.  The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php.
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-# Module Name:
-#
-#   RShiftU64.S
-#
-# Abstract:
-#
-#   64-bit logical right shift function for IA-32
-#
-#------------------------------------------------------------------------------
-
-
-    .code:
-
-ASM_GLOBAL ASM_PFX(InternalMathRShiftU64)
-
-#------------------------------------------------------------------------------
-# UINT64
-# EFIAPI
-# InternalMathRShiftU64 (
-#   IN      UINT64                    Operand,
-#   IN      UINTN                     Count
-#   );
-#------------------------------------------------------------------------------
-ASM_PFX(InternalMathRShiftU64):
-    movb    12(%esp), %cl               # cl <- Count
-    xorl    %edx, %edx
-    movl    8(%esp), %eax
-    testb   $32, %cl                    # Count >= 32?
-    jnz     L0
-    movl    %eax, %edx
-    movl    0x4(%esp), %eax
-L0:
-    shrdl   %cl, %edx, %eax
-    shr     %cl, %edx
-    ret

+ 0 - 80
MdePkg/Library/BaseLib/Ia32/RdRand.S

@@ -1,80 +0,0 @@
-#------------------------------------------------------------------------------ ;
-# Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution.  The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php.
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-# Module Name:
-#
-#   RdRand.S
-#
-# Abstract:
-#
-#   Generates random number through CPU RdRand instruction under 32-bit platform.
-#
-# Notes:
-#
-#------------------------------------------------------------------------------
-
-//------------------------------------------------------------------------------
-//  Generates a 16 bit random number through RDRAND instruction.
-//  Return TRUE if Rand generated successfully, or FALSE if not.
-//
-//  BOOLEAN EFIAPI InternalX86RdRand16 (UINT16 *Rand);
-//------------------------------------------------------------------------------
-ASM_GLOBAL ASM_PFX(InternalX86RdRand16)
-ASM_PFX(InternalX86RdRand16):
-    .byte  0x0f, 0xc7, 0xf0        // rdrand r16: "0f c7 /6  ModRM:r/m(w)"
-    jc     rn16_ok                 // jmp if CF=1
-    xor    %eax, %eax              // reg=0 if CF=0
-    ret                            // return with failure status
-rn16_ok:
-    mov    0x4(%esp), %edx
-    mov    %ax, (%edx)
-    mov    $0x1, %eax
-    ret
-
-//------------------------------------------------------------------------------
-//  Generates a 32 bit random number through RDRAND instruction.
-//  Return TRUE if Rand generated successfully, or FALSE if not.
-//
-//  BOOLEAN EFIAPI InternalX86RdRand32 (UINT32 *Rand);
-//------------------------------------------------------------------------------
-ASM_GLOBAL ASM_PFX(InternalX86RdRand32)
-ASM_PFX(InternalX86RdRand32):
-    .byte  0x0f, 0xc7, 0xf0        // rdrand r32: "0f c7 /6  ModRM:r/m(w)"
-    jc     rn32_ok                 // jmp if CF=1
-    xor    %eax, %eax              // reg=0 if CF=0
-    ret                            // return with failure status
-rn32_ok:
-    mov    0x4(%esp), %edx
-    mov    %eax, (%edx)
-    mov    $0x1, %eax
-    ret
-
-//------------------------------------------------------------------------------
-//  Generates a 64 bit random number through RDRAND instruction.
-//  Return TRUE if Rand generated successfully, or FALSE if not.
-//
-//  BOOLEAN EFIAPI InternalX86RdRand64 (UINT64 *Rand);
-//------------------------------------------------------------------------------
-ASM_GLOBAL ASM_PFX(InternalX86RdRand64)
-ASM_PFX(InternalX86RdRand64):
-    .byte  0x0f, 0xc7, 0xf0        // rdrand r32: "0f c7 /6  ModRM:r/m(w)"
-    jnc    rn64_ret                // jmp if CF=0
-    mov    0x4(%esp), %edx
-    mov    %eax, (%edx)
-
-    .byte  0x0f, 0xc7, 0xf0        // generate another 32 bit RN
-    jnc    rn64_ret                // jmp if CF=0
-    mov    %eax, 0x4(%edx)
-
-    mov    $0x1, %eax
-    ret
-rn64_ret:
-    xor    %eax, %eax
-    ret                            // return with failure status

+ 0 - 44
MdePkg/Library/BaseLib/Ia32/SetJump.S

@@ -1,44 +0,0 @@
-#------------------------------------------------------------------------------
-#
-# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution.  The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php.
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-# Module Name:
-#
-#   SetJump.S
-#
-# Abstract:
-#
-#   Implementation of SetJump() on IA-32.
-#
-#------------------------------------------------------------------------------
-
-ASM_GLOBAL ASM_PFX(SetJump), ASM_PFX(InternalAssertJumpBuffer)
-
-#------------------------------------------------------------------------------
-# UINTN
-# EFIAPI
-# SetJump (
-#   OUT     BASE_LIBRARY_JUMP_BUFFER  *JumpBuffer
-#   );
-#------------------------------------------------------------------------------
-ASM_PFX(SetJump):
-    pushl   0x4(%esp)
-    call    ASM_PFX(InternalAssertJumpBuffer)               # To validate JumpBuffer
-    pop     %ecx
-    pop     %ecx                                            # ecx <- return address
-    movl    (%esp), %edx
-    movl    %ebx, (%edx)
-    movl    %esi, 4(%edx)
-    movl    %edi, 8(%edx)
-    movl    %ebp, 12(%edx)
-    movl    %esp, 16(%edx)
-    movl    %ecx, 20(%edx)                                  # eip value to restore in LongJump
-    xorl    %eax, %eax
-    jmp     *%ecx

+ 0 - 38
MdePkg/Library/BaseLib/Ia32/SwapBytes64.S

@@ -1,38 +0,0 @@
-#------------------------------------------------------------------------------
-#
-# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution.  The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php.
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-# Module Name:
-#
-#   CpuId.S
-#
-# Abstract:
-#
-#   AsmCpuid function
-#
-# Notes:
-#
-#------------------------------------------------------------------------------
-
-
-#------------------------------------------------------------------------------
-# UINT64
-# EFIAPI
-# InternalMathSwapBytes64 (
-#   IN      UINT64                    Operand
-#   );
-#------------------------------------------------------------------------------
-ASM_GLOBAL ASM_PFX(InternalMathSwapBytes64)
-ASM_PFX(InternalMathSwapBytes64):
-    movl    8(%esp), %eax               # eax <- upper 32 bits
-    movl    4(%esp), %edx               # edx <- lower 32 bits
-    bswapl  %eax
-    bswapl  %edx
-    ret

+ 0 - 222
MdePkg/Library/BaseLib/Ia32/Thunk16.S

@@ -1,222 +0,0 @@
-#------------------------------------------------------------------------------
-#
-# Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution.  The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php.
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-# Module Name:
-#
-#   Thunk16.S
-#
-# Abstract:
-#
-#   Real mode thunk
-#
-#------------------------------------------------------------------------------
-
-#include <Library/BaseLib.h>
-
-ASM_GLOBAL ASM_PFX(m16Start), ASM_PFX(m16Size), ASM_PFX(mThunk16Attr), ASM_PFX(m16Gdt), ASM_PFX(m16GdtrBase), ASM_PFX(mTransition)
-ASM_GLOBAL ASM_PFX(InternalAsmThunk16)
-
-# define the structure of IA32_REGS
-.set  _EDI, 0       #size 4
-.set  _ESI, 4       #size 4
-.set  _EBP, 8       #size 4
-.set  _ESP, 12      #size 4
-.set  _EBX, 16      #size 4
-.set  _EDX, 20      #size 4
-.set  _ECX, 24      #size 4
-.set  _EAX, 28      #size 4
-.set  _DS,  32      #size 2
-.set  _ES,  34      #size 2
-.set  _FS,  36      #size 2
-.set  _GS,  38      #size 2
-.set  _EFLAGS, 40   #size 4
-.set  _EIP, 44      #size 4
-.set  _CS, 48       #size 2
-.set  _SS, 50       #size 2
-.set  IA32_REGS_SIZE, 52
-
-    .text
-    .code16
-
-ASM_PFX(m16Start):
-
-SavedGdt:     .space  6
-
-ASM_PFX(BackFromUserCode):
-    push    %ss
-    push    %cs
-
-    calll   L_Base1                     # push eip
-L_Base1:
-    pushfl
-    cli                                 # disable interrupts
-    push    %gs
-    push    %fs
-    push    %es
-    push    %ds
-    pushal
-    .byte   0x66, 0xba                  # mov edx, imm32
-ASM_PFX(ThunkAttr): .space  4
-    testb   $THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15, %dl
-    jz      1f
-    movw    $0x2401, %ax
-    int     $0x15
-    cli                                 # disable interrupts
-    jnc     2f
-1:
-    testb   $THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL, %dl
-    jz      2f
-    inb     $0x92, %al
-    orb     $2, %al
-    outb    %al, $0x92                  # deactivate A20M#
-2:
-    xorl    %eax, %eax
-    movw    %ss, %ax
-    leal    IA32_REGS_SIZE(%esp), %ebp
-    mov     %ebp, (_ESP - IA32_REGS_SIZE)(%bp)
-    mov     (_EIP - IA32_REGS_SIZE)(%bp), %bx
-    shll    $4, %eax
-    addl    %eax, %ebp
-    .byte   0x66, 0xb8                  # mov eax, imm32
-SavedCr4:   .space  4
-    movl    %eax, %cr4
-    lgdtl   %cs:(SavedGdt - L_Base1)(%bx)
-    .byte   0x66, 0xb8                  # mov eax, imm32
-SavedCr0:   .space  4
-    movl    %eax, %cr0
-    .byte   0xb8                        # mov ax, imm16
-SavedSs:    .space  2
-    movl    %eax, %ss
-    .byte   0x66, 0xbc                  # mov esp, imm32
-SavedEsp:   .space  4
-    lretl                               # return to protected mode
-
-_EntryPoint:    .long      ASM_PFX(ToUserCode) - ASM_PFX(m16Start)
-                .word      0x8
-_16Idtr:        .word      0x3ff
-                .long      0
-_16Gdtr:        .word      GdtEnd - _NullSegDesc - 1
-_16GdtrBase:    .long      _NullSegDesc
-
-ASM_PFX(ToUserCode):
-    movw    %ss, %dx
-    movw    %cx, %ss                    # set new segment selectors
-    movw    %cx, %ds
-    movw    %cx, %es
-    movw    %cx, %fs
-    movw    %cx, %gs
-    movl    %eax, %cr0                  # real mode starts at next instruction
-                                        #  which (per SDM) *must* be a far JMP.
-    ljmpw   $0,$0                       # will be filled in by InternalAsmThunk16
-L_Base:                                 #  to point here.
-    movl    %ebp, %cr4
-    movw    %si, %ss                    # set up 16-bit stack segment
-    xchgl   %ebx, %esp                  # set up 16-bit stack pointer
-
-    movw    IA32_REGS_SIZE(%esp), %bp   # get BackToUserCode address from stack
-    mov     %dx, %cs:(SavedSs - ASM_PFX(BackFromUserCode))(%bp)
-    mov     %ebx, %cs:(SavedEsp - ASM_PFX(BackFromUserCode))(%bp)
-    lidtl   %cs:(_16Idtr - ASM_PFX(BackFromUserCode))(%bp)
-    popal
-    pop     %ds
-    pop     %es
-    pop     %fs
-    pop     %gs
-    popfl
-    lretl                               # transfer control to user code
-
-_NullSegDesc:   .quad   0
-_16CsDesc:
-                .word   -1
-                .word   0
-                .byte   0
-                .byte   0x9b
-                .byte   0x8f            # 16-bit segment, 4GB limit
-                .byte   0
-_16DsDesc:
-                .word   -1
-                .word   0
-                .byte   0
-                .byte   0x93
-                .byte   0x8f            # 16-bit segment, 4GB limit
-                .byte   0
-GdtEnd:
-
-    .code32
-#
-#   @param  RegSet  The pointer to a IA32_DWORD_REGS structure
-#   @param  Transition  The pointer to the transition code
-#   @return The address of the 16-bit stack after returning from user code
-#
-ASM_PFX(InternalAsmThunk16):
-    push    %ebp
-    push    %ebx
-    push    %esi
-    push    %edi
-    push    %ds
-    push    %es
-    push    %fs
-    push    %gs
-    movl    36(%esp), %esi              # esi <- RegSet
-    movzwl  _SS(%esi), %edx
-    mov     _ESP(%esi), %edi
-    add     $(-(IA32_REGS_SIZE + 4)), %edi
-    movl    %edi, %ebx                  # ebx <- stack offset
-    imul    $0x10, %edx, %eax
-    push    $(IA32_REGS_SIZE / 4)
-    addl    %eax, %edi                  # edi <- linear address of 16-bit stack
-    pop     %ecx
-    rep
-    movsl                               # copy RegSet
-    movl    40(%esp), %eax              # eax <- address of transition code
-    movl    %edx, %esi                  # esi <- 16-bit stack segment
-    lea     (SavedCr0 - ASM_PFX(m16Start))(%eax), %edx
-    movl    %eax, %ecx
-    andl    $0xf, %ecx
-    shll    $12, %eax
-    lea     (ASM_PFX(BackFromUserCode) - ASM_PFX(m16Start))(%ecx), %ecx
-    movw    %cx, %ax
-    stosl                               # [edi] <- return address of user code
-    addl    $(L_Base - ASM_PFX(BackFromUserCode)), %eax
-    movl    %eax, (L_Base - SavedCr0 - 4)(%edx)
-    sgdtl   (SavedGdt - SavedCr0)(%edx)
-    sidtl   0x24(%esp)
-    movl    %cr0, %eax
-    movl    %eax, (%edx)                # save CR0 in SavedCr0
-    andl    $0x7ffffffe, %eax           # clear PE, PG bits
-    movl    %cr4, %ebp
-    mov     %ebp, (SavedCr4 - SavedCr0)(%edx)
-    andl    $0xffffffcf, %ebp           # clear PAE, PSE bits
-    pushl   $0x10
-    pop     %ecx                        # ecx <- selector for data segments
-    lgdtl   (_16Gdtr - SavedCr0)(%edx)
-    pushfl
-    lcall   *(_EntryPoint - SavedCr0)(%edx)
-    popfl
-    lidtl   0x24(%esp)
-    lea     -IA32_REGS_SIZE(%ebp), %eax
-    pop     %gs
-    pop     %fs
-    pop     %es
-    pop     %ds
-    pop     %edi
-    pop     %esi
-    pop     %ebx
-    pop     %ebp
-    ret
-
-    .const:
-
-ASM_PFX(m16Size):        .word      ASM_PFX(InternalAsmThunk16)  - ASM_PFX(m16Start)
-ASM_PFX(mThunk16Attr):   .word      ASM_PFX(ThunkAttr)          - ASM_PFX(m16Start)
-ASM_PFX(m16Gdt):         .word      _NullSegDesc        - ASM_PFX(m16Start)
-ASM_PFX(m16GdtrBase):    .word      _16GdtrBase         - ASM_PFX(m16Start)
-ASM_PFX(mTransition):    .word      _EntryPoint         - ASM_PFX(m16Start)

+ 0 - 60
MdePkg/Library/BaseLib/X64/CpuId.S

@@ -1,60 +0,0 @@
-#------------------------------------------------------------------------------
-#
-# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution.  The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php.
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-# Module Name:
-#
-#   CpuId.S
-#
-# Abstract:
-#
-#   AsmCpuid function
-#
-# Notes:
-#
-#------------------------------------------------------------------------------
-
-#------------------------------------------------------------------------------
-#  VOID
-#  EFIAPI
-#  AsmCpuid (
-#    IN   UINT32  RegisterInEax,
-#    OUT  UINT32  *RegisterOutEax  OPTIONAL,
-#    OUT  UINT32  *RegisterOutEbx  OPTIONAL,
-#    OUT  UINT32  *RegisterOutEcx  OPTIONAL,
-#    OUT  UINT32  *RegisterOutEdx  OPTIONAL
-#    )
-#------------------------------------------------------------------------------
-ASM_GLOBAL ASM_PFX(AsmCpuid)
-ASM_PFX(AsmCpuid):
-    push    %rbx
-    mov     %ecx, %eax
-    push    %rax                         # save Index on stack
-    push    %rdx
-    cpuid
-    test    %r9, %r9
-    jz      L1
-    mov     %ecx, (%r9)
-L1:
-    pop     %rcx
-    jrcxz   L2
-    mov     %eax, (%rcx)
-L2:
-    mov     %r8, %rcx
-    jrcxz   L3
-    mov     %ebx, (%rcx)
-L3:
-    mov     0x38(%rsp), %rcx
-    jrcxz   L4
-    mov     %edx, (%rcx)
-L4:
-    pop     %rax                         # restore Index to rax as return value
-    pop     %rbx
-    ret

+ 0 - 62
MdePkg/Library/BaseLib/X64/CpuIdEx.S

@@ -1,62 +0,0 @@
-#------------------------------------------------------------------------------
-#
-# Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution.  The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php.
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-# Module Name:
-#
-#   CpuIdEx.S
-#
-# Abstract:
-#
-#   AsmCpuidEx function
-#
-# Notes:
-#
-#------------------------------------------------------------------------------
-
-#------------------------------------------------------------------------------
-#  UINT32
-#  EFIAPI
-#  AsmCpuidEx (
-#    IN   UINT32  RegisterInEax,
-#    IN   UINT32  RegisterInEcx,
-#    OUT  UINT32  *RegisterOutEax  OPTIONAL,
-#    OUT  UINT32  *RegisterOutEbx  OPTIONAL,
-#    OUT  UINT32  *RegisterOutEcx  OPTIONAL,
-#    OUT  UINT32  *RegisterOutEdx  OPTIONAL
-#    )
-#------------------------------------------------------------------------------
-ASM_GLOBAL ASM_PFX(AsmCpuidEx)
-ASM_PFX(AsmCpuidEx):
-    push    %rbx
-    movl    %ecx,%eax
-    movl    %edx,%ecx
-    push    %rax                  # save Index on stack
-    cpuid
-    mov     0x38(%rsp), %r10
-    test    %r10, %r10
-    jz      L1
-    mov     %ecx,(%r10)
-L1:
-    mov     %r8, %rcx
-    jrcxz   L2
-    movl    %eax,(%rcx)
-L2:
-    mov     %r9, %rcx
-    jrcxz   L3
-    mov     %ebx, (%rcx)
-L3:
-    mov     0x40(%rsp), %rcx
-    jrcxz   L4
-    mov     %edx, (%rcx)
-L4:
-    pop     %rax                  # restore Index to rax as return value
-    pop     %rbx
-    ret

+ 0 - 39
MdePkg/Library/BaseLib/X64/DisableCache.S

@@ -1,39 +0,0 @@
-#------------------------------------------------------------------------------
-#
-# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution.  The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php.
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-# Module Name:
-#
-#   DisableCache.S
-#
-# Abstract:
-#
-#   Set the CD bit of CR0 to 1, clear the NW bit of CR0 to 0, and flush all caches with a
-#   WBINVD instruction.
-#
-# Notes:
-#
-#------------------------------------------------------------------------------
-
-#------------------------------------------------------------------------------
-# VOID
-# EFIAPI
-# AsmDisableCache (
-#   VOID
-#   );
-#------------------------------------------------------------------------------
-ASM_GLOBAL ASM_PFX(AsmDisableCache)
-ASM_PFX(AsmDisableCache):
-    movq    %cr0, %rax
-    btsq    $30, %rax
-    btrq    $29, %rax
-    movq    %rax, %cr0
-    wbinvd
-    ret

+ 0 - 82
MdePkg/Library/BaseLib/X64/DisablePaging64.S

@@ -1,82 +0,0 @@
-#------------------------------------------------------------------------------
-#
-# Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution.  The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php.
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-# Module Name:
-#
-#   DisablePaging64.S
-#
-# Abstract:
-#
-#   AsmDisablePaging64 function
-#
-# Notes:
-#
-#------------------------------------------------------------------------------
-
-
-
-#------------------------------------------------------------------------------
-# VOID
-# EFIAPI
-# InternalX86DisablePaging64 (
-#   IN      UINT16                    Cs,
-#   IN      UINT32                    EntryPoint,
-#   IN      UINT32                    Context1,  OPTIONAL
-#   IN      UINT32                    Context2,  OPTIONAL
-#   IN      UINT32                    NewStack
-#   );
-#------------------------------------------------------------------------------
-
-ASM_GLOBAL ASM_PFX(InternalX86DisablePaging64)
-ASM_PFX(InternalX86DisablePaging64):
-    cli
-    lea    L1(%rip), %rsi                 # rsi <- The start address of transition code
-    mov    0x28(%rsp), %edi               # rdi <- New stack
-    lea    _mTransitionEnd(%rip), %rax    # rax <- end of transition code
-    sub    %rsi, %rax                     # rax <- The size of transition piece code
-    add    $4, %rax                       # round rax up to the next 4 byte boundary
-    and    $0xfc, %al
-    sub    %rax, %rdi                     # rdi <- use stack to hold transition code
-    mov    %edi, %r10d                    # r10 <- The start address of transicition code below 4G
-    push   %rcx                           # save rcx to stack
-    mov    %rax, %rcx                     # rcx <- The size of transition piece code
-    rep
-    movsb                                 # copy transition code to (new stack - 64byte) below 4G
-    pop    %rcx                           # restore rcx
-
-    mov    %r8d, %esi
-    mov    %r9d, %edi
-    mov    %r10d, %eax
-    sub    $4, %eax
-    push   %rcx                           # push Cs to stack
-    push   %r10                           # push address of transition code on stack
-    .byte  0x48, 0xcb                     # retq: Use far return to load CS register from stack
-                                          # (Use raw byte code since some GNU assemblers generates incorrect code for "retq")
-L1:
-    mov    %eax,%esp                      # set up new stack
-    mov    %cr0,%rax
-    btr    $0x1f,%eax                     # clear CR0.PG
-    mov    %rax,%cr0                      # disable paging
-
-    mov    %edx,%ebx                      # save EntryPoint to ebx, for rdmsr will overwrite edx
-    mov    $0xc0000080,%ecx
-    rdmsr
-    and    $0xfe,%ah                      # clear LME
-    wrmsr
-    mov    %cr4,%rax
-    and    $0xdf,%al                      # clear PAE
-    mov    %rax,%cr4
-    push   %rdi                           # push Context2
-    push   %rsi                           # push Context1
-    callq  *%rbx                          # transfer control to EntryPoint
-    jmp    .                              # no one should get here
-
-_mTransitionEnd :

+ 0 - 39
MdePkg/Library/BaseLib/X64/EnableCache.S

@@ -1,39 +0,0 @@
-#------------------------------------------------------------------------------
-#
-# Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution.  The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php.
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-# Module Name:
-#
-#   EnableCache.S
-#
-# Abstract:
-#
-#   Flush all caches with a WBINVD instruction, clear the CD bit of CR0 to 0, and clear
-#   the NW bit of CR0 to 0
-#
-# Notes:
-#
-#------------------------------------------------------------------------------
-
-#------------------------------------------------------------------------------
-# VOID
-# EFIAPI
-# AsmEnableCache (
-#   VOID
-#   );
-#------------------------------------------------------------------------------
-ASM_GLOBAL ASM_PFX(AsmEnableCache)
-ASM_PFX(AsmEnableCache):
-    wbinvd
-    movq    %cr0, %rax
-    btrq    $30, %rax
-    btrq    $29, %rax
-    movq    %rax, %cr0
-    ret

+ 0 - 36
MdePkg/Library/BaseLib/X64/EnableDisableInterrupts.S

@@ -1,36 +0,0 @@
-#------------------------------------------------------------------------------
-#
-# Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution.  The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php.
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-# Module Name:
-#
-#   EnableDisableInterrupts.S
-#
-# Abstract:
-#
-#   EnableDisableInterrupts function
-#
-# Notes:
-#
-#------------------------------------------------------------------------------
-
-
-#------------------------------------------------------------------------------
-# VOID
-# EFIAPI
-# EnableDisableInterrupts (
-#   VOID
-#   );
-#------------------------------------------------------------------------------
-ASM_GLOBAL ASM_PFX(EnableDisableInterrupts)
-ASM_PFX(EnableDisableInterrupts):
-    sti
-    cli
-    ret

+ 0 - 54
MdePkg/Library/BaseLib/X64/LongJump.S

@@ -1,54 +0,0 @@
-#------------------------------------------------------------------------------
-#
-# Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution.  The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php.
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-# Module Name:
-#
-#   LongJump.S
-#
-# Abstract:
-#
-#   Implementation of _LongJump() on x64.
-#
-#------------------------------------------------------------------------------
-
-#------------------------------------------------------------------------------
-# VOID
-# EFIAPI
-# InternalLongJump (
-#   IN      BASE_LIBRARY_JUMP_BUFFER  *JumpBuffer,
-#   IN      UINTN                     Value
-#   );
-#------------------------------------------------------------------------------
-ASM_GLOBAL ASM_PFX(InternalLongJump)
-ASM_PFX(InternalLongJump):
-    mov     (%rcx), %rbx
-    mov     0x8(%rcx), %rsp
-    mov     0x10(%rcx), %rbp
-    mov     0x18(%rcx), %rdi
-    mov     0x20(%rcx), %rsi
-    mov     0x28(%rcx), %r12
-    mov     0x30(%rcx), %r13
-    mov     0x38(%rcx), %r14
-    mov     0x40(%rcx), %r15
-    # load non-volatile fp registers
-    ldmxcsr 0x50(%rcx)
-    movdqu  0x58(%rcx), %xmm6
-    movdqu  0x68(%rcx), %xmm7
-    movdqu  0x78(%rcx), %xmm8
-    movdqu  0x88(%rcx), %xmm9
-    movdqu  0x98(%rcx), %xmm10
-    movdqu  0xA8(%rcx), %xmm11
-    movdqu  0xB8(%rcx), %xmm12
-    movdqu  0xC8(%rcx), %xmm13
-    movdqu  0xD8(%rcx), %xmm14
-    movdqu  0xE8(%rcx), %xmm15
-    mov     %rdx, %rax          # set return value
-    jmp     *0x48(%rcx)

+ 0 - 72
MdePkg/Library/BaseLib/X64/RdRand.S

@@ -1,72 +0,0 @@
-#------------------------------------------------------------------------------ ;
-# Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution.  The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php.
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-# Module Name:
-#
-#   RdRand.S
-#
-# Abstract:
-#
-#   Generates random number through CPU RdRand instruction under 64-bit platform.
-#
-# Notes:
-#
-#------------------------------------------------------------------------------
-
-//------------------------------------------------------------------------------
-//  Generates a 16 bit random number through RDRAND instruction.
-//  Return TRUE if Rand generated successfully, or FALSE if not.
-//
-//  BOOLEAN EFIAPI InternalX86RdRand16 (UINT16 *Rand);
-//------------------------------------------------------------------------------
-ASM_GLOBAL ASM_PFX(InternalX86RdRand16)
-ASM_PFX(InternalX86RdRand16):
-    .byte  0x0f, 0xc7, 0xf0        // rdrand r16: "0f c7 /6  ModRM:r/m(w)"
-    jc     rn16_ok                 // jmp if CF=1
-    xor    %rax, %rax              // reg=0 if CF=0
-    ret                            // return with failure status
-rn16_ok:
-    mov    %ax, (%rcx)
-    mov    $0x1, %rax
-    ret
-
-//------------------------------------------------------------------------------
-//  Generates a 32 bit random number through RDRAND instruction.
-//  Return TRUE if Rand generated successfully, or FALSE if not.
-//
-//  BOOLEAN EFIAPI InternalX86RdRand32 (UINT32 *Rand);
-//------------------------------------------------------------------------------
-ASM_GLOBAL ASM_PFX(InternalX86RdRand32)
-ASM_PFX(InternalX86RdRand32):
-    .byte  0x0f, 0xc7, 0xf0        // rdrand r32: "0f c7 /6  ModRM:r/m(w)"
-    jc     rn32_ok                 // jmp if CF=1
-    xor    %rax, %rax              // reg=0 if CF=0
-    ret                            // return with failure status
-rn32_ok:
-    mov    %eax, (%rcx)
-    mov    $0x1, %rax
-    ret
-
-//------------------------------------------------------------------------------
-//  Generates a 64 bit random number through RDRAND instruction.
-//  Return TRUE if Rand generated successfully, or FALSE if not.
-//
-//  BOOLEAN EFIAPI InternalX86RdRand64 (UINT64 *Rand);
-//------------------------------------------------------------------------------
-ASM_GLOBAL ASM_PFX(InternalX86RdRand64)
-ASM_PFX(InternalX86RdRand64):
-    .byte  0x48, 0x0f, 0xc7, 0xf0  // rdrand r64: "REX.W + 0f c7 /6 ModRM:r/m(w)"
-    jc     rn64_ok                 // jmp if CF=1
-    xor    %rax, %rax              // reg=0 if CF=0
-    ret                            // return with failure status
-rn64_ok:
-    mov    %rax, (%rcx)
-    mov    $0x1, %rax
-    ret

+ 0 - 53
MdePkg/Library/BaseLib/X64/SetJump.S

@@ -1,53 +0,0 @@
-#------------------------------------------------------------------------------
-#
-# Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution.  The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php.
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-# Module Name:
-#
-#   SetJump.S
-#
-# Abstract:
-#
-#   Implementation of SetJump() on x86_64
-#
-#------------------------------------------------------------------------------
-
-ASM_GLOBAL ASM_PFX(SetJump)
-ASM_PFX(SetJump):
-    push   %rcx
-    add    $0xffffffffffffffe0,%rsp
-    call   ASM_PFX(InternalAssertJumpBuffer)
-    add    $0x20,%rsp
-    pop    %rcx
-    pop    %rdx
-    mov    %rbx,(%rcx)
-    mov    %rsp,0x8(%rcx)
-    mov    %rbp,0x10(%rcx)
-    mov    %rdi,0x18(%rcx)
-    mov    %rsi,0x20(%rcx)
-    mov    %r12,0x28(%rcx)
-    mov    %r13,0x30(%rcx)
-    mov    %r14,0x38(%rcx)
-    mov    %r15,0x40(%rcx)
-    mov    %rdx,0x48(%rcx)
-    # save non-volatile fp registers
-    stmxcsr 0x50(%rcx)
-    movdqu  %xmm6, 0x58(%rcx)
-    movdqu  %xmm7, 0x68(%rcx)
-    movdqu  %xmm8, 0x78(%rcx)
-    movdqu  %xmm9, 0x88(%rcx)
-    movdqu  %xmm10, 0x98(%rcx)
-    movdqu  %xmm11, 0xA8(%rcx)
-    movdqu  %xmm12, 0xB8(%rcx)
-    movdqu  %xmm13, 0xC8(%rcx)
-    movdqu  %xmm14, 0xD8(%rcx)
-    movdqu  %xmm15, 0xE8(%rcx)
-    xor    %rax,%rax
-    jmpq   *%rdx

+ 0 - 52
MdePkg/Library/BaseLib/X64/SwitchStack.S

@@ -1,52 +0,0 @@
-#------------------------------------------------------------------------------
-#
-# Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution.  The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php.
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-# Module Name:
-#
-#   SwitchStack.S
-#
-# Abstract:
-#
-#------------------------------------------------------------------------------
-
-
-#------------------------------------------------------------------------------
-# Routine Description:
-#
-#   Routine for switching stacks with 2 parameters
-#
-# Arguments:
-#
-#   (rcx) EntryPoint    - Entry point with new stack.
-#   (rdx) Context1      - Parameter1 for entry point.
-#   (r8)  Context2      - Parameter2 for entry point.
-#   (r9)  NewStack      - The pointer to new stack.
-#
-# Returns:
-#
-#   None
-#
-#------------------------------------------------------------------------------
-ASM_GLOBAL ASM_PFX(InternalSwitchStack)
-ASM_PFX(InternalSwitchStack):
-    pushq   %rbp
-    movq    %rsp, %rbp
-
-    mov     %rcx, %rax  // Shift registers for new call
-    mov     %rdx, %rcx
-    mov     %r8, %rdx
-    #
-    # Reserve space for register parameters (rcx, rdx, r8 & r9) on the stack,
-    # in case the callee wishes to spill them.
-    #
-    lea     -0x20(%r9), %rsp
-    pushq   $0        // stop gdb stack unwind
-    jmp     *%rax     // call EntryPoint ()

+ 0 - 334
MdePkg/Library/BaseLib/X64/Thunk16.S

@@ -1,334 +0,0 @@
-#------------------------------------------------------------------------------
-#
-# Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution.  The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php.
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-# Module Name:
-#
-#   Thunk16.S
-#
-# Abstract:
-#
-#   Real mode thunk
-#
-#------------------------------------------------------------------------------
-
-#include <Library/BaseLib.h>
-
-ASM_GLOBAL ASM_PFX(m16Start)
-ASM_GLOBAL ASM_PFX(m16Size)
-ASM_GLOBAL ASM_PFX(mThunk16Attr)
-ASM_GLOBAL ASM_PFX(m16Gdt)
-ASM_GLOBAL ASM_PFX(m16GdtrBase)
-ASM_GLOBAL ASM_PFX(mTransition)
-ASM_GLOBAL ASM_PFX(InternalAsmThunk16)
-
-# define the structure of IA32_REGS
-.set  _EDI, 0       #size 4
-.set  _ESI, 4       #size 4
-.set  _EBP, 8       #size 4
-.set  _ESP, 12      #size 4
-.set  _EBX, 16      #size 4
-.set  _EDX, 20      #size 4
-.set  _ECX, 24      #size 4
-.set  _EAX, 28      #size 4
-.set  _DS,  32      #size 2
-.set  _ES,  34      #size 2
-.set  _FS,  36      #size 2
-.set  _GS,  38      #size 2
-.set  _EFLAGS, 40   #size 8
-.set  _EIP, 48      #size 4
-.set  _CS, 52       #size 2
-.set  _SS, 54       #size 2
-.set  IA32_REGS_SIZE, 56
-
-    .data
-
-.set Lm16Size, ASM_PFX(InternalAsmThunk16) - ASM_PFX(m16Start)
-ASM_PFX(m16Size):         .word      Lm16Size
-.set  LmThunk16Attr, L_ThunkAttr - ASM_PFX(m16Start)
-ASM_PFX(mThunk16Attr):    .word      LmThunk16Attr
-.set Lm16Gdt, ASM_PFX(NullSeg) - ASM_PFX(m16Start)
-ASM_PFX(m16Gdt):          .word      Lm16Gdt
-.set Lm16GdtrBase, _16GdtrBase - ASM_PFX(m16Start)
-ASM_PFX(m16GdtrBase):     .word      Lm16GdtrBase
-.set LmTransition, _EntryPoint - ASM_PFX(m16Start)
-ASM_PFX(mTransition):     .word      LmTransition
-
-    .text
-
-ASM_PFX(m16Start):
-
-SavedGdt:    .space 10
-
-#------------------------------------------------------------------------------
-# _BackFromUserCode() takes control in real mode after 'retf' has been executed
-# by user code. It will be shadowed to somewhere in memory below 1MB.
-#------------------------------------------------------------------------------
-ASM_GLOBAL ASM_PFX(BackFromUserCode)
-ASM_PFX(BackFromUserCode):
-    #
-    # The order of saved registers on the stack matches the order they appears
-    # in IA32_REGS structure. This facilitates wrapper function to extract them
-    # into that structure.
-    #
-    # Some instructions for manipulation of segment registers have to be written
-    # in opcode since 64-bit MASM prevents accesses to those registers.
-    #
-    .byte 0x16                          # push ss
-    .byte 0xe                           # push cs
-    .byte 0x66
-    call    L_Base                       # push eip
-L_Base:
-    .byte 0x66
-    pushq   $0                          # reserved high order 32 bits of EFlags
-    .byte 0x66, 0x9c                    # pushfd actually
-    cli                                 # disable interrupts
-    push    %gs
-    push    %fs
-    .byte 6                             # push es
-    .byte 0x1e                          # push ds
-    .byte 0x66,0x60                     # pushad
-    .byte 0x66,0xba                     # mov edx, imm32
-L_ThunkAttr:  .space  4
-    testb   $THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15, %dl
-    jz      L_1
-    movl    $0x15cd2401,%eax            # mov ax, 2401h & int 15h
-    cli                                 # disable interrupts
-    jnc     L_2
-L_1:
-    testb   $THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL, %dl
-    jz      L_2
-    inb     $0x92,%al
-    orb     $2,%al
-    outb    %al, $0x92                   # deactivate A20M#
-L_2:
-    xorw    %ax, %ax                     # xor eax, eax
-    movl    %ss, %eax                    # mov ax, ss
-    lea     IA32_REGS_SIZE(%esp), %bp
-    #
-    # rsi in the following 2 instructions is indeed bp in 16-bit code
-    #
-    movw    %bp, (_ESP - IA32_REGS_SIZE)(%rsi)
-    .byte 0x66
-    movl    (_EIP - IA32_REGS_SIZE)(%rsi), %ebx
-    shlw    $4,%ax                      # shl eax, 4
-    addw    %ax,%bp                     # add ebp, eax
-    movw    %cs,%ax
-    shlw    $4,%ax
-    lea     (L_64BitCode - L_Base)(%ebx, %eax), %ax
-    .byte 0x66,0x2e,0x89,0x87           # mov cs:[bx + (L_64Eip - L_Base)], eax
-    .word   L_64Eip - L_Base
-    .byte 0x66,0xb8                     # mov eax, imm32
-L_SavedCr4: .space      4
-    movq    %rax, %cr4
-    #
-    # rdi in the instruction below is indeed bx in 16-bit code
-    #
-    .byte 0x66,0x2e                     # 2eh is "cs:" segment override
-    lgdt    (SavedGdt - L_Base)(%rdi)
-    .byte 0x66
-    movl    $0xc0000080,%ecx
-    rdmsr
-    orb     $1,%ah
-    wrmsr
-    .byte 0x66,0xb8                     # mov eax, imm32
-L_SavedCr0: .space      4
-    movq    %rax, %cr0
-    .byte 0x66,0xea                     # jmp far cs:L_64Bit
-L_64Eip:    .space      4
-L_SavedCs:  .space      2
-L_64BitCode:
-    .byte   0x90
-    .byte   0x48,0xbc                  # mov rsp, imm64
-L_SavedSp:  .space      8              # restore stack
-    nop
-    ret
-
-_EntryPoint: .long      ASM_PFX(ToUserCode) - ASM_PFX(m16Start)
-             .word      CODE16
-_16Gdtr:     .word      GDT_SIZE - 1
-_16GdtrBase: .quad      0
-_16Idtr:     .word      0x3ff
-             .long      0
-
-#------------------------------------------------------------------------------
-# _ToUserCode() takes control in real mode before passing control to user code.
-# It will be shadowed to somewhere in memory below 1MB.
-#------------------------------------------------------------------------------
-ASM_GLOBAL ASM_PFX(ToUserCode)
-ASM_PFX(ToUserCode):
-    movl    %edx,%ss                    # set new segment selectors
-    movl    %edx,%ds
-    movl    %edx,%es
-    movl    %edx,%fs
-    movl    %edx,%gs
-    .byte 0x66
-    movl    $0xc0000080,%ecx
-    movq    %rax, %cr0
-    rdmsr
-    andb    $0xfe, %ah                  # $0b11111110
-    wrmsr
-    movq    %rbp, %cr4
-    movl    %esi,%ss                    # set up 16-bit stack segment
-    movw    %bx,%sp                     # set up 16-bit stack pointer
-    .byte 0x66                          # make the following call 32-bit
-    call    L_Base1                       # push eip
-L_Base1:
-    popw    %bp                         # ebp <- address of L_Base1
-    pushq   (IA32_REGS_SIZE + 2)(%esp)
-    lea     0x0c(%rsi), %eax
-    pushq   %rax
-    lret                                # execution begins at next instruction
-L_RealMode:
-    .byte 0x66,0x2e                     # CS and operand size override
-    lidt    (_16Idtr - L_Base1)(%rsi)
-    .byte 0x66,0x61                     # popad
-    .byte 0x1f                          # pop ds
-    .byte 0x7                           # pop es
-    .byte 0x0f, 0xa1                    # pop fs
-    .byte 0x0f, 0xa9                    # pop gs
-    .byte 0x66, 0x9d                    # popfd
-    leaw    4(%esp),%sp                 # skip high order 32 bits of EFlags
-    .byte 0x66                          # make the following retf 32-bit
-    lret                                # transfer control to user code
-
-.set  CODE16,  ASM_PFX(_16Code) - .
-.set  DATA16,  ASM_PFX(_16Data) - .
-.set  DATA32,  ASM_PFX(_32Data) - .
-
-ASM_PFX(NullSeg):   .quad      0
-ASM_PFX(_16Code):
-            .word -1
-            .word 0
-            .byte 0
-            .byte 0x9b
-            .byte 0x8f                  # 16-bit segment, 4GB limit
-            .byte 0
-ASM_PFX(_16Data):
-            .word -1
-            .word 0
-            .byte 0
-            .byte 0x93
-            .byte 0x8f                  # 16-bit segment, 4GB limit
-            .byte 0
-ASM_PFX(_32Data):
-            .word -1
-            .word 0
-            .byte 0
-            .byte 0x93
-            .byte 0xcf                  # 16-bit segment, 4GB limit
-            .byte 0
-
-.set  GDT_SIZE, . - ASM_PFX(NullSeg)
-
-#------------------------------------------------------------------------------
-# IA32_REGISTER_SET *
-# EFIAPI
-# InternalAsmThunk16 (
-#   IN      IA32_REGISTER_SET         *RegisterSet,
-#   IN OUT  VOID                      *Transition
-#   );
-#------------------------------------------------------------------------------
-
-ASM_GLOBAL ASM_PFX(InternalAsmThunk16)
-ASM_PFX(InternalAsmThunk16):
-    pushq   %rbp
-    pushq   %rbx
-    pushq   %rsi
-    pushq   %rdi
-
-    movl    %ds, %ebx
-    pushq   %rbx      # Save ds segment register on the stack
-    movl    %es, %ebx
-    pushq   %rbx      # Save es segment register on the stack
-    movl    %ss, %ebx
-    pushq   %rbx      # Save ss segment register on the stack
-
-    .byte   0x0f, 0xa0                  #push   fs
-    .byte   0x0f, 0xa8                  #push   gs
-    movq    %rcx, %rsi
-    movzwl  _SS(%rsi), %r8d
-    movl    _ESP(%rsi), %edi
-    lea     -(IA32_REGS_SIZE + 4)(%edi), %rdi
-    imul    $16, %r8d, %eax
-    movl    %edi,%ebx                   # ebx <- stack for 16-bit code
-    pushq   $(IA32_REGS_SIZE / 4)
-    addl    %eax,%edi                   # edi <- linear address of 16-bit stack
-    popq    %rcx
-    rep
-    movsl                               # copy RegSet
-    lea     (L_SavedCr4 - ASM_PFX(m16Start))(%rdx), %ecx
-    movl    %edx,%eax                   # eax <- transition code address
-    andl    $0xf,%edx
-    shll    $12,%eax                    # segment address in high order 16 bits
-    .set LBackFromUserCodeDelta, ASM_PFX(BackFromUserCode) - ASM_PFX(m16Start)
-    lea     (LBackFromUserCodeDelta)(%rdx), %ax
-    stosl                               # [edi] <- return address of user code
-    sgdt    0x60(%rsp)                  # save GDT stack in argument space
-    movzwq  0x60(%rsp), %r10            # r10 <- GDT limit
-    lea     ((ASM_PFX(InternalAsmThunk16) - L_SavedCr4) + 0xf)(%rcx), %r11
-    andq    $0xfffffffffffffff0, %r11   # r11 <- 16-byte aligned shadowed GDT table in real mode buffer
-
-    movw    %r10w, (SavedGdt - L_SavedCr4)(%rcx)       # save the limit of shadowed GDT table
-    movq    %r11, (SavedGdt - L_SavedCr4 + 0x2)(%rcx)  # save the base address of shadowed GDT table
-
-    movq    0x62(%rsp) ,%rsi            # rsi <- the original GDT base address
-    xchg   %r10, %rcx                   # save rcx to r10 and initialize rcx to be the limit of GDT table
-    incq   %rcx                         # rcx <- the size of memory to copy
-    xchg   %r11, %rdi                   # save rdi to r11 and initialize rdi to the base address of shadowed GDT table
-    rep
-    movsb                               # perform memory copy to shadow GDT table
-    movq   %r10, %rcx                   # restore the orignal rcx before memory copy
-    movq   %r11, %rdi                   # restore the original rdi before memory copy
-
-    sidt    0x50(%rsp)
-    movq    %cr0, %rax
-    .set LSavedCrDelta, L_SavedCr0 - L_SavedCr4
-    movl    %eax, (LSavedCrDelta)(%rcx)
-    andl    $0x7ffffffe,%eax            # clear PE, PG bits
-    movq    %cr4, %rbp
-    movl    %ebp, (%rcx)                # save CR4 in SavedCr4
-    andl    $0xffffffcf,%ebp            # clear PAE, PSE bits
-    movl    %r8d, %esi                  # esi <- 16-bit stack segment
-    .byte      0x6a, DATA32
-    popq    %rdx
-    lgdt    (_16Gdtr - L_SavedCr4)(%rcx)
-    movl    %edx,%ss
-    pushfq
-    lea     -8(%rdx), %edx
-    lea     L_RetFromRealMode(%rip), %r8
-    pushq   %r8
-    movl    %cs, %r8d
-    movw    %r8w, (L_SavedCs - L_SavedCr4)(%rcx)
-    movq    %rsp, (L_SavedSp - L_SavedCr4)(%rcx)
-    .byte   0xff, 0x69                  #  jmp (_EntryPoint - L_SavedCr4)(%rcx)
-    .set    Ltemp1, _EntryPoint - L_SavedCr4
-    .byte   Ltemp1
-L_RetFromRealMode:
-    popfq
-    lgdt    0x60(%rsp)                  # restore protected mode GDTR
-    lidt    0x50(%rsp)                  # restore protected mode IDTR
-    lea     -IA32_REGS_SIZE(%rbp), %eax
-    .byte 0x0f, 0xa9                    # pop gs
-    .byte 0x0f, 0xa1                    # pop fs
-
-    popq     %rbx
-    movl     %ebx, %ss
-    popq     %rbx
-    movl     %ebx, %es
-    popq     %rbx
-    movl     %ebx, %ds
-
-    popq    %rdi
-    popq    %rsi
-    popq    %rbx
-    popq    %rbp
-
-    ret