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@@ -51,18 +51,16 @@ PlatformQemuUc32BaseInitialization (
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IN OUT EFI_HOB_PLATFORM_INFO *PlatformInfoHob
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)
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{
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- UINT32 LowerMemorySize;
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-
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if (PlatformInfoHob->HostBridgeDevId == 0xffff /* microvm */) {
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return;
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}
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if (PlatformInfoHob->HostBridgeDevId == INTEL_Q35_MCH_DEVICE_ID) {
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- LowerMemorySize = PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob);
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+ PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob);
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ASSERT (PcdGet64 (PcdPciExpressBaseAddress) <= MAX_UINT32);
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- ASSERT (PcdGet64 (PcdPciExpressBaseAddress) >= LowerMemorySize);
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+ ASSERT (PcdGet64 (PcdPciExpressBaseAddress) >= PlatformInfoHob->LowMemory);
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- if (LowerMemorySize <= BASE_2GB) {
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+ if (PlatformInfoHob->LowMemory <= BASE_2GB) {
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// Newer qemu with gigabyte aligned memory,
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// 32-bit pci mmio window is 2G -> 4G then.
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PlatformInfoHob->Uc32Base = BASE_2GB;
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@@ -92,8 +90,8 @@ PlatformQemuUc32BaseInitialization (
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// variable MTRR suffices by truncating the size to a whole power of two,
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// while keeping the end affixed to 4GB. This will round the base up.
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//
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- LowerMemorySize = PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob);
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- PlatformInfoHob->Uc32Size = GetPowerOfTwo32 ((UINT32)(SIZE_4GB - LowerMemorySize));
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+ PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob);
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+ PlatformInfoHob->Uc32Size = GetPowerOfTwo32 ((UINT32)(SIZE_4GB - PlatformInfoHob->LowMemory));
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PlatformInfoHob->Uc32Base = (UINT32)(SIZE_4GB - PlatformInfoHob->Uc32Size);
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//
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// Assuming that LowerMemorySize is at least 1 byte, Uc32Size is at most 2GB.
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@@ -101,13 +99,13 @@ PlatformQemuUc32BaseInitialization (
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//
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ASSERT (PlatformInfoHob->Uc32Base >= BASE_2GB);
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- if (PlatformInfoHob->Uc32Base != LowerMemorySize) {
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+ if (PlatformInfoHob->Uc32Base != PlatformInfoHob->LowMemory) {
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DEBUG ((
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DEBUG_VERBOSE,
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"%a: rounded UC32 base from 0x%x up to 0x%x, for "
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"an UC32 size of 0x%x\n",
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__FUNCTION__,
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- LowerMemorySize,
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+ PlatformInfoHob->LowMemory,
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PlatformInfoHob->Uc32Base,
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PlatformInfoHob->Uc32Size
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));
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@@ -280,6 +278,34 @@ PlatformGetFirstNonAddressCB (
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}
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}
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+/**
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+ Store the low (below 4G) memory size in
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+ PlatformInfoHob->LowMemory
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+**/
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+STATIC
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+VOID
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+PlatformGetLowMemoryCB (
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+ IN EFI_E820_ENTRY64 *E820Entry,
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+ IN OUT EFI_HOB_PLATFORM_INFO *PlatformInfoHob
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+ )
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+{
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+ UINT64 Candidate;
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+
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+ if (E820Entry->Type != EfiAcpiAddressRangeMemory) {
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+ return;
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+ }
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+
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+ Candidate = E820Entry->BaseAddr + E820Entry->Length;
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+ if (Candidate >= BASE_4GB) {
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+ return;
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+ }
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+
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+ if (PlatformInfoHob->LowMemory < Candidate) {
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+ DEBUG ((DEBUG_INFO, "%a: LowMemory=0x%Lx\n", __FUNCTION__, Candidate));
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+ PlatformInfoHob->LowMemory = (UINT32)Candidate;
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+ }
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+}
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+
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/**
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Iterate over the entries in QEMU's fw_cfg E820 RAM map, call the
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passed callback for each entry.
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@@ -396,14 +422,13 @@ GetHighestSystemMemoryAddressFromPvhMemmap (
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return HighestAddress;
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}
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-UINT32
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+VOID
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EFIAPI
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PlatformGetSystemMemorySizeBelow4gb (
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IN EFI_HOB_PLATFORM_INFO *PlatformInfoHob
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)
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{
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EFI_STATUS Status;
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- UINT64 LowerMemorySize = 0;
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UINT8 Cmos0x34;
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UINT8 Cmos0x35;
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@@ -411,12 +436,13 @@ PlatformGetSystemMemorySizeBelow4gb (
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(CcProbe () != CcGuestTypeIntelTdx))
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{
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// Get the information from PVH memmap
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- return (UINT32)GetHighestSystemMemoryAddressFromPvhMemmap (TRUE);
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+ PlatformInfoHob->LowMemory = (UINT32)GetHighestSystemMemoryAddressFromPvhMemmap (TRUE);
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+ return;
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}
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- Status = PlatformScanOrAdd64BitE820Ram (FALSE, &LowerMemorySize, NULL);
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- if ((Status == EFI_SUCCESS) && (LowerMemorySize > 0)) {
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- return (UINT32)LowerMemorySize;
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+ Status = PlatformScanE820 (PlatformGetLowMemoryCB, PlatformInfoHob);
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+ if (!EFI_ERROR (Status) && (PlatformInfoHob->LowMemory > 0)) {
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+ return;
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}
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//
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@@ -431,7 +457,7 @@ PlatformGetSystemMemorySizeBelow4gb (
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Cmos0x34 = (UINT8)PlatformCmosRead8 (0x34);
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Cmos0x35 = (UINT8)PlatformCmosRead8 (0x35);
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- return (UINT32)(((UINTN)((Cmos0x35 << 8) + Cmos0x34) << 16) + SIZE_16MB);
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+ PlatformInfoHob->LowMemory = (UINT32)(((UINTN)((Cmos0x35 << 8) + Cmos0x34) << 16) + SIZE_16MB);
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}
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STATIC
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@@ -967,7 +993,6 @@ PlatformQemuInitializeRam (
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IN EFI_HOB_PLATFORM_INFO *PlatformInfoHob
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)
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{
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- UINT64 LowerMemorySize;
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UINT64 UpperMemorySize;
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MTRR_SETTINGS MtrrSettings;
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EFI_STATUS Status;
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@@ -977,7 +1002,7 @@ PlatformQemuInitializeRam (
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//
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// Determine total memory size available
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//
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- LowerMemorySize = PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob);
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+ PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob);
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if (PlatformInfoHob->BootMode == BOOT_ON_S3_RESUME) {
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//
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@@ -1011,14 +1036,14 @@ PlatformQemuInitializeRam (
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UINT32 TsegSize;
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TsegSize = PlatformInfoHob->Q35TsegMbytes * SIZE_1MB;
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- PlatformAddMemoryRangeHob (BASE_1MB, LowerMemorySize - TsegSize);
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+ PlatformAddMemoryRangeHob (BASE_1MB, PlatformInfoHob->LowMemory - TsegSize);
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PlatformAddReservedMemoryBaseSizeHob (
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- LowerMemorySize - TsegSize,
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+ PlatformInfoHob->LowMemory - TsegSize,
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TsegSize,
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TRUE
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);
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} else {
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- PlatformAddMemoryRangeHob (BASE_1MB, LowerMemorySize);
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+ PlatformAddMemoryRangeHob (BASE_1MB, PlatformInfoHob->LowMemory);
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}
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//
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@@ -1196,9 +1221,10 @@ PlatformQemuInitializeRamForS3 (
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// Make sure the TSEG area that we reported as a reserved memory resource
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// cannot be used for reserved memory allocations.
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//
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+ PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob);
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TsegSize = PlatformInfoHob->Q35TsegMbytes * SIZE_1MB;
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BuildMemoryAllocationHob (
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- PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob) - TsegSize,
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+ PlatformInfoHob->LowMemory - TsegSize,
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TsegSize,
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EfiReservedMemoryType
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);
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