Armada70x0DbBoardDescLib.c 3.3 KB

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  1. /**
  2. *
  3. * Copyright (C) 2018, Marvell International Ltd. and its affiliates.
  4. *
  5. * SPDX-License-Identifier: BSD-2-Clause-Patent
  6. *
  7. **/
  8. #include <Uefi.h>
  9. #include <Library/ArmadaBoardDescLib.h>
  10. #include <Library/BaseMemoryLib.h>
  11. #include <Library/DebugLib.h>
  12. #include <Library/IoLib.h>
  13. #include <Library/MemoryAllocationLib.h>
  14. #include <Library/MvGpioLib.h>
  15. #include <Library/UefiBootServicesTableLib.h>
  16. //
  17. // General purpose routine for per-board initalization
  18. //
  19. EFI_STATUS
  20. ArmadaBoardInit (
  21. VOID
  22. )
  23. {
  24. return EFI_SUCCESS;
  25. }
  26. //
  27. // GPIO Expander
  28. //
  29. STATIC MV_GPIO_EXPANDER mGpioExpander = {
  30. PCA9555_ID,
  31. 0x21,
  32. 0x0,
  33. };
  34. EFI_STATUS
  35. EFIAPI
  36. ArmadaBoardGpioExpanderGet (
  37. IN OUT MV_GPIO_EXPANDER **GpioExpanders,
  38. IN OUT UINTN *GpioExpanderCount
  39. )
  40. {
  41. *GpioExpanderCount = 1;
  42. *GpioExpanders = &mGpioExpander;
  43. return EFI_SUCCESS;
  44. }
  45. //
  46. // PCIE
  47. //
  48. STATIC
  49. MV_PCIE_CONTROLLER mPcieController[] = {
  50. { /* PCIE2 @0xF2640000 */
  51. .PcieDbiAddress = 0xF2640000,
  52. .ConfigSpaceAddress = 0xE0000000,
  53. .HaveResetGpio = FALSE,
  54. .PcieResetGpio = { 0 },
  55. .PcieBusMin = 0,
  56. .PcieBusMax = 0xFE,
  57. .PcieIoTranslation = 0xEFF00000,
  58. .PcieIoWinBase = 0x0,
  59. .PcieIoWinSize = 0x10000,
  60. .PcieMmio32Translation = 0,
  61. .PcieMmio32WinBase = 0xC0000000,
  62. .PcieMmio32WinSize = 0x20000000,
  63. .PcieMmio64Translation = 0,
  64. .PcieMmio64WinBase = 0x800000000,
  65. .PcieMmio64WinSize = 0x100000000,
  66. }
  67. };
  68. /**
  69. Return the number and description of PCIE controllers used on the platform.
  70. @param[in out] **PcieControllers Array containing PCIE controllers'
  71. description.
  72. @param[in out] *PcieControllerCount Amount of used PCIE controllers.
  73. @retval EFI_SUCCESS The data were obtained successfully.
  74. @retval other Return error status.
  75. **/
  76. EFI_STATUS
  77. EFIAPI
  78. ArmadaBoardPcieControllerGet (
  79. IN OUT MV_PCIE_CONTROLLER CONST **PcieControllers,
  80. IN OUT UINTN *PcieControllerCount
  81. )
  82. {
  83. *PcieControllers = mPcieController;
  84. *PcieControllerCount = ARRAY_SIZE (mPcieController);
  85. return EFI_SUCCESS;
  86. }
  87. //
  88. // Order of devices in SdMmcDescTemplate has to be in par with ArmadaSoCDescLib
  89. //
  90. STATIC
  91. MV_BOARD_SDMMC_DESC mSdMmcDescTemplate[] = {
  92. { /* eMMC 0xF06E0000 */
  93. 0, /* SOC will be filled by MvBoardDescDxe */
  94. 0, /* SdMmcDevCount will be filled by MvBoardDescDxe */
  95. FALSE, /* Xenon1v8Enabled */
  96. FALSE, /* Xenon8BitBusEnabled */
  97. TRUE, /* XenonSlowModeEnabled */
  98. 0x40, /* XenonTuningStepDivisor */
  99. EmbeddedSlot /* SlotType */
  100. },
  101. { /* SD/MMC 0xF2780000 */
  102. 0, /* SOC will be filled by MvBoardDescDxe */
  103. 0, /* SdMmcDevCount will be filled by MvBoardDescDxe */
  104. TRUE, /* Xenon1v8Enabled */
  105. FALSE, /* Xenon8BitBusEnabled */
  106. FALSE, /* XenonSlowModeEnabled */
  107. 0x19, /* XenonTuningStepDivisor */
  108. EmbeddedSlot /* SlotType */
  109. }
  110. };
  111. EFI_STATUS
  112. EFIAPI
  113. ArmadaBoardDescSdMmcGet (
  114. OUT UINTN *SdMmcDevCount,
  115. OUT MV_BOARD_SDMMC_DESC **SdMmcDesc
  116. )
  117. {
  118. *SdMmcDesc = mSdMmcDescTemplate;
  119. *SdMmcDevCount = ARRAY_SIZE (mSdMmcDescTemplate);
  120. return EFI_SUCCESS;
  121. }