PeiServicesTablePointer.c 2.1 KB

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  1. /** @file
  2. PEI Services Table Pointer Library.
  3. Copyright (c) 2022 Loongson Technology Corporation Limited. All rights reserved.<BR>
  4. SPDX-License-Identifier: BSD-2-Clause-Patent
  5. **/
  6. #include <PiPei.h>
  7. #include <Library/PeiServicesTablePointerLib.h>
  8. #include <Library/DebugLib.h>
  9. #include "Library/Cpu.h"
  10. #include "PeiServicesTablePointer.h"
  11. /**
  12. Caches a pointer PEI Services Table.
  13. Caches the pointer to the PEI Services Table specified by PeiServicesTablePointer
  14. in a platform specific manner.
  15. If PeiServicesTablePointer is NULL, then ASSERT ().
  16. @param PeiServicesTablePointer The address of PeiServices pointer.
  17. **/
  18. VOID
  19. EFIAPI
  20. SetPeiServicesTablePointer (
  21. IN CONST EFI_PEI_SERVICES ** PeiServicesTablePointer
  22. )
  23. {
  24. LoongarchWriteqKs0 ((UINTN)PeiServicesTablePointer);
  25. }
  26. /**
  27. Retrieves the cached value of the PEI Services Table pointer.
  28. Returns the cached value of the PEI Services Table pointer in a CPU specific manner
  29. as specified in the CPU binding section of the Platform Initialization Pre-EFI
  30. Initialization Core Interface Specification.
  31. If the cached PEI Services Table pointer is NULL, then ASSERT ().
  32. @return The pointer to PeiServices.
  33. **/
  34. CONST EFI_PEI_SERVICES **
  35. EFIAPI
  36. GetPeiServicesTablePointer (
  37. VOID
  38. )
  39. {
  40. UINTN val;
  41. LoongarchReadqKs0 (&val);
  42. return (CONST EFI_PEI_SERVICES **)val;
  43. }
  44. /**
  45. Perform CPU specific actions required to migrate the PEI Services Table
  46. pointer from temporary RAM to permanent RAM.
  47. For IA32 CPUs, the PEI Services Table pointer is stored in the 4 bytes
  48. immediately preceding the Interrupt Descriptor Table (IDT) in memory.
  49. For X64 CPUs, the PEI Services Table pointer is stored in the 8 bytes
  50. immediately preceding the Interrupt Descriptor Table (IDT) in memory.
  51. For Itanium and ARM CPUs, a the PEI Services Table Pointer is stored in
  52. a dedicated CPU register. This means that there is no memory storage
  53. associated with storing the PEI Services Table pointer, so no additional
  54. migration actions are required for Itanium or ARM CPUs.
  55. */
  56. VOID
  57. EFIAPI
  58. MigratePeiServicesTablePointer (
  59. VOID
  60. )
  61. {
  62. return;
  63. }