UbaGpioInitLib.c 7.3 KB

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  1. /** @file
  2. UbaGpioInitLib implementation.
  3. @copyright
  4. Copyright 2016 - 2021 Intel Corporation. <BR>
  5. SPDX-License-Identifier: BSD-2-Clause-Patent
  6. **/
  7. #include <PiPei.h>
  8. #include <Ppi/UbaCfgDb.h>
  9. #include <Ppi/DynamicSiLibraryPpi.h>
  10. #include <Library/PeiServicesLib.h>
  11. #include <Library/DebugLib.h>
  12. #include <Library/PcdLib.h>
  13. #include <Library/MemoryAllocationLib.h>
  14. #include <Library/UbaGpioInitLib.h>
  15. #include <Library/GpioLib.h>
  16. #include <Library/PeiDxeSmmGpioLib/GpioLibrary.h>
  17. #include <Library/HobLib.h>
  18. #include <Library/PchMultiPchBase.h>
  19. static GPIO_INIT_CONFIG meSPIConfig[] =
  20. {
  21. { GPIO_SKL_H_GPP_A0, { GpioPadModeNative3, GpioHostOwnGpio, GpioDirIn, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone, GpioPadConfigLock } },//GPP_A_0_LPC_RCIN_N_ESPI_ALERT1_N
  22. { GPIO_SKL_H_GPP_A1, { GpioPadModeNative3, GpioHostOwnGpio, GpioDirInOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermWpu20K, GpioPadConfigLock } },//GPP_A_1_LAD_0_ESPI_IO_0
  23. { GPIO_SKL_H_GPP_A2, { GpioPadModeNative3, GpioHostOwnGpio, GpioDirInOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermWpu20K, GpioPadConfigLock } },//GPP_A_2_LAD_1_ESPI_IO_1
  24. { GPIO_SKL_H_GPP_A3, { GpioPadModeNative3, GpioHostOwnGpio, GpioDirInOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermWpu20K, GpioPadConfigLock } },//GPP_A_3_LAD_2_ESPI_IO_2
  25. { GPIO_SKL_H_GPP_A4, { GpioPadModeNative3, GpioHostOwnGpio, GpioDirInOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermWpu20K, GpioPadConfigLock } },//GPP_A_4_LAD_3_ESPI_IO_3
  26. { GPIO_SKL_H_GPP_A5, { GpioPadModeNative3, GpioHostOwnGpio, GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermWpu20K, GpioPadConfigLock } },//GPP_A_5_LPC_LFRAME_N_ESPI_CS0_N
  27. { GPIO_SKL_H_GPP_A6, { GpioPadModeNative3, GpioHostOwnGpio, GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone, GpioPadConfigLock } },//GPP_A_6_IRQ_LPC_SERIRQ_ESPI_CS1_N
  28. { GPIO_SKL_H_GPP_A7, { GpioPadModeNative3, GpioHostOwnGpio, GpioDirIn, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone, GpioPadConfigLock } },//GPP_A_7_IRQ_LPC_PIRQA_N_ESPI_ALERT0_N
  29. { GPIO_SKL_H_GPP_A8, { GpioPadModeNative1, GpioHostOwnGpio, GpioDirInOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone, GpioPadConfigLock } },//GPP_A_8_FM_LPC_CLKRUN_N
  30. { GPIO_SKL_H_GPP_A9, { GpioPadModeNative3, GpioHostOwnGpio, GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermWpd20K, GpioPadConfigLock } },//GPP_A_9_CLK_24M_66M_LPC0_ESPI
  31. { GPIO_SKL_H_GPP_A10, { GpioPadModeNative1, GpioHostOwnGpio, GpioDirIn, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone, GpioPadConfigLock } },//GPP_A_10_TP_PCH_GPP_A_10
  32. { GPIO_SKL_H_GPP_A11, { GpioPadModeGpio, GpioHostOwnGpio, GpioDirIn, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone, GpioPadConfigLock } },//GPP_A_11_FM_LPC_PME_N
  33. { GPIO_SKL_H_GPP_A12, { GpioPadModeGpio, GpioHostOwnAcpi, GpioDirInInv, GpioOutDefault, GpioIntLevel | GpioIntSci, GpioPlatformReset, GpioTermNone } },//GPP_A_12_IRQ_PCH_SCI_WHEA_N
  34. { GPIO_SKL_H_GPP_A13, { GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone, GpioPadConfigLock | GpioOutputStateLock } },//GPP_A_13_FM_EUP_LOT6_N
  35. { GPIO_SKL_H_GPP_A14, { GpioPadModeNative3, GpioHostOwnGpio, GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone, GpioPadConfigLock } },//GPP_A_14_ESPI_RESET_N
  36. { GPIO_SKL_H_GPP_A15, { GpioPadModeGpio, GpioHostOwnGpio, GpioDirIn, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone, GpioPadConfigLock } },//GPP_A_15_SUSACK_N
  37. { GPIO_SKL_H_GPP_A16, { GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut, GpioOutHigh, GpioIntDis, GpioHostDeepReset, GpioTermNone, GpioPadConfigLock | GpioOutputStateLock } },// CLK_48MHZ_PCH [GPP_A_16_CLKOUT_LPC_2]
  38. };
  39. VOID
  40. UpdateeSPIConfiguration (
  41. IN UINT32 NumberOfItems,
  42. IN GPIO_INIT_CONFIG *GpioInitTableAddress
  43. )
  44. {
  45. UINT32 Index1;
  46. UINT32 Index2;
  47. for(Index1 = 0; Index1 < sizeof (meSPIConfig)/sizeof (GPIO_INIT_CONFIG); Index1++) {
  48. for (Index2 = 0; Index2 < NumberOfItems; Index2++) {
  49. if (meSPIConfig[Index1].GpioPad == (GpioInitTableAddress+Index2)->GpioPad){
  50. (GpioInitTableAddress + Index2)->GpioConfig = meSPIConfig[Index1].GpioConfig;
  51. }
  52. }
  53. }
  54. }
  55. EFI_STATUS
  56. PlatformInitGpios (
  57. VOID
  58. )
  59. {
  60. EFI_STATUS Status;
  61. UBA_CONFIG_DATABASE_PPI *UbaConfigPpi = NULL;
  62. GPIO_INIT_CONFIG *GpioTable;
  63. UINTN TableSize;
  64. UINT32 SpiConfigValue;
  65. GPIO_INIT_CONFIG *mPchGpioInitData = NULL;
  66. VOID *HobPtr;
  67. DYNAMIC_SI_LIBARY_PPI *DynamicSiLibraryPpi = NULL;
  68. Status = PeiServicesLocatePpi (&gUbaConfigDatabasePpiGuid, 0, NULL, (VOID **) &UbaConfigPpi);
  69. if (EFI_ERROR (Status)) {
  70. return Status;
  71. }
  72. Status = PeiServicesLocatePpi (&gDynamicSiLibraryPpiGuid, 0, NULL, (VOID **) &DynamicSiLibraryPpi);
  73. if (EFI_ERROR (Status)) {
  74. ASSERT_EFI_ERROR (Status);
  75. return Status;
  76. }
  77. TableSize = PcdGet32(PcdOemSku_GPIO_TABLE_SIZE);
  78. DEBUG ((DEBUG_INFO, "UBA:Size of GpioTable 0x%X, blocks: 0x%X.\n", TableSize, (TableSize/sizeof (GPIO_INIT_CONFIG)) ));
  79. Status = PeiServicesAllocatePool (TableSize, (VOID** ) &GpioTable);
  80. if (EFI_ERROR(Status)) {
  81. return Status;
  82. }
  83. Status = UbaConfigPpi->GetData (
  84. UbaConfigPpi,
  85. &gPlatformGpioInitDataGuid,
  86. GpioTable,
  87. &TableSize
  88. );
  89. if (EFI_ERROR(Status)) {
  90. return Status;
  91. }
  92. SpiConfigValue = 0;
  93. DynamicSiLibraryPpi->PchPcrRead32ByPchId (PCH_LEGACY_ID, PID_ESPISPI, R_PCH_PCR_SPI_CONF_VALUE, &SpiConfigValue);
  94. DEBUG((DEBUG_INFO, "SPI Config Value = %x; ", SpiConfigValue));
  95. if (SpiConfigValue & B_ESPI_ENABLE_STRAP) {
  96. DEBUG((DEBUG_INFO, "eSPI Mode\n"));
  97. } else {
  98. DEBUG((DEBUG_INFO, "LPC Mode\n"));
  99. }
  100. if (SpiConfigValue & B_ESPI_ENABLE_STRAP) {
  101. mPchGpioInitData = AllocateZeroPool((UINTN)TableSize);
  102. if (mPchGpioInitData != NULL){
  103. CopyMem(mPchGpioInitData, GpioTable, TableSize);
  104. UpdateeSPIConfiguration((UINT32)(TableSize / sizeof(GPIO_INIT_CONFIG)), mPchGpioInitData);
  105. } else {
  106. DEBUG ((DEBUG_ERROR, "\n*** ERROR!!!! AllocateZeroPool returned NULL pointer when trying to allocate buffer for 'mPchGpioInitData'!!!! ***\n"));
  107. ASSERT_EFI_ERROR (EFI_OUT_OF_RESOURCES);
  108. return Status;
  109. }
  110. } else {
  111. // Point to LPC config values
  112. mPchGpioInitData = GpioTable;
  113. }
  114. DEBUG ((DEBUG_INFO, "UBA: Start ConfigureGpio().\n"));
  115. Status = DynamicSiLibraryPpi->GpioConfigurePadsByPchId (PCH_LEGACY_ID, TableSize/sizeof (GPIO_INIT_CONFIG), mPchGpioInitData);
  116. DEBUG ((DEBUG_INFO, "UBA: ConfigureGpio() end.\n"));
  117. HobPtr = BuildGuidDataHob (
  118. &gPlatformGpioConfigGuid,
  119. mPchGpioInitData,
  120. TableSize
  121. );
  122. if (HobPtr == NULL) {
  123. DEBUG ((DEBUG_ERROR, "PlatformInitGpios(): ERROR: BuildGuidDataHob failed!\n"));
  124. ASSERT (FALSE);
  125. return EFI_OUT_OF_RESOURCES;
  126. }
  127. return Status;
  128. }