SystemBoard.h 1.9 KB

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  1. /** @file
  2. This protocol is EFI compatible.
  3. @copyright
  4. Copyright 2005 - 2021 Intel Corporation. <BR>
  5. SPDX-License-Identifier: BSD-2-Clause-Patent
  6. **/
  7. #ifndef _DXE_SYSTEM_BOARD_H_
  8. #define _DXE_SYSTEM_BOARD_H_
  9. #include <PlatPirqData.h>
  10. #include <PlatDevData.h>
  11. #include <Ppi/PchPolicy.h>
  12. #define PCI_DEVICE_NUMBER_IMC0_CH_0 0x08
  13. #define PCI_FUNCTION_NUMBER_IMC0_CH_0 0
  14. #define PCI_DEVICE_ID_IMC0_CH_0 0x2014
  15. #define BIOSGUARD_SUPPORT_ENABLED BIT0
  16. #define OC_SUPPORT_ENABLED BIT1
  17. #ifndef __AML_OFFSET_TABLE_H
  18. #define __AML_OFFSET_TABLE_H
  19. typedef struct {
  20. char *Pathname; /* Full pathname (from root) to the object */
  21. unsigned short ParentOpcode; /* AML opcode for the parent object */
  22. unsigned long NamesegOffset; /* Offset of last nameseg in the parent namepath */
  23. unsigned char Opcode; /* AML opcode for the data */
  24. unsigned long Offset; /* Offset for the data */
  25. unsigned long long Value; /* Original value of the data (as applicable) */
  26. } AML_OFFSET_TABLE_ENTRY;
  27. #endif
  28. //
  29. // Global variables for Option ROMs
  30. //
  31. #define NULL_ROM_FILE_GUID \
  32. { \
  33. 0x00000000, 0x0000, 0x0000, { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 } \
  34. }
  35. typedef struct {
  36. EFI_GUID FileName;
  37. UINTN Segment;
  38. UINTN Bus;
  39. UINTN Device;
  40. UINTN Function;
  41. UINT16 VendorId;
  42. UINT16 DeviceId;
  43. } PCI_OPTION_ROM_TABLE;
  44. //
  45. // System board information table
  46. //
  47. typedef struct {
  48. //
  49. // Pci option ROM data
  50. //
  51. PCI_OPTION_ROM_TABLE *PciOptionRomTable;
  52. //
  53. // System CPU data
  54. //
  55. UINT32 CpuSocketCount;
  56. //
  57. // System device and irq routing data
  58. //
  59. DEVICE_DATA *DeviceData;
  60. PLATFORM_PIRQ_DATA *SystemPirqData;
  61. } DXE_SYSTEM_BOARD_INFO;
  62. #endif