CpuSmm.h 1.7 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657
  1. /** @file
  2. Copyright (c) 2019, Intel Corporation. All rights reserved.<BR>
  3. SPDX-License-Identifier: BSD-2-Clause-Patent
  4. **/
  5. #ifndef _CPUSMM_H_
  6. #define _CPUSMM_H_
  7. #ifdef __cplusplus
  8. extern "C" {
  9. #endif
  10. #define CPUSMM_GUID { 0x90d93e09, 0x4e91, 0x4b3d, { 0x8c, 0x77, 0xc8, 0x2f, 0xf1, 0xe, 0x3c, 0x81 }}
  11. #define CPUSMM_SETUP_NAME L"CpuSmm"
  12. #pragma pack(1)
  13. typedef struct {
  14. UINT8 CpuSmmMsrSaveStateEnable;
  15. UINT8 CpuSmmCodeAccessCheckEnable;
  16. UINT8 CpuSmmUseDelayIndication;
  17. UINT8 CpuSmmUseBlockIndication;
  18. UINT8 CpuSmmUseSmmEnableIndication;
  19. UINT8 CpuSmmProcTraceEnable;
  20. } CPU_SMM;
  21. #pragma pack()
  22. #ifndef OFFSET_OF
  23. #ifdef __GNUC__
  24. #if __GNUC__ >= 4
  25. #define OFFSET_OF(TYPE, Field) ((UINTN) __builtin_offsetof(TYPE, Field))
  26. #endif
  27. #endif
  28. #endif
  29. #ifndef OFFSET_OF
  30. #define OFFSET_OF(TYPE, Field) ((UINTN) &(((TYPE *)0)->Field))
  31. #endif
  32. #define VERIFY_OFFSET(TYPE, Field, Offset) extern UINT8 _VerifyOffset##TYPE##Field[(OFFSET_OF(TYPE, Field) == Offset) / (OFFSET_OF(TYPE, Field) == Offset)]
  33. //
  34. // If TpmSupport/MorStae isn't in this offset, build failure (0 size array or divided by 0) will be generated.
  35. // Platform DSC file maps the two field to HII PCD so the offset value is critical.
  36. //
  37. VERIFY_OFFSET (CPU_SMM, CpuSmmMsrSaveStateEnable, 0x0);
  38. VERIFY_OFFSET (CPU_SMM, CpuSmmCodeAccessCheckEnable, 0x1);
  39. VERIFY_OFFSET (CPU_SMM, CpuSmmUseDelayIndication, 0x2);
  40. VERIFY_OFFSET (CPU_SMM, CpuSmmUseBlockIndication, 0x3);
  41. VERIFY_OFFSET (CPU_SMM, CpuSmmUseSmmEnableIndication, 0x4);
  42. VERIFY_OFFSET (CPU_SMM, CpuSmmProcTraceEnable, 0x5);
  43. /****** DO NOT WRITE BELOW THIS LINE *******/
  44. #ifdef __cplusplus
  45. }
  46. #endif
  47. #endif