PlatformPkg.fdf 37 KB

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  1. #/** @file
  2. # FDF file of Platform.
  3. #
  4. # Copyright (c) 2008 - 2019, Intel Corporation. All rights reserved.<BR>
  5. #
  6. # SPDX-License-Identifier: BSD-2-Clause-Patent
  7. #
  8. #
  9. #**/
  10. [Defines]
  11. DEFINE FLASH_BASE = 0xFF800000 #The base address of the 8Mb FLASH Device.
  12. DEFINE FLASH_SIZE = 0x00800000 #The flash size in bytes of the 8Mb FLASH Device.
  13. DEFINE FLASH_BLOCK_SIZE = 0x1000 #The block size in bytes of the 8Mb FLASH Device.
  14. DEFINE FLASH_NUM_BLOCKS = 0x800 #The number of blocks in 8Mb FLASH Device.
  15. DEFINE FLASH_REGION_VLVMICROCODE_OFFSET = 0x00400000
  16. DEFINE FLASH_REGION_VLVMICROCODE_SIZE = 0x00040000
  17. DEFINE FLASH_REGION_VLVMICROCODE_BASE = 0xFFC00000
  18. DEFINE FLASH_REGION_NV_STORAGE_VARIABLE_OFFSET = 0x00440000
  19. DEFINE FLASH_REGION_NV_STORAGE_VARIABLE_SIZE = 0x0003E000
  20. DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_OFFSET = 0x0047E000
  21. DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_SIZE = 0x00002000
  22. DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_OFFSET = 0x00480000
  23. DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_SIZE = 0x00040000
  24. DEFINE FLASH_REGION_FVMAIN_OFFSET = 0x00510000
  25. DEFINE FLASH_REGION_FVMAIN_SIZE = 0x00220000
  26. DEFINE FLASH_REGION_VPD_OFFSET = 0x00730000
  27. DEFINE FLASH_REGION_VPD_SIZE = 0x00010000
  28. DEFINE FLASH_REGION_FV_RECOVERY2_OFFSET = 0x00740000
  29. DEFINE FLASH_REGION_FV_RECOVERY2_SIZE = 0x00050000
  30. DEFINE FLASH_REGION_FV_RECOVERY_OFFSET = 0x00790000
  31. DEFINE FLASH_REGION_FV_RECOVERY_SIZE = 0x00070000
  32. ################################################################################
  33. #
  34. # FD Section
  35. # The [FD] Section is made up of the definition statements and a
  36. # description of what goes into the Flash Device Image. Each FD section
  37. # defines one flash "device" image. A flash device image may be one of
  38. # the following: Removable media bootable image (like a boot floppy
  39. # image,) an Option ROM image (that would be "flashed" into an add-in
  40. # card,) a System "Flash" image (that would be burned into a system's
  41. # flash) or an Update ("Capsule") image that will be used to update and
  42. # existing system flash.
  43. #
  44. ################################################################################
  45. [FD.Vlv]
  46. BaseAddress = $(FLASH_BASE)|gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress #The base address of the 3Mb FLASH Device.
  47. Size = $(FLASH_SIZE)|gPlatformModuleTokenSpaceGuid.PcdFlashAreaSize #The flash size in bytes of the 3Mb FLASH Device.
  48. ErasePolarity = 1
  49. BlockSize = $(FLASH_BLOCK_SIZE) #The block size in bytes of the 3Mb FLASH Device.
  50. NumBlocks = $(FLASH_NUM_BLOCKS) #The number of blocks in 3Mb FLASH Device.
  51. #
  52. #Flash location override based on actual flash map
  53. #
  54. SET gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress = $(FLASH_BASE)
  55. SET gPlatformModuleTokenSpaceGuid.PcdFlashAreaSize = $(FLASH_SIZE)
  56. SET gPlatformModuleTokenSpaceGuid.PcdBiosRomBase = $(FLASH_BASE)
  57. SET gPlatformModuleTokenSpaceGuid.PcdBiosRomSize = $(FLASH_SIZE)
  58. SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(FLASH_REGION_VLVMICROCODE_BASE) + 0x60
  59. SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(FLASH_REGION_VLVMICROCODE_SIZE) - 0x60
  60. ################################################################################
  61. #
  62. # Following are lists of FD Region layout which correspond to the locations of different
  63. # images within the flash device.
  64. #
  65. # Regions must be defined in ascending order and may not overlap.
  66. #
  67. # A Layout Region start with a eight digit hex offset (leading "0x" required) followed by
  68. # the pipe "|" character, followed by the size of the region, also in hex with the leading
  69. # "0x" characters. Like:
  70. # Offset|Size
  71. # PcdOffsetCName|PcdSizeCName
  72. # RegionType <FV, DATA, or FILE>
  73. # Fv Size can be adjusted; FVMAIN_COMPACT can be reduced to 0x120000, and FV_RECOVERY can be enlarged to 0x80000
  74. #
  75. ################################################################################
  76. #
  77. # IFWI Header
  78. #
  79. 0x0000|0x1000
  80. FILE=Vlv2TbltDevicePkg/Stitch/IFWIHeader/IFWI_HEADER.bin
  81. #
  82. # CPU Microcodes
  83. #
  84. $(FLASH_REGION_VLVMICROCODE_OFFSET)|$(FLASH_REGION_VLVMICROCODE_SIZE)
  85. gPlatformModuleTokenSpaceGuid.PcdFlashMicroCodeAddress|gPlatformModuleTokenSpaceGuid.PcdFlashMicroCodeSize
  86. FV = MICROCODE_FV
  87. $(FLASH_REGION_NV_STORAGE_VARIABLE_OFFSET)|$(FLASH_REGION_NV_STORAGE_VARIABLE_SIZE)
  88. gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize
  89. #NV_VARIABLE_STORE
  90. DATA = {
  91. ## This is the EFI_FIRMWARE_VOLUME_HEADER
  92. # ZeroVector []
  93. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  94. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  95. # FileSystemGuid: gEfiSystemNvDataFvGuid =
  96. # { 0xFFF12B8D, 0x7696, 0x4C8B, { 0xA9, 0x85, 0x27, 0x47, 0x07, 0x5B, 0x4F, 0x50 }}
  97. 0x8D, 0x2B, 0xF1, 0xFF, 0x96, 0x76, 0x8B, 0x4C,
  98. 0xA9, 0x85, 0x27, 0x47, 0x07, 0x5B, 0x4F, 0x50,
  99. # FvLength: 0x80000
  100. 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00,
  101. #Signature "_FVH" #Attributes
  102. 0x5f, 0x46, 0x56, 0x48, 0xff, 0xfe, 0x04, 0x00,
  103. #HeaderLength #CheckSum #ExtHeaderOffset #Reserved #Revision
  104. 0x48, 0x00, 0x2A, 0x09, 0x00, 0x00, 0x00, 0x02,
  105. #Blockmap[0]: 7 Blocks * 0x10000 Bytes / Block
  106. 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00,
  107. #Blockmap[1]: End
  108. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  109. ## This is the VARIABLE_STORE_HEADER
  110. !if $(SECURE_BOOT_ENABLE) == TRUE
  111. #Signature: gEfiAuthenticatedVariableGuid =
  112. # { 0xaaf32c78, 0x947b, 0x439a, { 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92 }}
  113. 0x78, 0x2c, 0xf3, 0xaa, 0x7b, 0x94, 0x9a, 0x43,
  114. 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92,
  115. !else
  116. #Signature: gEfiVariableGuid =
  117. # { 0xddcf3616, 0x3275, 0x4164, { 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d }}
  118. 0x16, 0x36, 0xcf, 0xdd, 0x75, 0x32, 0x64, 0x41,
  119. 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d,
  120. !endif
  121. #Size: 0x3E000 (gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize) - 0x48 (size of EFI_FIRMWARE_VOLUME_HEADER) = 0x03DFB8
  122. # This can speed up the Variable Dispatch a bit.
  123. 0xB8, 0xDF, 0x03, 0x00,
  124. #FORMATTED: 0x5A #HEALTHY: 0xFE #Reserved: UINT16 #Reserved1: UINT32
  125. 0x5A, 0xFE, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
  126. }
  127. $(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_OFFSET)|$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_SIZE)
  128. gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize
  129. #NV_FTW_WORKING
  130. DATA = {
  131. # EFI_FAULT_TOLERANT_WORKING_BLOCK_HEADER->Signature = gEdkiiWorkingBlockSignatureGuid =
  132. # { 0x9e58292b, 0x7c68, 0x497d, { 0xa0, 0xce, 0x65, 0x0, 0xfd, 0x9f, 0x1b, 0x95 }}
  133. 0x2B, 0x29, 0x58, 0x9E, 0x68, 0x7C, 0x7D, 0x49,
  134. 0xA0, 0xCE, 0x65, 0x0, 0xFD, 0x9F, 0x1B, 0x95,
  135. # Crc:UINT32 #WorkingBlockValid:1, WorkingBlockInvalid:1, Reserved
  136. 0xE2, 0x33, 0xF2, 0x3, 0xFE, 0xFF, 0xFF, 0xFF,
  137. # WriteQueueSize: UINT64 #Size: 0x2000 - 0x20 (FTW_WORKING_HEADER) = 0x1FE0
  138. 0xE0, 0x1F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
  139. }
  140. $(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_OFFSET)|$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_SIZE)
  141. gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
  142. #
  143. # Main Block
  144. #
  145. $(FLASH_REGION_FVMAIN_OFFSET)|$(FLASH_REGION_FVMAIN_SIZE)
  146. gPlatformModuleTokenSpaceGuid.PcdFlashFvMainBase|gPlatformModuleTokenSpaceGuid.PcdFlashFvMainSize
  147. FV = FVMAIN_COMPACT
  148. $(FLASH_REGION_VPD_OFFSET)|$(FLASH_REGION_VPD_SIZE)
  149. gEfiMdeModulePkgTokenSpaceGuid.PcdVpdBaseAddress
  150. FILE = $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/FV/8C3D856A-9BE6-468E-850A-24F7A8D38E08.bin
  151. #
  152. # FV Recovery#2
  153. #
  154. $(FLASH_REGION_FV_RECOVERY2_OFFSET)|$(FLASH_REGION_FV_RECOVERY2_SIZE)
  155. gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery2Base|gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery2Size
  156. FV = FVRECOVERY2
  157. #
  158. # FV Recovery
  159. #
  160. $(FLASH_REGION_FV_RECOVERY_OFFSET)|$(FLASH_REGION_FV_RECOVERY_SIZE)
  161. gPlatformModuleTokenSpaceGuid.PcdFlashFvRecoveryBase|gPlatformModuleTokenSpaceGuid.PcdFlashFvRecoverySize
  162. FV = FVRECOVERY
  163. ################################################################################
  164. #
  165. # FV Section
  166. #
  167. # [FV] section is used to define what components or modules are placed within a flash
  168. # device file. This section also defines order the components and modules are positioned
  169. # within the image. The [FV] section consists of define statements, set statements and
  170. # module statements.
  171. #
  172. ################################################################################
  173. [FV.MICROCODE_FV]
  174. BlockSize = $(FLASH_BLOCK_SIZE)
  175. FvAlignment = 16
  176. ERASE_POLARITY = 1
  177. MEMORY_MAPPED = TRUE
  178. STICKY_WRITE = TRUE
  179. LOCK_CAP = TRUE
  180. LOCK_STATUS = FALSE
  181. WRITE_DISABLED_CAP = TRUE
  182. WRITE_ENABLED_CAP = TRUE
  183. WRITE_STATUS = TRUE
  184. WRITE_LOCK_CAP = TRUE
  185. WRITE_LOCK_STATUS = TRUE
  186. READ_DISABLED_CAP = TRUE
  187. READ_ENABLED_CAP = TRUE
  188. READ_STATUS = TRUE
  189. READ_LOCK_CAP = TRUE
  190. READ_LOCK_STATUS = TRUE
  191. FILE RAW = 197DB236-F856-4924-90F8-CDF12FB875F3 {
  192. $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/$(DXE_ARCHITECTURE)/MicrocodeUpdates.bin
  193. }
  194. !if $(RECOVERY_ENABLE)
  195. [FV.FVRECOVERY_COMPONENTS]
  196. FvAlignment = 16 #FV alignment and FV attributes setting.
  197. ERASE_POLARITY = 1
  198. MEMORY_MAPPED = TRUE
  199. STICKY_WRITE = TRUE
  200. LOCK_CAP = TRUE
  201. LOCK_STATUS = TRUE
  202. WRITE_DISABLED_CAP = TRUE
  203. WRITE_ENABLED_CAP = TRUE
  204. WRITE_STATUS = TRUE
  205. WRITE_LOCK_CAP = TRUE
  206. WRITE_LOCK_STATUS = TRUE
  207. READ_DISABLED_CAP = TRUE
  208. READ_ENABLED_CAP = TRUE
  209. READ_STATUS = TRUE
  210. READ_LOCK_CAP = TRUE
  211. READ_LOCK_STATUS = TRUE
  212. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchUsb.inf
  213. INF MdeModulePkg/Bus/Pci/EhciPei/EhciPei.inf
  214. INF MdeModulePkg/Bus/Usb/UsbBusPei/UsbBusPei.inf
  215. INF MdeModulePkg/Bus/Usb/UsbBotPei/UsbBotPei.inf
  216. INF FatPkg/FatPei/FatPei.inf
  217. INF MdeModulePkg/Universal/Disk/CdExpressPei/CdExpressPei.inf
  218. INF SignedCapsulePkg/Universal/RecoveryModuleLoadPei/RecoveryModuleLoadPei.inf
  219. !endif
  220. ################################################################################
  221. #
  222. # FV Section
  223. #
  224. # [FV] section is used to define what components or modules are placed within a flash
  225. # device file. This section also defines order the components and modules are positioned
  226. # within the image. The [FV] section consists of define statements, set statements and
  227. # module statements.
  228. #
  229. ################################################################################
  230. [FV.FVRECOVERY2]
  231. BlockSize = $(FLASH_BLOCK_SIZE)
  232. FvAlignment = 16 #FV alignment and FV attributes setting.
  233. ERASE_POLARITY = 1
  234. MEMORY_MAPPED = TRUE
  235. STICKY_WRITE = TRUE
  236. LOCK_CAP = TRUE
  237. LOCK_STATUS = TRUE
  238. WRITE_DISABLED_CAP = TRUE
  239. WRITE_ENABLED_CAP = TRUE
  240. WRITE_STATUS = TRUE
  241. WRITE_LOCK_CAP = TRUE
  242. WRITE_LOCK_STATUS = TRUE
  243. READ_DISABLED_CAP = TRUE
  244. READ_ENABLED_CAP = TRUE
  245. READ_STATUS = TRUE
  246. READ_LOCK_CAP = TRUE
  247. READ_LOCK_STATUS = TRUE
  248. FvNameGuid = B73FE497-B92E-416e-8326-45AD0D270092
  249. INF Vlv2TbltDevicePkg/PlatformInitPei/PlatformInitPei.inf
  250. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchSmbusArpDisabled.inf
  251. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/IA32/VlvInitPeim.inf
  252. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchInitPeim.inf
  253. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchSpiPeim.inf
  254. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PeiSmmAccess.inf
  255. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PeiSmmControl.inf
  256. INF UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf
  257. INF UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationPei.inf
  258. !if $(TPM_ENABLED) == TRUE
  259. INF SecurityPkg/Tcg/Tcg2Config/Tcg2ConfigPei.inf
  260. INF SecurityPkg/Tcg/TcgPei/TcgPei.inf
  261. INF SecurityPkg/Tcg/PhysicalPresencePei/PhysicalPresencePei.inf
  262. !endif
  263. INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
  264. !if $(ACPI50_ENABLE) == TRUE
  265. INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTablePei/FirmwarePerformancePei.inf
  266. !endif
  267. !if $(PERFORMANCE_ENABLE) == TRUE
  268. INF MdeModulePkg/Universal/ReportStatusCodeRouter/Pei/ReportStatusCodeRouterPei.inf
  269. !endif
  270. !if $(RECOVERY_ENABLE)
  271. FILE FV_IMAGE = 1E9D7604-EF45-46a0-BD8A-71AC78C17AC1 {
  272. SECTION PEI_DEPEX_EXP = {gEfiPeiMemoryDiscoveredPpiGuid AND gEfiPeiBootInRecoveryModePpiGuid}
  273. SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF { # LZMA COMPRESS GUID
  274. SECTION FV_IMAGE = FVRECOVERY_COMPONENTS
  275. }
  276. }
  277. !endif
  278. [FV.FVRECOVERY]
  279. BlockSize = $(FLASH_BLOCK_SIZE)
  280. FvAlignment = 16 #FV alignment and FV attributes setting.
  281. ERASE_POLARITY = 1
  282. MEMORY_MAPPED = TRUE
  283. STICKY_WRITE = TRUE
  284. LOCK_CAP = TRUE
  285. LOCK_STATUS = TRUE
  286. WRITE_DISABLED_CAP = TRUE
  287. WRITE_ENABLED_CAP = TRUE
  288. WRITE_STATUS = TRUE
  289. WRITE_LOCK_CAP = TRUE
  290. WRITE_LOCK_STATUS = TRUE
  291. READ_DISABLED_CAP = TRUE
  292. READ_ENABLED_CAP = TRUE
  293. READ_STATUS = TRUE
  294. READ_LOCK_CAP = TRUE
  295. READ_LOCK_STATUS = TRUE
  296. FvNameGuid = B73FE497-B92E-416e-8326-45AD0D270091
  297. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/IA32/SecCore.inf
  298. INF MdeModulePkg/Core/Pei/PeiMain.inf
  299. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/IA32/CpuPeim.inf
  300. INF MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf
  301. INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
  302. INF Vlv2TbltDevicePkg/PlatformPei/PlatformPei.inf
  303. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/IA32/SeCUma.inf
  304. !if $(SOURCE_DEBUG_ENABLE) == TRUE
  305. INF SourceLevelDebugPkg/DebugAgentPei/DebugAgentPei.inf
  306. !endif
  307. !if $(CAPSULE_ENABLE) == TRUE
  308. INF MdeModulePkg/Universal/CapsulePei/CapsulePei.inf
  309. !if $(DXE_ARCHITECTURE) == "X64"
  310. INF MdeModulePkg/Universal/CapsulePei/CapsuleX64.inf
  311. !endif
  312. !endif
  313. !if $(PCIESC_ENABLE) == TRUE
  314. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchEarlyInitPeim.inf
  315. !endif
  316. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/IA32/MemoryInit.inf
  317. INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
  318. [FV.FVMAIN]
  319. BlockSize = $(FLASH_BLOCK_SIZE)
  320. FvAlignment = 16
  321. ERASE_POLARITY = 1
  322. MEMORY_MAPPED = TRUE
  323. STICKY_WRITE = TRUE
  324. LOCK_CAP = TRUE
  325. LOCK_STATUS = TRUE
  326. WRITE_DISABLED_CAP = TRUE
  327. WRITE_ENABLED_CAP = TRUE
  328. WRITE_STATUS = TRUE
  329. WRITE_LOCK_CAP = TRUE
  330. WRITE_LOCK_STATUS = TRUE
  331. READ_DISABLED_CAP = TRUE
  332. READ_ENABLED_CAP = TRUE
  333. READ_STATUS = TRUE
  334. READ_LOCK_CAP = TRUE
  335. READ_LOCK_STATUS = TRUE
  336. FvNameGuid = A881D567-6CB0-4eee-8435-2E72D33E45B5
  337. APRIORI DXE {
  338. INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
  339. INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf
  340. INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf
  341. }
  342. #
  343. # gBiosIdGuid
  344. #
  345. FILE FREEFORM = C3E36D09-8294-4b97-A857-D5288FE33E28 {
  346. SECTION RAW = $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/BiosId.bin
  347. }
  348. #
  349. # EDK II Related Platform codes
  350. #
  351. INF MdeModulePkg/Core/Dxe/DxeMain.inf
  352. INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
  353. !if $(ACPI50_ENABLE) == TRUE
  354. INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableDxe/FirmwarePerformanceDxe.inf
  355. INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableSmm/FirmwarePerformanceSmm.inf
  356. !endif
  357. INF UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
  358. INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf
  359. INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf
  360. INF MdeModulePkg/Universal/ReportStatusCodeRouter/Smm/ReportStatusCodeRouterSmm.inf
  361. INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
  362. INF UefiCpuPkg/CpuDxe/CpuDxe.inf
  363. INF UefiCpuPkg/CpuS3DataDxe/CpuS3DataDxe.inf
  364. INF MdeModulePkg/Universal/Metronome/Metronome.inf
  365. INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
  366. INF MdeModulePkg/Logo/LogoDxe.inf
  367. INF RuleOverride = UI MdeModulePkg/Application/UiApp/UiApp.inf
  368. INF MdeModulePkg/Application/BootManagerMenuApp/BootManagerMenuApp.inf
  369. INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
  370. INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
  371. INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
  372. INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.inf
  373. INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf
  374. INF Vlv2TbltDevicePkg/FvbRuntimeDxe/FvbSmm.inf
  375. INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf
  376. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSpiSmm.inf
  377. !if $(SECURE_BOOT_ENABLE)
  378. INF SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf
  379. !endif
  380. INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
  381. INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
  382. INF PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntimeDxe.inf
  383. INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
  384. INF Vlv2TbltDevicePkg/FvbRuntimeDxe/FvbRuntimeDxe.inf
  385. INF Vlv2TbltDevicePkg/PlatformSetupDxe/PlatformSetupDxe.inf
  386. INF MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf
  387. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/Dptf.inf
  388. #
  389. # EDK II Related Silicon codes
  390. #
  391. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchS3SupportDxe.inf
  392. INF PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.inf
  393. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmmControl.inf
  394. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSmbusDxe.inf
  395. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchReset.inf
  396. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchInitDxe.inf
  397. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchInitSmm.inf
  398. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSmiDispatcher.inf
  399. !if $(PCIESC_ENABLE) == TRUE
  400. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchPcieSmm.inf
  401. !endif
  402. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSpiRuntime.inf
  403. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchPolicyInitDxe.inf
  404. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchBiosWriteProtect.inf
  405. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmmAccess.inf
  406. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PciHostBridge.inf
  407. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/VlvInitDxe.inf
  408. !if $(TPM_ENABLED) == TRUE
  409. INF SecurityPkg/Tcg/TcgConfigDxe/TcgConfigDxe.inf
  410. INF SecurityPkg/Tcg/TcgDxe/TcgDxe.inf
  411. INF RuleOverride = DRIVER_ACPITABLE SecurityPkg/Tcg/TcgSmm/TcgSmm.inf
  412. !endif
  413. #
  414. # EDK II Related Platform codes
  415. #
  416. INF Vlv2TbltDevicePkg/PlatformSmm/PlatformSmm.inf
  417. INF Vlv2TbltDevicePkg/PlatformInfoDxe/PlatformInfoDxe.inf
  418. INF Vlv2TbltDevicePkg/PlatformCpuInfoDxe/PlatformCpuInfoDxe.inf
  419. INF Vlv2TbltDevicePkg/PlatformDxe/PlatformDxe.inf
  420. INF Vlv2TbltDevicePkg/PciPlatform/PciPlatform.inf
  421. INF Vlv2TbltDevicePkg/SaveMemoryConfig/SaveMemoryConfig.inf
  422. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PlatformCpuPolicy.inf
  423. INF Vlv2TbltDevicePkg/PpmPolicy/PpmPolicy.inf
  424. !if $(GOP_DRIVER_ENABLE) == TRUE
  425. INF Vlv2TbltDevicePkg/PlatformGopPolicy/PlatformGopPolicy.inf
  426. FILE DRIVER = FF0C8745-3270-4439-B74F-3E45F8C77064 {
  427. SECTION DXE_DEPEX_EXP = {gPlatformGOPPolicyGuid}
  428. SECTION PE32 = Vlv2SocBinPkg/GOP/7.2.1011/RELEASE_VS2008x86/$(DXE_ARCHITECTURE)/IntelGopDriver.efi
  429. SECTION UI = "IntelGopDriver"
  430. }
  431. !endif
  432. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PnpDxe.inf
  433. #
  434. # SMM
  435. #
  436. INF MdeModulePkg/Core/PiSmmCore/PiSmmIpl.inf
  437. INF MdeModulePkg/Core/PiSmmCore/PiSmmCore.inf
  438. INF UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf
  439. INF UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.inf
  440. INF MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.inf
  441. INF UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationSmm.inf
  442. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PowerManagement2.inf
  443. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/DigitalThermalSensor.inf
  444. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/GraphicDxeInitSmm.inf
  445. #
  446. # ACPI
  447. #
  448. INF MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/BootScriptExecutorDxe.inf
  449. INF MdeModulePkg/Universal/Acpi/S3SaveStateDxe/S3SaveStateDxe.inf
  450. INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
  451. INF RuleOverride = ACPITABLE2 Vlv2DeviceRefCodePkg/ValleyView2Soc/CPU/PowerManagement/AcpiTables/PowerManagementAcpiTables.inf
  452. INF RuleOverride = ACPITABLE Vlv2DeviceRefCodePkg/AcpiTablesPCAT/AcpiTables.inf
  453. INF Vlv2TbltDevicePkg/AcpiPlatform/AcpiPlatform.inf
  454. INF MdeModulePkg/Universal/Acpi/BootGraphicsResourceTableDxe/BootGraphicsResourceTableDxe.inf
  455. #
  456. # PCI
  457. #
  458. INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
  459. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/ISPDxe.inf
  460. #
  461. # ISA
  462. #
  463. INF Vlv2TbltDevicePkg/PcuSio/PcuSio.inf
  464. !if $(SOURCE_DEBUG_ENABLE) != TRUE
  465. INF MdeModulePkg/Bus/Pci/PciSioSerialDxe/PciSioSerialDxe.inf
  466. !endif
  467. #
  468. # eMMC/SD Card
  469. #
  470. INF MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.inf
  471. INF MdeModulePkg/Bus/Sd/EmmcDxe/EmmcDxe.inf
  472. INF MdeModulePkg/Bus/Sd/SdDxe/SdDxe.inf
  473. #
  474. # IDE/SCSI/AHCI
  475. #
  476. INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
  477. INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
  478. INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
  479. !if $(SATA_ENABLE) == TRUE
  480. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SataController.inf
  481. #
  482. #
  483. INF MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
  484. INF MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
  485. !if $(SCSI_ENABLE) == TRUE
  486. INF MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf
  487. INF MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf
  488. !endif
  489. #
  490. !endif
  491. # Console
  492. #
  493. INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
  494. INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
  495. INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
  496. INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
  497. INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
  498. INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
  499. INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
  500. #
  501. # USB
  502. #
  503. !if $(USB_ENABLE) == TRUE
  504. INF MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf
  505. INF MdeModulePkg/Bus/Pci/UhciDxe/UhciDxe.inf
  506. INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf
  507. INF MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf
  508. INF MdeModulePkg/Bus/Usb/UsbMouseDxe/UsbMouseDxe.inf
  509. INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf
  510. INF MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf
  511. !endif
  512. #
  513. # SMBIOS
  514. #
  515. INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
  516. INF Vlv2TbltDevicePkg/SmBiosMiscDxe/SmBiosMiscDxe.inf
  517. #
  518. # FAT file system
  519. #
  520. INF FatPkg/EnhancedFatDxe/Fat.inf
  521. #
  522. # UEFI Shell
  523. #
  524. INF ShellPkg/Application/Shell/Shell.inf
  525. #
  526. # dp command
  527. #
  528. !if $(PERFORMANCE_ENABLE) == TRUE
  529. INF ShellPkg/DynamicCommand/DpDynamicCommand/DpDynamicCommand.inf
  530. !endif
  531. !if $(GOP_DRIVER_ENABLE) == TRUE
  532. FILE FREEFORM = 878AC2CC-5343-46F2-B563-51F89DAF56BA {
  533. SECTION RAW = Vlv2SocBinPkg/GOP/7.2.1011/VBT/MNW2/Vbt.bin
  534. SECTION UI = "IntelGopVbt"
  535. }
  536. !endif
  537. #
  538. # Network Modules
  539. #
  540. !include NetworkPkg/Network.fdf.inc
  541. !if $(NETWORK_ENABLE) == TRUE
  542. FILE DRIVER = 22DE1691-D65D-456a-993E-A253DD1F308C {
  543. SECTION PE32 = Vlv2SocBinPkg/UNDI/RtkUndiDxe/$(DXE_ARCHITECTURE)/RtkUndiDxe.efi
  544. SECTION UI = "RtkUndiDxe"
  545. }
  546. !if $(DXE_ARCHITECTURE) == "X64"
  547. FILE DRIVER = 7C7467E9-8BB3-4BF1-8694-6FED7D25D13E {
  548. SECTION PE32 = Vlv2SocBinPkg/UNDI/I211PcieUndiDxe/$(DXE_ARCHITECTURE)/E7006X3.EFI
  549. SECTION UI = "E7006X3"
  550. }
  551. !endif
  552. !endif
  553. !if $(CAPSULE_ENABLE)
  554. INF MdeModulePkg/Universal/EsrtFmpDxe/EsrtFmpDxe.inf
  555. #
  556. # Minnow Max System Firmware FMP
  557. #
  558. INF FILE_GUID = $(FMP_MINNOW_MAX_SYSTEM) FmpDevicePkg/FmpDxe/FmpDxe.inf
  559. #
  560. # Sample Device FMP
  561. #
  562. INF FILE_GUID = $(FMP_GREEN_SAMPLE_DEVICE) FmpDevicePkg/FmpDxe/FmpDxe.inf
  563. INF FILE_GUID = $(FMP_BLUE_SAMPLE_DEVICE) FmpDevicePkg/FmpDxe/FmpDxe.inf
  564. INF FILE_GUID = $(FMP_RED_SAMPLE_DEVICE) FmpDevicePkg/FmpDxe/FmpDxe.inf
  565. !endif
  566. !if $(MICOCODE_CAPSULE_ENABLE)
  567. INF IntelSiliconPkg/Feature/Capsule/MicrocodeUpdateDxe/MicrocodeUpdateDxe.inf
  568. !endif
  569. !if $(RECOVERY_ENABLE)
  570. FILE FREEFORM = PCD(gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiRsa2048Sha256TestPublicKeyFileGuid) {
  571. SECTION RAW = BaseTools/Source/Python/Rsa2048Sha256Sign/TestSigningPublicKey.bin
  572. SECTION UI = "Rsa2048Sha256TestSigningPublicKey"
  573. }
  574. !endif
  575. [FV.FVMAIN_COMPACT]
  576. BlockSize = $(FLASH_BLOCK_SIZE)
  577. FvAlignment = 16
  578. ERASE_POLARITY = 1
  579. MEMORY_MAPPED = TRUE
  580. STICKY_WRITE = TRUE
  581. LOCK_CAP = TRUE
  582. LOCK_STATUS = TRUE
  583. WRITE_DISABLED_CAP = TRUE
  584. WRITE_ENABLED_CAP = TRUE
  585. WRITE_STATUS = TRUE
  586. WRITE_LOCK_CAP = TRUE
  587. WRITE_LOCK_STATUS = TRUE
  588. READ_DISABLED_CAP = TRUE
  589. READ_ENABLED_CAP = TRUE
  590. READ_STATUS = TRUE
  591. READ_LOCK_CAP = TRUE
  592. READ_LOCK_STATUS = TRUE
  593. FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
  594. !if $(LZMA_ENABLE) == TRUE
  595. # LZMA Compress
  596. SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
  597. SECTION FV_IMAGE = FVMAIN
  598. }
  599. !else
  600. !if $(DXE_COMPRESS_ENABLE) == TRUE
  601. # Tiano Compress
  602. SECTION GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {
  603. SECTION FV_IMAGE = FVMAIN
  604. }
  605. !else
  606. # No Compress
  607. SECTION COMPRESS PI_NONE {
  608. SECTION FV_IMAGE = FVMAIN
  609. }
  610. !endif
  611. !endif
  612. }
  613. !if $(RECOVERY_ENABLE)
  614. [FV.SystemFirmwareUpdateCargo]
  615. FvAlignment = 16
  616. ERASE_POLARITY = 1
  617. MEMORY_MAPPED = TRUE
  618. STICKY_WRITE = TRUE
  619. LOCK_CAP = TRUE
  620. LOCK_STATUS = TRUE
  621. WRITE_DISABLED_CAP = TRUE
  622. WRITE_ENABLED_CAP = TRUE
  623. WRITE_STATUS = TRUE
  624. WRITE_LOCK_CAP = TRUE
  625. WRITE_LOCK_STATUS = TRUE
  626. READ_DISABLED_CAP = TRUE
  627. READ_ENABLED_CAP = TRUE
  628. READ_STATUS = TRUE
  629. READ_LOCK_CAP = TRUE
  630. READ_LOCK_STATUS = TRUE
  631. FILE RAW = AF9C9EB2-12AD-4D3E-A4D4-96F6C9966215 { # PcdEdkiiSystemFirmwareFileGuid
  632. FD = Vlv
  633. # $(WORKSPACE)/$(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/FV/Vlv.fd
  634. }
  635. [FmpPayload.FmpPayloadSystemFirmwareRsa2048]
  636. IMAGE_HEADER_INIT_VERSION = 0x02
  637. IMAGE_TYPE_ID = 4096267b-da0a-42eb-b5eb-fef31d207cb4 # PcdSystemFmpCapsuleImageTypeIdGuid
  638. IMAGE_INDEX = 0x1
  639. HARDWARE_INSTANCE = 0x0
  640. MONOTONIC_COUNT = 0x2
  641. CERTIFICATE_GUID = A7717414-C616-4977-9420-844712A735BF # RSA2048SHA256
  642. FV = SystemFirmwareUpdateCargo
  643. #FILE DATA = $(WORKSPACE)/$(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/FV/SYSTEMFIRMWAREUPDATECARGO.Fv
  644. [Capsule.Vlv2Rec]
  645. CAPSULE_GUID = 6dcbd5ed-e82d-4c44-bda1-7194199ad92a # gEfiFmpCapsuleGuid
  646. CAPSULE_FLAGS = PersistAcrossReset,InitiateReset
  647. CAPSULE_HEADER_SIZE = 0x20
  648. CAPSULE_HEADER_INIT_VERSION = 0x1
  649. FMP_PAYLOAD = FmpPayloadSystemFirmwareRsa2048
  650. !endif
  651. ################################################################################
  652. #
  653. # Rules are use with the [FV] section's module INF type to define
  654. # how an FFS file is created for a given INF file. The following Rule are the default
  655. # rules for the different module type. User can add the customized rules to define the
  656. # content of the FFS file.
  657. #
  658. ################################################################################
  659. [Rule.Common.SEC]
  660. FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
  661. PE32 PE32 Align = 8 $(INF_OUTPUT)/$(MODULE_NAME).efi
  662. RAW BIN Align = 16 |.com
  663. }
  664. [Rule.Common.SEC.BINARY]
  665. FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
  666. PE32 PE32 Align = 8 |.efi
  667. RAW BIN Align = 16 |.com
  668. }
  669. [Rule.Common.PEI_CORE]
  670. FILE PEI_CORE = $(NAMED_GUID) {
  671. PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
  672. UI STRING="$(MODULE_NAME)" Optional
  673. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  674. }
  675. [Rule.Common.PEIM]
  676. FILE PEIM = $(NAMED_GUID) {
  677. PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
  678. PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
  679. UI STRING="$(MODULE_NAME)" Optional
  680. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  681. }
  682. [Rule.Common.PEIM.BINARY]
  683. FILE PEIM = $(NAMED_GUID) {
  684. PEI_DEPEX PEI_DEPEX Optional |.depex
  685. PE32 PE32 Align = Auto |.efi
  686. UI STRING="$(MODULE_NAME)" Optional
  687. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  688. }
  689. [Rule.Common.PEIM.BIOSID]
  690. FILE PEIM = $(NAMED_GUID) {
  691. RAW BIN BiosId.bin
  692. PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
  693. PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
  694. UI STRING="$(MODULE_NAME)" Optional
  695. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  696. }
  697. [Rule.Common.USER_DEFINED.APINIT]
  698. FILE RAW = $(NAMED_GUID) Fixed Align=4K {
  699. RAW SEC_BIN |.com
  700. }
  701. #cjia 2011-07-21
  702. [Rule.Common.USER_DEFINED.LEGACY16]
  703. FILE FREEFORM = $(NAMED_GUID) {
  704. UI STRING="$(MODULE_NAME)" Optional
  705. RAW BIN |.bin
  706. }
  707. #cjia
  708. [Rule.Common.USER_DEFINED.ASM16]
  709. FILE FREEFORM = $(NAMED_GUID) {
  710. UI STRING="$(MODULE_NAME)" Optional
  711. RAW BIN |.com
  712. }
  713. [Rule.Common.DXE_CORE]
  714. FILE DXE_CORE = $(NAMED_GUID) {
  715. PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
  716. UI STRING="$(MODULE_NAME)" Optional
  717. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  718. }
  719. [Rule.Common.UEFI_DRIVER]
  720. FILE DRIVER = $(NAMED_GUID) {
  721. DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
  722. PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
  723. UI STRING="$(MODULE_NAME)" Optional
  724. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  725. }
  726. [Rule.Common.UEFI_DRIVER.BINARY]
  727. FILE DRIVER = $(NAMED_GUID) {
  728. DXE_DEPEX DXE_DEPEX Optional |.depex
  729. PE32 PE32 |.efi
  730. UI STRING="$(MODULE_NAME)" Optional
  731. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  732. }
  733. [Rule.Common.UEFI_DRIVER.NATIVE_BINARY]
  734. FILE DRIVER = $(NAMED_GUID) {
  735. DXE_DEPEX DXE_DEPEX Optional $(WORKSPACE)/Vlv2TbltDevicePkg/IntelGopDepex/IntelGopDriver.depex
  736. PE32 PE32 |.efi
  737. UI STRING="$(MODULE_NAME)" Optional
  738. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  739. }
  740. [Rule.Common.DXE_DRIVER]
  741. FILE DRIVER = $(NAMED_GUID) {
  742. DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
  743. PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
  744. UI STRING="$(MODULE_NAME)" Optional
  745. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  746. }
  747. [Rule.Common.DXE_DRIVER.BINARY]
  748. FILE DRIVER = $(NAMED_GUID) {
  749. DXE_DEPEX DXE_DEPEX Optional |.depex
  750. PE32 PE32 |.efi
  751. UI STRING="$(MODULE_NAME)" Optional
  752. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  753. }
  754. [Rule.Common.DXE_DRIVER.DRIVER_ACPITABLE]
  755. FILE DRIVER = $(NAMED_GUID) {
  756. DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
  757. PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
  758. UI STRING="$(MODULE_NAME)" Optional
  759. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  760. RAW ACPI Optional |.acpi
  761. RAW ASL Optional |.aml
  762. }
  763. [Rule.Common.DXE_RUNTIME_DRIVER]
  764. FILE DRIVER = $(NAMED_GUID) {
  765. DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
  766. PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
  767. UI STRING="$(MODULE_NAME)" Optional
  768. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  769. }
  770. [Rule.Common.DXE_RUNTIME_DRIVER.BINARY]
  771. FILE DRIVER = $(NAMED_GUID) {
  772. DXE_DEPEX DXE_DEPEX Optional |.depex
  773. PE32 PE32 |.efi
  774. UI STRING="$(MODULE_NAME)" Optional
  775. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  776. }
  777. [Rule.Common.DXE_SMM_DRIVER]
  778. FILE SMM = $(NAMED_GUID) {
  779. DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
  780. PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
  781. UI STRING="$(MODULE_NAME)" Optional
  782. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  783. }
  784. [Rule.Common.DXE_SMM_DRIVER.BINARY]
  785. FILE SMM = $(NAMED_GUID) {
  786. SMM_DEPEX SMM_DEPEX |.depex
  787. PE32 PE32 |.efi
  788. RAW BIN Optional |.aml
  789. UI STRING="$(MODULE_NAME)" Optional
  790. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  791. }
  792. [Rule.Common.DXE_SMM_DRIVER.DRIVER_ACPITABLE]
  793. FILE SMM = $(NAMED_GUID) {
  794. DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
  795. PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
  796. UI STRING="$(MODULE_NAME)" Optional
  797. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  798. RAW ACPI Optional |.acpi
  799. RAW ASL Optional |.aml
  800. }
  801. [Rule.Common.SMM_CORE]
  802. FILE SMM_CORE = $(NAMED_GUID) {
  803. DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
  804. PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
  805. UI STRING="$(MODULE_NAME)" Optional
  806. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  807. }
  808. [Rule.Common.SMM_CORE.BINARY]
  809. FILE SMM_CORE = $(NAMED_GUID) {
  810. DXE_DEPEX DXE_DEPEX Optional |.depex
  811. PE32 PE32 |.efi
  812. UI STRING="$(MODULE_NAME)" Optional
  813. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  814. }
  815. [Rule.Common.UEFI_APPLICATION]
  816. FILE APPLICATION = $(NAMED_GUID) {
  817. DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
  818. PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
  819. UI STRING="$(MODULE_NAME)" Optional
  820. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  821. }
  822. [Rule.Common.UEFI_APPLICATION.UI]
  823. FILE APPLICATION = $(NAMED_GUID) {
  824. PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
  825. UI STRING="Enter Setup"
  826. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  827. }
  828. [Rule.Common.USER_DEFINED]
  829. FILE FREEFORM = $(NAMED_GUID) {
  830. UI STRING="$(MODULE_NAME)" Optional
  831. RAW BIN |.bin
  832. }
  833. [Rule.Common.USER_DEFINED.BINARY]
  834. FILE FREEFORM = $(NAMED_GUID) {
  835. UI STRING="$(MODULE_NAME)" Optional
  836. RAW BIN |.bin
  837. }
  838. [Rule.Common.USER_DEFINED.ACPITABLE]
  839. FILE FREEFORM = $(NAMED_GUID) {
  840. RAW ACPI Optional |.acpi
  841. RAW ASL Optional |.aml
  842. }
  843. [Rule.Common.USER_DEFINED.ACPITABLE2]
  844. FILE FREEFORM = $(NAMED_GUID) {
  845. RAW ASL Optional |.aml
  846. }
  847. [Rule.Common.ACPITABLE]
  848. FILE FREEFORM = $(NAMED_GUID) {
  849. RAW ACPI Optional |.acpi
  850. RAW ASL Optional |.aml
  851. }
  852. [Rule.Common.PEIM.FMP_IMAGE_DESC]
  853. FILE PEIM = $(NAMED_GUID) {
  854. RAW BIN |.acpi
  855. PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
  856. PE32 PE32 Align=4K $(INF_OUTPUT)/$(MODULE_NAME).efi
  857. UI STRING="$(MODULE_NAME)" Optional
  858. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  859. }