Quark.fdf 36 KB

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  1. ## @file
  2. # FDF file of Clanton Peak CRB platform with 32-bit DXE
  3. #
  4. # This package provides QuarkNcSocId platform specific modules.
  5. # Copyright (c) 2013 - 2019 Intel Corporation.
  6. #
  7. # SPDX-License-Identifier: BSD-2-Clause-Patent
  8. #
  9. ##
  10. ################################################################################
  11. #
  12. # Defines Section - statements that will be processed to create a Makefile.
  13. #
  14. ################################################################################
  15. [Defines]
  16. # Address 0x100000000 (4 GB reset address)
  17. # Base Size
  18. # +---------------------------+
  19. # FLASH_BASE | FD.Quark: | 0x800000 (8 MB)
  20. # 0xFF800000 | BaseAddress |
  21. # +---------------------------+
  22. #
  23. # Flash offsets are 0 based, but are relative to FD.Quark BaseAddress, e.g. Payload Base is at 0x400000, Flash Base is at 0xFF800000 for 8 MB SPI part.
  24. # 0xFF800000 + 0x400000 = 0xFFC00000.
  25. #
  26. # Address 0x0 (0xFF800000 for 8 MB SPI part)
  27. # +---------------------------+
  28. # FLASH_FV_PAYLOAD_BASE | Payload Image | FLASH_FV_PAYLOAD_SIZE
  29. # 0x00400000 | | 0x00100000
  30. # +---------------------------+
  31. # FLASH_FV_MAIN_BASE | FvMain Image (Compressed) | FLASH_FV_MAIN_SIZE
  32. # 0x00500000 | | 0x001E0000
  33. # +---------------------------+
  34. # NVRAM_AREA_BASE | NVRAM Area= | NVRAM_AREA_SIZE
  35. # 0x006E0000 | Variable + FTW Working + |
  36. # | FTW Spare |
  37. # +---+-------------------+---+
  38. # NVRAM_AREA_VARIABLE_BASE | | NVRAM_AREA_VARIABLE_SIZE
  39. # | |
  40. # +-------------------+
  41. # FTW_WORKING_BASE | | FTW_WORKING_SIZE
  42. # | |
  43. # +-------------------+
  44. # FTW_SPARE_BASE | | FTW_SPARE_SIZE
  45. # | |
  46. # +---+-------------------+---+
  47. # RMU_BINARY_BASE | RMU Binary | RMU_BINARY_SIZE
  48. # 0x00700000 | | 0x00008000
  49. # +---------------------------+
  50. # PLATFORM_DATA_BASE | PlatformData Binary | PLATFORM_DATA_SIZE
  51. # 0x00710000 | | 0x00001000
  52. # +---------------------------+
  53. # FVRECOVERY_IMAGE_BASE | FVRECOVERY Image | FVRECOVERY_IMAGE_SIZE
  54. # 0x720000 | | 0x000E0000
  55. # +---------------------------+
  56. #
  57. # Define value used to compute FLASH regions below reset vector location just below 4GB
  58. #
  59. DEFINE RESET_ADDRESS = 0x100000000 # 4 GB
  60. #
  61. # Set size of FLASH to 8MB
  62. #
  63. DEFINE FLASH_SIZE = 0x800000
  64. DEFINE FLASH_BASE = $(RESET_ADDRESS) - $(FLASH_SIZE) # The base address of the Flash Device
  65. #
  66. # Set FLASH block size to 4KB
  67. #
  68. DEFINE FLASH_BLOCKSIZE = 0x1000 # 4 KB
  69. #
  70. # Misc settings
  71. #
  72. DEFINE FLASH_BLOCKSIZE_DATA = 0x00, 0x10, 0x00, 0x00 # equivalent for DATA blocks
  73. #
  74. # Start PAYLOAD at 4MB into 8MB FLASH
  75. #
  76. DEFINE FLASH_FV_PAYLOAD_BASE = 0x00400000
  77. DEFINE FLASH_FV_PAYLOAD_SIZE = 0x00100000
  78. #
  79. # Put FVMAIN between PAYLOAD and RMU Binary
  80. #
  81. DEFINE FLASH_FV_MAIN_BASE = 0x00500000
  82. DEFINE FLASH_FV_MAIN_SIZE = 0x001E0000
  83. #
  84. # Place NV Storage just above Platform Data Base
  85. #
  86. DEFINE NVRAM_AREA_VARIABLE_BASE = 0x006E0000
  87. DEFINE NVRAM_AREA_SIZE = 0x00020000
  88. DEFINE NVRAM_AREA_VARIABLE_SIZE = 0x0000E000
  89. DEFINE FTW_WORKING_BASE = $(NVRAM_AREA_VARIABLE_BASE) + $(NVRAM_AREA_VARIABLE_SIZE)
  90. DEFINE FTW_WORKING_SIZE = 0x00002000
  91. DEFINE FTW_SPARE_BASE = $(FTW_WORKING_BASE) + $(FTW_WORKING_SIZE)
  92. DEFINE FTW_SPARE_SIZE = $(NVRAM_AREA_SIZE) - $(NVRAM_AREA_VARIABLE_SIZE) - $(FTW_WORKING_SIZE)
  93. #
  94. # RMU Binary must be at fixed address 1MB below 4GB (0xFFF00000)
  95. #
  96. DEFINE RMU_BINARY_BASE = 0x00700000 # HW fixed address
  97. DEFINE RMU_BINARY_SIZE = 0x00008000 # HW fixed address, so fixed size
  98. #
  99. # Platform Data Base must be 64KB above RMU
  100. #
  101. DEFINE VPD_BASE = 0x00708000
  102. DEFINE VPD_SIZE = 0x00001000
  103. #
  104. # Place FV Recovery above NV Storage
  105. #
  106. DEFINE FVRECOVERY_IMAGE_SIZE = 0x000F0000
  107. DEFINE FVRECOVERY_IMAGE_BASE = $(FLASH_SIZE) - $(FVRECOVERY_IMAGE_SIZE)
  108. ################################################################################
  109. #
  110. # FD Section
  111. # The [FD] Section is made up of the definition statements and a
  112. # description of what goes into the Flash Device Image. Each FD section
  113. # defines one flash "device" image. A flash device image may be one of
  114. # the following: Removable media bootable image (like a boot floppy
  115. # image,) an Option ROM image (that would be "flashed" into an add-in
  116. # card,) a System "Flash" image (that would be burned into a system's
  117. # flash) or an Update ("Capsule") image that will be used to update and
  118. # existing system flash.
  119. #
  120. ################################################################################
  121. [FD.Quark]
  122. BaseAddress = 0xFF800000 #The base address of the Flash Device; set to same value as FLASH_BASE.
  123. Size = 0x800000 #The size in bytes of the Flash Device; set to same value as FLASH_SIZE.
  124. ErasePolarity = 1
  125. BlockSize = $(FLASH_BLOCKSIZE)
  126. NumBlocks = 0x800 #The number of blocks for the Flash Device.
  127. SET gQuarkPlatformTokenSpaceGuid.PcdFlashAreaBaseAddress = $(FLASH_BASE)
  128. SET gQuarkPlatformTokenSpaceGuid.PcdFlashAreaSize = $(FLASH_SIZE)
  129. ################################################################################
  130. #
  131. # Following are lists of FD Region layout which correspond to the locations of different
  132. # images within the flash device.
  133. #
  134. # Regions must be defined in ascending order and may not overlap.
  135. #
  136. # A Layout Region start with a eight digit hex offset (leading "0x" required) followed by
  137. # the pipe "|" character, followed by the size of the region, also in hex with the leading
  138. # "0x" characters. Like:
  139. # Offset|Size
  140. # PcdOffsetCName|PcdSizeCName
  141. # RegionType <FV, DATA, or FILE>
  142. #
  143. ################################################################################
  144. ########################################################
  145. # Quark Payload Image
  146. ########################################################
  147. $(FLASH_FV_PAYLOAD_BASE)|$(FLASH_FV_PAYLOAD_SIZE)
  148. gQuarkPlatformTokenSpaceGuid.PcdFlashFvPayloadBase|gQuarkPlatformTokenSpaceGuid.PcdFlashFvPayloadSize
  149. FV = PAYLOAD
  150. ########################################################
  151. # Quark FVMAIN Image (Compressed)
  152. ########################################################
  153. $(FLASH_FV_MAIN_BASE)|$(FLASH_FV_MAIN_SIZE)
  154. gQuarkPlatformTokenSpaceGuid.PcdFlashFvMainBase|gQuarkPlatformTokenSpaceGuid.PcdFlashFvMainSize
  155. FV = FVMAIN_COMPACT
  156. #############################################################################
  157. # Quark NVRAM Area
  158. # Quark NVRAM Area contains: Variable + FTW Working + FTW Spare
  159. #############################################################################
  160. $(NVRAM_AREA_VARIABLE_BASE)|$(NVRAM_AREA_VARIABLE_SIZE)
  161. gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize
  162. #NV_VARIABLE_STORE
  163. DATA = {
  164. ## This is the EFI_FIRMWARE_VOLUME_HEADER
  165. # ZeroVector []
  166. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  167. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  168. # FileSystemGuid: gEfiSystemNvDataFvGuid =
  169. # { 0xFFF12B8D, 0x7696, 0x4C8B, { 0xA9, 0x85, 0x27, 0x47, 0x07, 0x5B, 0x4F, 0x50 }}
  170. 0x8D, 0x2B, 0xF1, 0xFF, 0x96, 0x76, 0x8B, 0x4C,
  171. 0xA9, 0x85, 0x27, 0x47, 0x07, 0x5B, 0x4F, 0x50,
  172. # FvLength: 0x20000
  173. 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00,
  174. #Signature "_FVH" #Attributes
  175. 0x5f, 0x46, 0x56, 0x48, 0xff, 0xfe, 0x04, 0x00,
  176. #HeaderLength #CheckSum #ExtHeaderOffset #Reserved #Revision
  177. 0x48, 0x00, 0x19, 0xF9, 0x00, 0x00, 0x00, 0x02,
  178. #Blockmap[0]: 32 Blocks * 0x1000 Bytes / Block
  179. 0x20, 0x00, 0x00, 0x00, $(FLASH_BLOCKSIZE_DATA),
  180. #Blockmap[1]: End
  181. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  182. ## This is the VARIABLE_STORE_HEADER
  183. !if $(SECURE_BOOT_ENABLE)
  184. # Signature: gEfiAuthenticatedVariableGuid = { 0xaaf32c78, 0x947b, 0x439a, { 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92 } }
  185. 0x78, 0x2c, 0xf3, 0xaa, 0x7b, 0x94, 0x9a, 0x43,
  186. 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92,
  187. !else
  188. # Signature: gEfiVariableGuid = { 0xddcf3616, 0x3275, 0x4164, { 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d }}
  189. 0x16, 0x36, 0xcf, 0xdd, 0x75, 0x32, 0x64, 0x41,
  190. 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d,
  191. !endif
  192. #Size: 0x0E000 (gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize) - 0x48 (size of EFI_FIRMWARE_VOLUME_HEADER) = 0x0DFB8
  193. # This can speed up the Variable Dispatch a bit.
  194. 0xB8, 0xDF, 0x00, 0x00,
  195. #FORMATTED: 0x5A #HEALTHY: 0xFE #Reserved: UINT16 #Reserved1: UINT32
  196. 0x5A, 0xFE, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
  197. }
  198. $(FTW_WORKING_BASE)|$(FTW_WORKING_SIZE)
  199. gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize
  200. #NV_FTW_WORKING
  201. DATA = {
  202. # EFI_FAULT_TOLERANT_WORKING_BLOCK_HEADER->Signature = gEdkiiWorkingBlockSignatureGuid =
  203. # { 0x9e58292b, 0x7c68, 0x497d, { 0xa0, 0xce, 0x65, 0x0, 0xfd, 0x9f, 0x1b, 0x95 }}
  204. 0x2b, 0x29, 0x58, 0x9e, 0x68, 0x7c, 0x7d, 0x49,
  205. 0xa0, 0xce, 0x65, 0x0, 0xfd, 0x9f, 0x1b, 0x95,
  206. # Crc:UINT32 #WorkingBlockValid:1, WorkingBlockInvalid:1, Reserved
  207. 0xE2, 0x33, 0xF2, 0x03, 0xFE, 0xFF, 0xFF, 0xFF,
  208. # WriteQueueSize: UINT64 #Size: 0x2000 - 0x20 (FTW_WORKING_HEADER) = 0x1FE0
  209. 0xE0, 0x1F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
  210. }
  211. $(FTW_SPARE_BASE)|$(FTW_SPARE_SIZE)
  212. gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
  213. #NV_FTW_SPARE
  214. #########################################################
  215. # Quark Remote Management Unit Binary
  216. #########################################################
  217. $(RMU_BINARY_BASE)|$(RMU_BINARY_SIZE)
  218. INF QuarkSocBinPkg/QuarkNorthCluster/Binary/QuarkMicrocode/QuarkMicrocode.inf
  219. #########################################################
  220. # PlatformData Binary, default for standalone is none built-in so user selects.
  221. #########################################################
  222. $(VPD_BASE)|$(VPD_SIZE)
  223. gEfiMdeModulePkgTokenSpaceGuid.PcdVpdBaseAddress
  224. FILE = $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/FV/8C3D856A-9BE6-468E-850A-24F7A8D38E08.bin
  225. #######################
  226. # Quark FVRECOVERY Image
  227. #######################
  228. $(FVRECOVERY_IMAGE_BASE)|$(FVRECOVERY_IMAGE_SIZE)
  229. gQuarkPlatformTokenSpaceGuid.PcdFlashFvRecoveryBase|gQuarkPlatformTokenSpaceGuid.PcdFlashFvRecoverySize
  230. FV = FVRECOVERY
  231. ################################################################################
  232. #
  233. # FV Section
  234. #
  235. # [FV] section is used to define what components or modules are placed within a flash
  236. # device file. This section also defines order the components and modules are positioned
  237. # within the image. The [FV] section consists of define statements, set statements and
  238. # module statements.
  239. #
  240. ################################################################################
  241. [FV.FVRECOVERY]
  242. BlockSize = $(FLASH_BLOCKSIZE)
  243. FvAlignment = 16 #FV alignment and FV attributes setting.
  244. ERASE_POLARITY = 1
  245. MEMORY_MAPPED = TRUE
  246. STICKY_WRITE = TRUE
  247. LOCK_CAP = TRUE
  248. LOCK_STATUS = TRUE
  249. WRITE_DISABLED_CAP = TRUE
  250. WRITE_ENABLED_CAP = TRUE
  251. WRITE_STATUS = TRUE
  252. WRITE_LOCK_CAP = TRUE
  253. WRITE_LOCK_STATUS = TRUE
  254. READ_DISABLED_CAP = TRUE
  255. READ_ENABLED_CAP = TRUE
  256. READ_STATUS = TRUE
  257. READ_LOCK_CAP = TRUE
  258. READ_LOCK_STATUS = TRUE
  259. FvNameGuid = 18D6D9F4-2EEF-4913-AEE6-BE61C6DA6CC8
  260. ################################################################################
  261. #
  262. # The INF statements point to EDK component and EDK II module INF files, which will be placed into this FV image.
  263. # Parsing tools will scan the INF file to determine the type of component or module.
  264. # The component or module type is used to reference the standard rules
  265. # defined elsewhere in the FDF file.
  266. #
  267. # The format for INF statements is:
  268. # INF $(PathAndInfFileName)
  269. #
  270. ################################################################################
  271. ##
  272. # PEI Apriori file example, more PEIM module added later.
  273. ##
  274. APRIORI PEI {
  275. INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
  276. # PlatformConfigPei should be immediately after Pcd driver.
  277. INF QuarkPlatformPkg/Platform/Pei/PlatformConfig/PlatformConfigPei.inf
  278. INF MdeModulePkg/Universal/PcatSingleSegmentPciCfg2Pei/PcatSingleSegmentPciCfg2Pei.inf
  279. INF MdeModulePkg/Universal/ReportStatusCodeRouter/Pei/ReportStatusCodeRouterPei.inf
  280. INF MdeModulePkg/Universal/StatusCodeHandler/Pei/StatusCodeHandlerPei.inf
  281. }
  282. ##
  283. # SEC Phase modules
  284. ##
  285. INF UefiCpuPkg/SecCore/SecCore.inf
  286. !if $(CAPSULE_ENABLE) || $(RECOVERY_ENABLE)
  287. # FMP image decriptor
  288. INF RuleOverride = FMP_IMAGE_DESC QuarkPlatformPkg/Feature/Capsule/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf
  289. !endif
  290. INF MdeModulePkg/Core/Pei/PeiMain.inf
  291. ##
  292. # PEI Phase RAW Data files.
  293. ##
  294. FILE FREEFORM = PCD(gEfiQuarkNcSocIdTokenSpaceGuid.PcdQuarkMicrocodeFile) {
  295. SECTION RAW = QuarkSocBinPkg/QuarkNorthCluster/Binary/QuarkMicrocode/RMU.bin
  296. }
  297. INF RuleOverride = NORELOC MdeModulePkg/Universal/PCD/Pei/Pcd.inf
  298. INF QuarkPlatformPkg/Platform/Pei/PlatformConfig/PlatformConfigPei.inf
  299. INF RuleOverride = NORELOC MdeModulePkg/Universal/ReportStatusCodeRouter/Pei/ReportStatusCodeRouterPei.inf
  300. INF RuleOverride = NORELOC MdeModulePkg/Universal/StatusCodeHandler/Pei/StatusCodeHandlerPei.inf
  301. INF RuleOverride = NORELOC MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf
  302. INF RuleOverride = NORELOC MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
  303. INF RuleOverride = NORELOC UefiCpuPkg/CpuMpPei/CpuMpPei.inf
  304. INF RuleOverride = NORELOC MdeModulePkg/Universal/CapsulePei/CapsulePei.inf
  305. INF RuleOverride = NORELOC QuarkSocPkg/QuarkNorthCluster/MemoryInit/Pei/MemoryInitPei.inf
  306. INF RuleOverride = NORELOC QuarkSocPkg/QuarkNorthCluster/Smm/Pei/SmmAccessPei/SmmAccessPei.inf
  307. INF RuleOverride = NORELOC QuarkSocPkg/QuarkNorthCluster/Smm/Pei/SmmControlPei/SmmControlPei.inf
  308. INF QuarkPlatformPkg/Platform/Pei/PlatformInit/PlatformEarlyInit.inf
  309. INF MdeModulePkg/Universal/PcatSingleSegmentPciCfg2Pei/PcatSingleSegmentPciCfg2Pei.inf
  310. INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
  311. INF UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationPei.inf
  312. INF UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf
  313. !if $(MEASURED_BOOT_ENABLE)
  314. INF SecurityPkg/Tcg/Tcg2Config/Tcg2ConfigPei.inf
  315. INF SecurityPkg/Tcg/TcgPei/TcgPei.inf
  316. !endif
  317. !if $(RECOVERY_ENABLE)
  318. FILE FV_IMAGE = 1E9D7604-EF45-46a0-BD8A-71AC78C17AC1 {
  319. SECTION PEI_DEPEX_EXP = {gEfiPeiMemoryDiscoveredPpiGuid AND gEfiPeiBootInRecoveryModePpiGuid}
  320. SECTION GUIDED A31280AD-481E-41B6-95E8-127F4C984779 { # TIANO COMPRESS GUID
  321. SECTION FV_IMAGE = FVRECOVERY_COMPONENTS
  322. }
  323. }
  324. !endif
  325. !if $(RECOVERY_ENABLE)
  326. ################################################################################
  327. #
  328. # FV Section
  329. #
  330. # [FV] section is used to define what components or modules are placed within a flash
  331. # device file. This section also defines order the components and modules are positioned
  332. # within the image. The [FV] section consists of define statements, set statements and
  333. # module statements.
  334. #
  335. ################################################################################
  336. [FV.FVRECOVERY_COMPONENTS]
  337. BlockSize = $(FLASH_BLOCKSIZE)
  338. FvAlignment = 16 #FV alignment and FV attributes setting.
  339. ERASE_POLARITY = 1
  340. MEMORY_MAPPED = TRUE
  341. STICKY_WRITE = TRUE
  342. LOCK_CAP = TRUE
  343. LOCK_STATUS = TRUE
  344. WRITE_DISABLED_CAP = TRUE
  345. WRITE_ENABLED_CAP = TRUE
  346. WRITE_STATUS = TRUE
  347. WRITE_LOCK_CAP = TRUE
  348. WRITE_LOCK_STATUS = TRUE
  349. READ_DISABLED_CAP = TRUE
  350. READ_ENABLED_CAP = TRUE
  351. READ_STATUS = TRUE
  352. READ_LOCK_CAP = TRUE
  353. READ_LOCK_STATUS = TRUE
  354. INF QuarkSocPkg/QuarkSouthCluster/Usb/Common/Pei/UsbPei.inf
  355. INF MdeModulePkg/Bus/Pci/EhciPei/EhciPei.inf
  356. INF QuarkSocPkg/QuarkSouthCluster/Usb/Ohci/Pei/OhciPei.inf
  357. INF MdeModulePkg/Bus/Usb/UsbBusPei/UsbBusPei.inf
  358. INF MdeModulePkg/Bus/Usb/UsbBotPei/UsbBotPei.inf
  359. INF FatPkg/FatPei/FatPei.inf
  360. INF MdeModulePkg/Universal/Disk/CdExpressPei/CdExpressPei.inf
  361. INF SignedCapsulePkg/Universal/RecoveryModuleLoadPei/RecoveryModuleLoadPei.inf
  362. !endif
  363. ################################################################################
  364. #
  365. # FV Section
  366. #
  367. # [FV] section is used to define what components or modules are placed within a flash
  368. # device file. This section also defines order the components and modules are positioned
  369. # within the image. The [FV] section consists of define statements, set statements and
  370. # module statements.
  371. #
  372. ################################################################################
  373. [FV.FVMAIN]
  374. BlockSize = $(FLASH_BLOCKSIZE)
  375. FvAlignment = 16
  376. ERASE_POLARITY = 1
  377. MEMORY_MAPPED = TRUE
  378. STICKY_WRITE = TRUE
  379. LOCK_CAP = TRUE
  380. LOCK_STATUS = TRUE
  381. WRITE_DISABLED_CAP = TRUE
  382. WRITE_ENABLED_CAP = TRUE
  383. WRITE_STATUS = TRUE
  384. WRITE_LOCK_CAP = TRUE
  385. WRITE_LOCK_STATUS = TRUE
  386. READ_DISABLED_CAP = TRUE
  387. READ_ENABLED_CAP = TRUE
  388. READ_STATUS = TRUE
  389. READ_LOCK_CAP = TRUE
  390. READ_LOCK_STATUS = TRUE
  391. FvNameGuid = 30D9ED01-38D2-418a-90D5-C561750BF80F
  392. ##
  393. # DXE Phase modules
  394. ##
  395. INF MdeModulePkg/Core/Dxe/DxeMain.inf
  396. INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
  397. !if $(SOURCE_DEBUG_ENABLE)
  398. INF SourceLevelDebugPkg/DebugAgentDxe/DebugAgentDxe.inf
  399. !endif
  400. #
  401. # Early SoC / Platform modules
  402. #
  403. INF QuarkPlatformPkg/Platform/Dxe/PlatformInit/PlatformInitDxe.inf
  404. ##
  405. # EDK Core modules
  406. ##
  407. INF UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
  408. INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf
  409. INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf
  410. INF MdeModulePkg/Universal/ReportStatusCodeRouter/Smm/ReportStatusCodeRouterSmm.inf
  411. INF MdeModulePkg/Universal/StatusCodeHandler/Smm/StatusCodeHandlerSmm.inf
  412. INF MdeModulePkg/Universal/SectionExtractionDxe/SectionExtractionDxe.inf
  413. INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
  414. INF UefiCpuPkg/CpuDxe/CpuDxe.inf
  415. INF UefiCpuPkg/CpuS3DataDxe/CpuS3DataDxe.inf
  416. INF MdeModulePkg/Universal/Metronome/Metronome.inf
  417. INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
  418. INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
  419. INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf
  420. !if $(SECURE_BOOT_ENABLE)
  421. INF SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf
  422. !endif
  423. INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.inf
  424. INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf
  425. INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
  426. INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
  427. INF MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf
  428. INF PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntimeDxe.inf
  429. INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
  430. INF MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf
  431. #
  432. # Platform
  433. #
  434. INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
  435. INF MdeModulePkg/Application/UiApp/UiApp.inf
  436. INF QuarkPlatformPkg/Pci/Dxe/PciHostBridge/PciHostBridge.inf
  437. INF QuarkPlatformPkg/Platform/SpiFvbServices/PlatformSpi.inf
  438. INF QuarkPlatformPkg/Platform/SpiFvbServices/PlatformSmmSpi.inf
  439. INF QuarkSocPkg/QuarkNorthCluster/QNCInit/Dxe/QNCInitDxe.inf
  440. INF PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.inf
  441. INF QuarkSocPkg/QuarkNorthCluster/Smm/Dxe/SmmAccessDxe/SmmAccess.inf
  442. INF QuarkSocPkg/QuarkNorthCluster/S3Support/Dxe/QncS3Support.inf
  443. INF QuarkSocPkg/QuarkNorthCluster/Spi/PchSpiRuntime.inf
  444. INF QuarkSocPkg/QuarkNorthCluster/Spi/PchSpiSmm.inf
  445. INF QuarkPlatformPkg/Platform/Dxe/Setup/DxePlatform.inf
  446. #
  447. # ACPI
  448. #
  449. INF QuarkPlatformPkg/Platform/Dxe/SaveMemoryConfig/SaveMemoryConfig.inf
  450. INF MdeModulePkg/Universal/Acpi/S3SaveStateDxe/S3SaveStateDxe.inf
  451. INF MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/BootScriptExecutorDxe.inf
  452. INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
  453. INF QuarkPlatformPkg/Acpi/Dxe/AcpiPlatform/AcpiPlatform.inf
  454. INF RuleOverride = ACPITABLE QuarkPlatformPkg/Acpi/AcpiTables/AcpiTables.inf
  455. #
  456. # SMM
  457. #
  458. INF MdeModulePkg/Core/PiSmmCore/PiSmmIpl.inf
  459. INF MdeModulePkg/Core/PiSmmCore/PiSmmCore.inf
  460. INF UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf
  461. INF UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.inf
  462. INF QuarkSocPkg/QuarkNorthCluster/Smm/Dxe/SmmControlDxe/SmmControlDxe.inf
  463. INF QuarkSocPkg/QuarkNorthCluster/Smm/DxeSmm/QncSmmDispatcher/QNCSmmDispatcher.inf
  464. INF QuarkPlatformPkg/Acpi/DxeSmm/AcpiSmm/AcpiSmmPlatform.inf
  465. INF QuarkPlatformPkg/Acpi/DxeSmm/SmmPowerManagement/SmmPowerManagement.inf
  466. INF MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.inf
  467. INF UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationSmm.inf
  468. #
  469. # SMBIOS
  470. #
  471. INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
  472. INF QuarkPlatformPkg/Platform/Dxe/SmbiosMiscDxe/SmbiosMiscDxe.inf
  473. INF QuarkPlatformPkg/Platform/Dxe/MemorySubClass/MemorySubClass.inf
  474. #
  475. # PCI
  476. #
  477. INF QuarkPlatformPkg/Pci/Dxe/PciPlatform/PciPlatform.inf
  478. INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
  479. INF QuarkSocPkg/QuarkSouthCluster/IohInit/Dxe/IohInitDxe.inf
  480. !if $(SOURCE_DEBUG_ENABLE)
  481. !else
  482. INF MdeModulePkg/Bus/Pci/PciSioSerialDxe/PciSioSerialDxe.inf
  483. !endif
  484. #
  485. # USB
  486. #
  487. !if $(PERFORMANCE_ENABLE)
  488. !else
  489. INF MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf
  490. INF QuarkSocPkg/QuarkSouthCluster/Usb/Ohci/Dxe/OhciDxe.inf
  491. INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf
  492. INF MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf
  493. INF MdeModulePkg/Bus/Usb/UsbMouseDxe/UsbMouseDxe.inf
  494. INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf
  495. !endif
  496. #
  497. # SDIO
  498. #
  499. !if $(PERFORMANCE_ENABLE)
  500. !else
  501. INF QuarkSocPkg/QuarkSouthCluster/Sdio/Dxe/SDControllerDxe/SDControllerDxe.inf
  502. INF QuarkSocPkg/QuarkSouthCluster/Sdio/Dxe/SDMediaDeviceDxe/SDMediaDeviceDxe.inf
  503. !endif
  504. #
  505. # Console
  506. #
  507. INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
  508. INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
  509. INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
  510. INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
  511. INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
  512. INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
  513. INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
  514. #
  515. # File System Modules
  516. #
  517. !if $(PERFORMANCE_ENABLE)
  518. !else
  519. INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
  520. INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
  521. INF FatPkg/EnhancedFatDxe/Fat.inf
  522. !endif
  523. #
  524. # Performance Application
  525. #
  526. !if $(PERFORMANCE_ENABLE)
  527. INF ShellPkg/DynamicCommand/DpDynamicCommand/DpDynamicCommand.inf
  528. !endif
  529. #
  530. # Trusted Platform Module
  531. #
  532. !if $(MEASURED_BOOT_ENABLE)
  533. INF SecurityPkg/Tcg/MemoryOverwriteControl/TcgMor.inf
  534. INF SecurityPkg/Tcg/TcgDxe/TcgDxe.inf
  535. INF RuleOverride = DRIVER_ACPITABLE SecurityPkg/Tcg/TcgSmm/TcgSmm.inf
  536. !endif
  537. !if $(CAPSULE_ENABLE)
  538. INF MdeModulePkg/Universal/EsrtFmpDxe/EsrtFmpDxe.inf
  539. INF SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareReportDxe.inf
  540. !endif
  541. !if $(RECOVERY_ENABLE)
  542. FILE FREEFORM = PCD(gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiRsa2048Sha256TestPublicKeyFileGuid) {
  543. SECTION RAW = BaseTools/Source/Python/Rsa2048Sha256Sign/TestSigningPublicKey.bin
  544. SECTION UI = "Rsa2048Sha256TestSigningPublicKey"
  545. }
  546. !endif
  547. !if $(CAPSULE_ENABLE)
  548. FILE FREEFORM = PCD(gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiPkcs7TestPublicKeyFileGuid) {
  549. SECTION RAW = BaseTools/Source/Python/Pkcs7Sign/TestRoot.cer
  550. SECTION UI = "Pkcs7TestRoot"
  551. }
  552. !endif
  553. ################################################################################
  554. #
  555. # FV Section
  556. #
  557. # [FV] section is used to define what components or modules are placed within a flash
  558. # device file. This section also defines order the components and modules are positioned
  559. # within the image. The [FV] section consists of define statements, set statements and
  560. # module statements.
  561. #
  562. ################################################################################
  563. [FV.FVMAIN_COMPACT]
  564. FvAlignment = 16
  565. ERASE_POLARITY = 1
  566. MEMORY_MAPPED = TRUE
  567. STICKY_WRITE = TRUE
  568. LOCK_CAP = TRUE
  569. LOCK_STATUS = TRUE
  570. WRITE_DISABLED_CAP = TRUE
  571. WRITE_ENABLED_CAP = TRUE
  572. WRITE_STATUS = TRUE
  573. WRITE_LOCK_CAP = TRUE
  574. WRITE_LOCK_STATUS = TRUE
  575. READ_DISABLED_CAP = TRUE
  576. READ_ENABLED_CAP = TRUE
  577. READ_STATUS = TRUE
  578. READ_LOCK_CAP = TRUE
  579. READ_LOCK_STATUS = TRUE
  580. FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
  581. SECTION GUIDED A31280AD-481E-41B6-95E8-127F4C984779 { # TIANO COMPRESS GUID
  582. SECTION FV_IMAGE = FVMAIN
  583. }
  584. }
  585. ################################################################################
  586. #
  587. # FV Section
  588. #
  589. # [FV] section is used to define what components or modules are placed within a flash
  590. # device file. This section also defines order the components and modules are positioned
  591. # within the image. The [FV] section consists of define statements, set statements and
  592. # module statements.
  593. #
  594. ################################################################################
  595. [FV.PAYLOAD]
  596. BlockSize = $(FLASH_BLOCKSIZE)
  597. FvAlignment = 16 #FV alignment and FV attributes setting.
  598. ERASE_POLARITY = 1
  599. MEMORY_MAPPED = TRUE
  600. STICKY_WRITE = TRUE
  601. LOCK_CAP = TRUE
  602. LOCK_STATUS = TRUE
  603. WRITE_DISABLED_CAP = TRUE
  604. WRITE_ENABLED_CAP = TRUE
  605. WRITE_STATUS = TRUE
  606. WRITE_LOCK_CAP = TRUE
  607. WRITE_LOCK_STATUS = TRUE
  608. READ_DISABLED_CAP = TRUE
  609. READ_ENABLED_CAP = TRUE
  610. READ_STATUS = TRUE
  611. READ_LOCK_CAP = TRUE
  612. READ_LOCK_STATUS = TRUE
  613. #
  614. # Shell and Applications
  615. #
  616. INF ShellPkg/Application/Shell/Shell.inf
  617. !if $(CAPSULE_ENABLE) || $(RECOVERY_ENABLE)
  618. [FV.CapsuleDispatchFv]
  619. FvAlignment = 16
  620. ERASE_POLARITY = 1
  621. MEMORY_MAPPED = TRUE
  622. STICKY_WRITE = TRUE
  623. LOCK_CAP = TRUE
  624. LOCK_STATUS = TRUE
  625. WRITE_DISABLED_CAP = TRUE
  626. WRITE_ENABLED_CAP = TRUE
  627. WRITE_STATUS = TRUE
  628. WRITE_LOCK_CAP = TRUE
  629. WRITE_LOCK_STATUS = TRUE
  630. READ_DISABLED_CAP = TRUE
  631. READ_ENABLED_CAP = TRUE
  632. READ_STATUS = TRUE
  633. READ_LOCK_CAP = TRUE
  634. READ_LOCK_STATUS = TRUE
  635. !if $(CAPSULE_ENABLE)
  636. INF SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareUpdateDxe.inf
  637. !endif
  638. [FV.SystemFirmwareUpdateCargo]
  639. FvAlignment = 16
  640. ERASE_POLARITY = 1
  641. MEMORY_MAPPED = TRUE
  642. STICKY_WRITE = TRUE
  643. LOCK_CAP = TRUE
  644. LOCK_STATUS = TRUE
  645. WRITE_DISABLED_CAP = TRUE
  646. WRITE_ENABLED_CAP = TRUE
  647. WRITE_STATUS = TRUE
  648. WRITE_LOCK_CAP = TRUE
  649. WRITE_LOCK_STATUS = TRUE
  650. READ_DISABLED_CAP = TRUE
  651. READ_ENABLED_CAP = TRUE
  652. READ_STATUS = TRUE
  653. READ_LOCK_CAP = TRUE
  654. READ_LOCK_STATUS = TRUE
  655. FILE RAW = 14D83A59-A810-4556-8192-1C0A593C065C { # PcdEdkiiSystemFirmwareFileGuid
  656. FD = Quark
  657. }
  658. FILE RAW = ce57b167-b0e4-41e8-a897-5f4feb781d40 { # gEdkiiSystemFmpCapsuleDriverFvFileGuid
  659. FV = CapsuleDispatchFv
  660. }
  661. FILE RAW = 812136D3-4D3A-433A-9418-29BB9BF78F6E { # gEdkiiSystemFmpCapsuleConfigFileGuid
  662. QuarkPlatformPkg/Feature/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini
  663. }
  664. !endif
  665. !if $(CAPSULE_ENABLE)
  666. [FmpPayload.FmpPayloadSystemFirmwarePkcs7]
  667. IMAGE_HEADER_INIT_VERSION = 0x02
  668. IMAGE_TYPE_ID = 62af20c0-7016-424a-9bf8-9ccc86584090 # PcdSystemFmpCapsuleImageTypeIdGuid
  669. IMAGE_INDEX = 0x1
  670. HARDWARE_INSTANCE = 0x0
  671. MONOTONIC_COUNT = 0x2
  672. CERTIFICATE_GUID = 4AAFD29D-68DF-49EE-8AA9-347D375665A7 # PKCS7
  673. FV = SystemFirmwareUpdateCargo
  674. [Capsule.QuarkFirmwareUpdateCapsuleFmpPkcs7]
  675. CAPSULE_GUID = 6dcbd5ed-e82d-4c44-bda1-7194199ad92a # gEfiFmpCapsuleGuid
  676. CAPSULE_FLAGS = PersistAcrossReset,InitiateReset
  677. CAPSULE_HEADER_SIZE = 0x20
  678. CAPSULE_HEADER_INIT_VERSION = 0x1
  679. FMP_PAYLOAD = FmpPayloadSystemFirmwarePkcs7
  680. !endif
  681. !if $(RECOVERY_ENABLE)
  682. [FmpPayload.FmpPayloadSystemFirmwareRsa2048]
  683. IMAGE_HEADER_INIT_VERSION = 0x02
  684. IMAGE_TYPE_ID = 62af20c0-7016-424a-9bf8-9ccc86584090 # PcdSystemFmpCapsuleImageTypeIdGuid
  685. IMAGE_INDEX = 0x1
  686. HARDWARE_INSTANCE = 0x0
  687. MONOTONIC_COUNT = 0x2
  688. CERTIFICATE_GUID = A7717414-C616-4977-9420-844712A735BF # RSA2048SHA256
  689. FV = SystemFirmwareUpdateCargo
  690. [Capsule.QuarkRec]
  691. CAPSULE_GUID = 6dcbd5ed-e82d-4c44-bda1-7194199ad92a # gEfiFmpCapsuleGuid
  692. CAPSULE_FLAGS = PersistAcrossReset,InitiateReset
  693. CAPSULE_HEADER_SIZE = 0x20
  694. CAPSULE_HEADER_INIT_VERSION = 0x1
  695. FMP_PAYLOAD = FmpPayloadSystemFirmwareRsa2048
  696. !endif
  697. ################################################################################
  698. #
  699. # Rules are use with the [FV] section's module INF type to define
  700. # how an FFS file is created for a given INF file. The following Rule are the default
  701. # rules for the different module type. User can add the customized rules to define the
  702. # content of the FFS file.
  703. #
  704. ################################################################################
  705. [Rule.Common.SEC]
  706. FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
  707. TE TE Align = 8 $(INF_OUTPUT)/$(MODULE_NAME).efi
  708. RAW BIN Align = 16 |.com
  709. }
  710. [Rule.Common.PEI_CORE]
  711. FILE PEI_CORE = $(NAMED_GUID) {
  712. TE TE $(INF_OUTPUT)/$(MODULE_NAME).efi
  713. UI STRING="$(MODULE_NAME)" Optional
  714. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  715. }
  716. [Rule.Common.PEIM.NORELOC]
  717. FILE PEIM = $(NAMED_GUID) RELOCS_STRIPPED {
  718. PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
  719. TE TE $(INF_OUTPUT)/$(MODULE_NAME).efi
  720. UI STRING="$(MODULE_NAME)" Optional
  721. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  722. }
  723. [Rule.Common.PEIM]
  724. FILE PEIM = $(NAMED_GUID) {
  725. PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
  726. TE TE $(INF_OUTPUT)/$(MODULE_NAME).efi
  727. UI STRING="$(MODULE_NAME)" Optional
  728. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  729. }
  730. [Rule.Common.DXE_CORE]
  731. FILE DXE_CORE = $(NAMED_GUID) {
  732. PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
  733. UI STRING="$(MODULE_NAME)" Optional
  734. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  735. }
  736. [Rule.Common.UEFI_DRIVER]
  737. FILE DRIVER = $(NAMED_GUID) {
  738. DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
  739. PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
  740. UI STRING="$(MODULE_NAME)" Optional
  741. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  742. }
  743. [Rule.Common.DXE_DRIVER]
  744. FILE DRIVER = $(NAMED_GUID) {
  745. DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
  746. PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
  747. UI STRING="$(MODULE_NAME)" Optional
  748. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  749. }
  750. [Rule.Common.DXE_RUNTIME_DRIVER]
  751. FILE DRIVER = $(NAMED_GUID) {
  752. DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
  753. PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
  754. UI STRING="$(MODULE_NAME)" Optional
  755. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  756. }
  757. [Rule.Common.DXE_SMM_DRIVER]
  758. FILE SMM = $(NAMED_GUID) {
  759. SMM_DEPEX SMM_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
  760. PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
  761. UI STRING="$(MODULE_NAME)" Optional
  762. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  763. }
  764. [Rule.Common.DXE_SMM_DRIVER.DRIVER_ACPITABLE]
  765. FILE SMM = $(NAMED_GUID) {
  766. DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
  767. PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
  768. RAW ACPI Optional |.acpi
  769. RAW ASL Optional |.aml
  770. UI STRING="$(MODULE_NAME)" Optional
  771. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  772. }
  773. [Rule.Common.SMM_CORE]
  774. FILE SMM_CORE = $(NAMED_GUID) {
  775. PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
  776. UI STRING="$(MODULE_NAME)" Optional
  777. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  778. }
  779. [Rule.Common.UEFI_APPLICATION]
  780. FILE APPLICATION = $(NAMED_GUID) {
  781. PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
  782. UI STRING="$(MODULE_NAME)" Optional
  783. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  784. }
  785. [Rule.Common.UEFI_APPLICATION.TIANOCOMPRESSED]
  786. FILE APPLICATION = $(NAMED_GUID) {
  787. UI STRING="$(MODULE_NAME)" Optional
  788. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  789. SECTION GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE { # TIANO COMPRESS GUID
  790. PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
  791. }
  792. }
  793. [Rule.Common.UEFI_APPLICATION.UI]
  794. FILE APPLICATION = $(NAMED_GUID) {
  795. PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
  796. UI STRING="Enter Setup"
  797. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  798. }
  799. [Rule.Common.USER_DEFINED.ACPITABLE]
  800. FILE FREEFORM = $(NAMED_GUID) {
  801. RAW ACPI |.acpi
  802. RAW ASL |.aml
  803. }
  804. [Rule.Common.PEIM.FMP_IMAGE_DESC]
  805. FILE PEIM = $(NAMED_GUID) {
  806. RAW BIN |.acpi
  807. PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
  808. PE32 PE32 Align=4K $(INF_OUTPUT)/$(MODULE_NAME).efi
  809. UI STRING="$(MODULE_NAME)" Optional
  810. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  811. }