IioBifurcationSlotTable.h 2.1 KB

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  1. /** @file
  2. Copyright (c) 2018, Intel Corporation. All rights reserved.<BR>
  3. SPDX-License-Identifier: BSD-2-Clause-Patent
  4. **/
  5. #ifndef IIOBIFURCATIONSLOTTABLE_H
  6. #define IIOBIFURCATIONSLOTTABLE_H
  7. #include "IioPlatformData.h"
  8. #define QAT_ENABLED 0 // QAT is active-low
  9. #define RISER_PRESENT 0
  10. #define RISER_NOT_PRESENT 1
  11. #define RISER_HP_EN 1
  12. #define RISER_WINGED_IN 0
  13. #define RISER_SLOT9_DISABLE 1
  14. typedef struct {
  15. UINT8 Socket;
  16. UINT8 IouNumber;
  17. UINT8 Bifurcation;
  18. } IIO_BIFURCATION_ENTRY;
  19. typedef union {
  20. struct {
  21. UINT8 PresentSignal:1;
  22. UINT8 HPConf:1;
  23. UINT8 WingConf:1;
  24. UINT8 Slot9En:1;
  25. } Bits;
  26. UINT8 Data;
  27. } PCIE_RISER_ID;
  28. enum {
  29. Iio_PortA = 0,
  30. Iio_PortB = 1,
  31. Iio_PortC = 2,
  32. Iio_PortD = 3
  33. };
  34. typedef enum {
  35. Iio_Iou0 =0,
  36. Iio_Iou1,
  37. Iio_Iou2,
  38. Iio_Mcp0,
  39. Iio_Mcp1,
  40. Iio_IouMax
  41. } IIO_IOUS;
  42. typedef enum {
  43. Iio_Socket0 = 0,
  44. Iio_Socket1,
  45. Iio_Socket2,
  46. Iio_Socket3,
  47. Iio_Socket4,
  48. Iio_Socket5,
  49. Iio_Socket6,
  50. Iio_Socket7
  51. } IIO_SOCKETS;
  52. typedef enum {
  53. VPP_PORT_0 = 0,
  54. VPP_PORT_1,
  55. VPP_PORT_2,
  56. VPP_PORT_3
  57. } VPP_PORT;
  58. ///
  59. /// Platform Port/Socket assignments.
  60. ///
  61. #define ENABLE 1
  62. #define DISABLE 0
  63. #define NO_SLT_IMP 0xFF
  64. #define SLT_IMP 1
  65. #define HIDE 1
  66. #define NOT_HIDE 0
  67. #define VPP_PORT_0 0
  68. #define VPP_PORT_1 1
  69. #define VPP_PORT_MAX 0xFF
  70. #define VPP_ADDR_MAX 0xFF
  71. #define PWR_VAL_MAX 0xFF
  72. #define PWR_SCL_MAX 0xFF
  73. typedef struct {
  74. UINT8 PortIndex;
  75. UINT8 SlotNumber; // 0xff if slot not implemented , Slot number if slot implemented
  76. BOOLEAN InterLockPresent;
  77. UINT8 SlotPowerLimitScale;
  78. UINT8 SlotPowerLimitValue;
  79. BOOLEAN HotPlugCapable;
  80. UINT8 VppPort; // 0xff if Vpp not enabled
  81. UINT8 VppAddress;
  82. BOOLEAN PcieSSDCapable;
  83. UINT8 PcieSSDVppPort; // 0xff if Vpp not enabled
  84. UINT8 PcieSSDVppAddress;
  85. BOOLEAN Hidden;
  86. } IIO_SLOT_CONFIG_ENTRY;
  87. #endif