PlatformPkgPcd.dsc 18 KB

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  1. ## @file
  2. #
  3. # Copyright (c) 2018 - 2021, Intel Corporation. All rights reserved.<BR>
  4. #
  5. # SPDX-License-Identifier: BSD-2-Clause-Patent
  6. #
  7. ##
  8. ################################################################################
  9. #
  10. # Pcd Section - list of all PCD Entries defined by this board.
  11. #
  12. ################################################################################
  13. [PcdsFixedAtBuild.common]
  14. ######################################
  15. # Key Boot Stage and FSP configuration
  16. ######################################
  17. #
  18. # Please select the Boot Stage here.
  19. # Stage 1 - enable debug (system deadloop after debug init)
  20. # Stage 2 - mem init (system deadloop after mem init)
  21. # Stage 3 - boot to shell only
  22. # Stage 4 - boot to OS
  23. # Stage 5 - boot to OS with security boot enabled
  24. # Stage 6 - boot with advanced features enabled
  25. #
  26. gMinPlatformPkgTokenSpaceGuid.PcdBootStage|4
  27. [PcdsFeatureFlag.common]
  28. gPlatformTokenSpaceGuid.PcdLockCsrSsidSvidRegister|FALSE
  29. # Server doesn't support capsle update on Reset.
  30. gEfiMdeModulePkgTokenSpaceGuid.PcdSupportUpdateCapsuleReset|FALSE
  31. gEfiCpuTokenSpaceGuid.PcdCpuSmmEnableBspElection|TRUE
  32. gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmEnableBspElection|TRUE
  33. gEfiCpuTokenSpaceGuid.PcdCpuHotPlugSupport|TRUE
  34. gUefiCpuPkgTokenSpaceGuid.PcdCpuHotPlugSupport|TRUE
  35. gEfiMdeModulePkgTokenSpaceGuid.PcdPciBusHotplugDeviceSupport|FALSE
  36. #S3 add
  37. gEfiMdeModulePkgTokenSpaceGuid.PcdDxeIplSwitchToLongMode|TRUE
  38. #S3 add
  39. gEfiCpuTokenSpaceGuid.PcdCpuConroeFamilyFlag|FALSE
  40. gEfiCpuTokenSpaceGuid.PcdCpuCedarMillFamilyFlag|FALSE
  41. gEfiCpuTokenSpaceGuid.PcdCpuPrescottFamilyFlag|FALSE
  42. gEfiCpuTokenSpaceGuid.PcdCpuNehalemFamilyFlag|FALSE
  43. gEfiCpuTokenSpaceGuid.PcdCpuIvyBridgeFamilyFlag|FALSE
  44. gEfiCpuTokenSpaceGuid.PcdCpuSandyBridgeFamilyFlag|FALSE
  45. gEfiCpuTokenSpaceGuid.PcdCpuHaswellFamilyFlag|TRUE
  46. gEfiCpuTokenSpaceGuid.PcdCpuSkylakeFamilyFlag|TRUE
  47. gEfiCpuTokenSpaceGuid.PcdCpuGateA20MDisableFlag|FALSE
  48. gEfiCpuTokenSpaceGuid.PcdCpuSmmDebug|TRUE
  49. gEfiCpuTokenSpaceGuid.PcdCpuSelectLfpAsBspFlag|TRUE
  50. gEfiCpuTokenSpaceGuid.PcdCpuSocketIdReassignmentFlag|TRUE
  51. ## This PCD specified whether ACPI SDT protocol is installed.
  52. gEfiMdeModulePkgTokenSpaceGuid.PcdInstallAcpiSdtProtocol|TRUE
  53. ######################################
  54. # Platform Configuration
  55. ######################################
  56. #
  57. # MinPlatform common include for required feature PCD
  58. # These PCD must be set before the core include files, CoreCommonLib,
  59. # CorePeiLib, and CoreDxeLib.
  60. # Optional MinPlatformPkg features should be enabled after this
  61. #
  62. !include MinPlatformPkg/Include/Dsc/MinPlatformFeaturesPcd.dsc.inc
  63. #
  64. # Commonly used MinPlatform feature configuration logic that maps functionity to stage
  65. #
  66. !include BoardModulePkg/Include/Dsc/CommonStageConfig.dsc.inc
  67. [PcdsFeatureFlag.X64]
  68. gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStackGuard|FALSE
  69. [PcdsFeatureFlag]
  70. gEfiMdeModulePkgTokenSpaceGuid.PcdBrowerGrayOutReadOnlyMenu|TRUE
  71. [PcdsDynamicExDefault]
  72. !include $(PROJECT)/StructureConfig.dsc
  73. [PcdsFixedAtBuild.X64]
  74. gMinPlatformPkgTokenSpaceGuid.PcdTrustedConsoleOutputDevicePath|{0x02, 0x01, 0x0C, 0x00, 0xd0, 0x41, 0x03, 0x0A, 0x01, 0x00, 0x00, 0x00, 0x01, 0x01, 0x06, 0x00, 0x00, 0x01, 0x01, 0x01, 0x06, 0x00, 0x00, 0x01, 0x7F, 0xFF, 0x04, 0x00}
  75. [PcdsFixedAtBuild.IA32]
  76. gCpuUncoreTokenSpaceGuid.PcdFlashSecCacheRegionBase|0x00FFA00000
  77. gCpuUncoreTokenSpaceGuid.PcdFlashSecCacheRegionSize|0x0000600000
  78. [PcdsFixedAtBuild.common]
  79. gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationChange|TRUE
  80. !if $(TARGET) == "RELEASE"
  81. gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x0
  82. gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x03
  83. !else
  84. gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x2F
  85. gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x07
  86. !endif
  87. !if $(TARGET) == RELEASE
  88. gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseSerial|FALSE
  89. !else
  90. gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseSerial|TRUE
  91. !endif
  92. gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x07
  93. gEfiMdeModulePkgTokenSpaceGuid.PcdLoadModuleAtFixAddressEnable|0
  94. gEfiMdeModulePkgTokenSpaceGuid.PcdHwErrStorageSize|0x0
  95. #S3 modified
  96. gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x10000
  97. gEfiMdeModulePkgTokenSpaceGuid.PcdShadowPeimOnS3Boot|TRUE
  98. #S3 modified
  99. gEfiMdeModulePkgTokenSpaceGuid.PcdHwErrStorageSize|0x0
  100. gEfiMdePkgTokenSpaceGuid.PcdPerformanceLibraryPropertyMask|0x0
  101. gEfiMdePkgTokenSpaceGuid.PcdFSBClock|133333333
  102. gEfiMdeModulePkgTokenSpaceGuid.PcdPeiCoreMaxPeiStackSize|0x100000
  103. gEfiMdeModulePkgTokenSpaceGuid.PcdMaxSizeNonPopulateCapsule|0x1700000
  104. gEfiCpuTokenSpaceGuid.PcdCpuIEDRamSize|0x400000
  105. gEfiCpuTokenSpaceGuid.PcdCpuSmmApSyncTimeout|10000
  106. gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmApSyncTimeout|10000
  107. gEfiCpuTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber|512
  108. gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber|512
  109. gEfiCpuTokenSpaceGuid.PcdPlatformType|2
  110. gEfiCpuTokenSpaceGuid.PcdPlatformCpuMaxCoreFrequency|4000
  111. gEfiCpuTokenSpaceGuid.PcdPlatformCpuMaxFsbFrequency|1066
  112. gEfiCpuTokenSpaceGuid.PcdCpuSmmStackSize|0x10000
  113. gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStackSize|0x10000
  114. ## Specifies delay value in microseconds after sending out an INIT IPI.
  115. # @Prompt Configure delay value after send an INIT IPI
  116. gUefiCpuPkgTokenSpaceGuid.PcdCpuInitIpiDelayInMicroSeconds|10
  117. ## Specifies max supported number of Logical Processors.
  118. # @Prompt Configure max supported number of Logical Processorss
  119. gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber|512
  120. gUefiCpuPkgTokenSpaceGuid.PcdCpuApStackSize|0x1000
  121. !if gMinPlatformPkgTokenSpaceGuid.PcdPerformanceEnable == TRUE
  122. gEfiMdePkgTokenSpaceGuid.PcdPerformanceLibraryPropertyMask|0x1
  123. !endif
  124. gPlatformTokenSpaceGuid.PcdBusStack|0x06
  125. gPlatformTokenSpaceGuid.PcdUboDev|0x08
  126. gPlatformTokenSpaceGuid.PcdUboFunc|0x02
  127. gPlatformTokenSpaceGuid.PcdUboCpuBusNo0|0xCC
  128. gEfiCpuTokenSpaceGuid.PcdCpuIEDEnabled|TRUE
  129. ## Defines the ACPI register set base address.
  130. # The invalid 0xFFFF is as its default value. It must be configured to the real value.
  131. # @Prompt ACPI Timer IO Port Address
  132. gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPortBaseAddress | 0x0500
  133. ## Defines the PCI Bus Number of the PCI device that contains the BAR and Enable for ACPI hardware registers.
  134. # @Prompt ACPI Hardware PCI Bus Number
  135. gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciBusNumber | 0x00
  136. gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemRevision|0x00000002
  137. gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultCreatorId|0x4C544E49
  138. gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultCreatorRevision|0x20091013
  139. ## Defines the PCI Device Number of the PCI device that contains the BAR and Enable for ACPI hardware registers.
  140. # The invalid 0xFF is as its default value. It must be configured to the real value.
  141. # @Prompt ACPI Hardware PCI Device Number
  142. gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciDeviceNumber | 0x1F
  143. ## Defines the PCI Function Number of the PCI device that contains the BAR and Enable for ACPI hardware registers.
  144. # The invalid 0xFF is as its default value. It must be configured to the real value.
  145. # @Prompt ACPI Hardware PCI Function Number
  146. gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciFunctionNumber | 0x02
  147. ## Defines the PCI Register Offset of the PCI device that contains the Enable for ACPI hardware registers.
  148. # The invalid 0xFFFF is as its default value. It must be configured to the real value.
  149. # @Prompt ACPI Hardware PCI Register Offset
  150. gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciEnableRegisterOffset |0x0044
  151. ## Defines the bit mask that must be set to enable the APIC hardware register BAR.
  152. # @Prompt ACPI Hardware PCI Bar Enable BitMask
  153. gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoBarEnableMask | 0x80
  154. ## Defines the PCI Register Offset of the PCI device that contains the BAR for ACPI hardware registers.
  155. # The invalid 0xFFFF is as its default value. It must be configured to the real value.
  156. # @Prompt ACPI Hardware PCI Bar Register Offset
  157. gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciBarRegisterOffset |0x0040
  158. ## Defines the offset to the 32-bit Timer Value register that resides within the ACPI BAR.
  159. # @Prompt Offset to 32-bit Timer register in ACPI BAR
  160. gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiPm1TmrOffset |0x0008
  161. ## Defines the bit mask to retrieve ACPI IO Port Base Address
  162. # @Prompt ACPI IO Port Base Address Mask
  163. gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPortBaseAddressMask |0xFFFC
  164. # Indicates the max nested level
  165. gEfiCpRcPkgTokenSpaceGuid.PcdMaxNestedLevel|0x00000010
  166. gEfiCpRcPkgTokenSpaceGuid.PcdMaxCpuSocketCount|$(MAX_SOCKET)
  167. gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuSocketCount|$(MAX_SOCKET)
  168. gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuCoreCount|28
  169. gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationChange|FALSE
  170. gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiAcpiReclaimMemorySize|0x70
  171. gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiAcpiNvsMemorySize|0x80
  172. gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiReservedMemorySize|0x1470
  173. gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiRtDataMemorySize|0xA0
  174. gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiRtCodeMemorySize|0x80
  175. #
  176. # The PCDs are used to control the Windows SMM Security Mitigations Table - Protection Flags
  177. #
  178. # BIT0: If set, expresses that for all synchronous SMM entries,SMM will validate that input and output buffers lie entirely within the expected fixed memory regions.
  179. # BIT1: If set, expresses that for all synchronous SMM entries, SMM will validate that input and output pointers embedded within the fixed communication buffer only refer to address ranges \
  180. # that lie entirely within the expected fixed memory regions.
  181. # BIT2: Firmware setting this bit is an indication that it will not allow reconfiguration of system resources via non-architectural mechanisms.
  182. # BIT3-31: Reserved
  183. #
  184. gMinPlatformPkgTokenSpaceGuid.PcdWsmtProtectionFlags|0x07
  185. [PcdsFixedAtBuild.X64]
  186. gPcAtChipsetPkgTokenSpaceGuid.PcdMinimalValidYear|2015
  187. gPcAtChipsetPkgTokenSpaceGuid.PcdMaximalValidYear|2099
  188. # Change PcdBootManagerMenuFile to UiApp
  189. ##
  190. gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x21, 0xaa, 0x2c, 0x46, 0x14, 0x76, 0x03, 0x45, 0x83, 0x6e, 0x8a, 0xb6, 0xf4, 0x66, 0x23, 0x31 }
  191. gEfiCpuTokenSpaceGuid.PcdCpuSmmCodeAccessCheckEnable |TRUE
  192. gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmCodeAccessCheckEnable |TRUE
  193. gMinPlatformPkgTokenSpaceGuid.PcdAcpiEnableSwSmi|0xA0
  194. gMinPlatformPkgTokenSpaceGuid.PcdAcpiDisableSwSmi|0xA1
  195. gMinPlatformPkgTokenSpaceGuid.PcdLocalApicAddress|0xFEE00000
  196. gMinPlatformPkgTokenSpaceGuid.PcdIoApicAddress|0xFEC00000
  197. gMinPlatformPkgTokenSpaceGuid.PcdIoApicId|0x08
  198. gMinPlatformPkgTokenSpaceGuid.PcdPcIoApicCount|32
  199. gMinPlatformPkgTokenSpaceGuid.PcdPcIoApicIdBase|0x09
  200. gMinPlatformPkgTokenSpaceGuid.PcdPcIoApicAddressBase|0xFEC01000
  201. gMinPlatformPkgTokenSpaceGuid.PcdPcIoApicInterruptBase|24
  202. gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1AEventBlockAddress|0x500
  203. gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1BEventBlockAddress|0
  204. gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1AControlBlockAddress|0x504
  205. gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1BControlBlockAddress|0
  206. gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm2ControlBlockAddress|0x550
  207. gMinPlatformPkgTokenSpaceGuid.PcdAcpiPmTimerBlockAddress|0x508
  208. gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe0BlockAddress|0x580
  209. gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe1BlockAddress|0
  210. [PcdsPatchableInModule.common]
  211. gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x80000042
  212. gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0x80000000
  213. gMinPlatformPkgTokenSpaceGuid.PcdPciExpressRegionLength|0x10000000
  214. gPcAtChipsetPkgTokenSpaceGuid.PcdHpetBaseAddress|0xFED00000
  215. gMinPlatformPkgTokenSpaceGuid.PcdPciReservedIobase |0x1000
  216. gMinPlatformPkgTokenSpaceGuid.PcdPciReservedIoLimit |0xFFFF
  217. gMinPlatformPkgTokenSpaceGuid.PcdPciReservedMemBase |0x90000000
  218. gMinPlatformPkgTokenSpaceGuid.PcdPciReservedMemLimit |0xFBFFFFFF
  219. gMinPlatformPkgTokenSpaceGuid.PcdPciReservedMemAbove4GBBase |0x380000000000
  220. gMinPlatformPkgTokenSpaceGuid.PcdPciReservedMemAbove4GBLimit |0x3803FFFFFFFF
  221. gEfiMdeModulePkgTokenSpaceGuid.PcdVideoHorizontalResolution|800
  222. gEfiMdeModulePkgTokenSpaceGuid.PcdVideoVerticalResolution|600
  223. gEfiCpuTokenSpaceGuid.PcdCpuSmmUseDelayIndication|FALSE
  224. gEfiCpuTokenSpaceGuid.PcdCpuSmmUseBlockIndication|FALSE
  225. gEfiCpuTokenSpaceGuid.PcdCpuSmmUseSmmEnableIndication|FALSE
  226. gEfiMdeModulePkgTokenSpaceGuid.PcdUse1GPageTable|TRUE
  227. gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress|0xFF800000
  228. gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize|0x01400000
  229. [PcdsDynamicExDefault.common.DEFAULT]
  230. gEfiCpuTokenSpaceGuid.PcdCpuProcessorFeatureUserConfiguration|0x002CF6CF
  231. gEfiCpuTokenSpaceGuid.PcdCpuProcessorFeatureUserConfigurationEx1|0
  232. gUefiCpuPkgTokenSpaceGuid.PcdCpuApInitTimeOutInMicroSeconds|30000
  233. gEfiCpuTokenSpaceGuid.PcdCpuApInitTimeOutInMicroSeconds|200000
  234. gEfiMdeModulePkgTokenSpaceGuid.PcdAriSupport|TRUE
  235. gUefiCpuPkgTokenSpaceGuid.PcdCpuS3DataAddress|0
  236. gEfiPchTokenSpaceGuid.PcdWakeOnRTCS5|FALSE
  237. gEfiPchTokenSpaceGuid.PcdRtcWakeupTimeHour|0
  238. gEfiPchTokenSpaceGuid.PcdRtcWakeupTimeMinute|0
  239. gEfiPchTokenSpaceGuid.PcdRtcWakeupTimeSecond|0
  240. gOemSkuTokenSpaceGuid.PcdOemSkuUplinkPortIndex|0x5
  241. [PcdsDynamicExHii.common.DEFAULT]
  242. !if gPlatformTokenSpaceGuid.PcdFastBoot == FALSE
  243. gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|L"Timeout"|gEfiGlobalVariableGuid|0x0|3 # Variable: L"Timeout"
  244. !else
  245. gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|L"Timeout"|gEfiGlobalVariableGuid|0x0|0 # Variable: L"Timeout"
  246. !endif
  247. gEfiMdePkgTokenSpaceGuid.PcdHardwareErrorRecordLevel|L"HwErrRecSupport"|gEfiGlobalVariableGuid|0x0|1 # Variable: L"HwErrRecSupport"
  248. [PcdsDynamicExDefault]
  249. gOemSkuTokenSpaceGuid.PcdForceTo1SConfigMode|FALSE
  250. ## *** PURLEY_PPO *** - Added in 8th segment in PcdPcieMmcfgTablePtr to fix size assert in PcieAddressLib.c
  251. ## | MMCFG Table Header | Segment 0 | Segment 1 | Segment 2 | Segment 3 | Segment 4 | Segment 5 | Segment 6 | Segment 7 | Segment 8
  252. gEfiCpRcPkgTokenSpaceGuid.PcdPcieMmcfgTablePtr|{0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}
  253. gEfiCpuTokenSpaceGuid.PcdCpuEnergyPolicy|0
  254. gEfiCpuTokenSpaceGuid.PcdCpuAcpiLvl2Addr|0
  255. gEfiCpuTokenSpaceGuid.PcdCpuPackageCStateLimit|0
  256. gEfiCpuTokenSpaceGuid.PcdCpuCoreCStateValue|0
  257. gEfiCpuTokenSpaceGuid.PcdCpuClockModulationDutyCycle|0
  258. gEfiCpuTokenSpaceGuid.PcdCpuHwCoordination|TRUE
  259. gEfiCpuTokenSpaceGuid.PcdCpuDcuMode|0
  260. gEfiCpuTokenSpaceGuid.PcdCpuTurboOverride|0x0
  261. gEfiCpuTokenSpaceGuid.PcdCpuProcessorMsrLockCtrl|0
  262. gEfiCpuTokenSpaceGuid.PcdCpuIioLlcWaysBitMask|0x0
  263. gEfiCpuTokenSpaceGuid.PcdCpuExpandedIioLlcWaysBitMask|0x0
  264. gEfiCpuTokenSpaceGuid.PcdCpuRemoteWaysBitMask|0x0
  265. gEfiCpuTokenSpaceGuid.PcdPchTraceHubEn|0x0
  266. gEfiCpuTokenSpaceGuid.PcdCpuQlruCfgBitMask|0x0
  267. gEfiCpuTokenSpaceGuid.PcdSbspSelection|0xFF
  268. # gEfiCpuTokenSpaceGuid.PcdCpuSocketId|{0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x1,0x0,0x0,0x0,0x1,0x0,0x0,0x0,0x2,0x0,0x0,0x0,0x2,0x0,0x0,0x0,0x3,0x0,0x0,0x0,0x3,0x0,0x0,0x0}
  269. gEfiCpuTokenSpaceGuid.PcdCpuPmStructAddr|0x0
  270. gEfiCpuTokenSpaceGuid.PcdCpuRRQCountThreshold|0x0
  271. gEfiMdeModulePkgTokenSpaceGuid.PcdSrIovSupport|TRUE
  272. gEfiMdeModulePkgTokenSpaceGuid.PcdAriSupport|TRUE
  273. gEfiMdeModulePkgTokenSpaceGuid.PcdMrIovSupport|FALSE
  274. gEfiMdeModulePkgTokenSpaceGuid.PcdSrIovSystemPageSize|0x1F
  275. gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L""|VOID*|36
  276. gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemId|{0x49, 0x4E, 0x54, 0x45, 0x4C, 0x20}
  277. gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemTableId|0x2046573030363253
  278. gMinPlatformPkgTokenSpaceGuid.PcdPcIoApicEnable|0x0
  279. gMinPlatformPkgTokenSpaceGuid.PcdFadtPreferredPmProfile|0x04
  280. gMinPlatformPkgTokenSpaceGuid.PcdFadtIaPcBootArch|0x0000
  281. gMinPlatformPkgTokenSpaceGuid.PcdFadtFlags|0x000004A5
  282. [PcdsDynamicExDefault.X64]
  283. gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate|115200
  284. gEfiMdePkgTokenSpaceGuid.PcdUartDefaultDataBits|8
  285. gEfiMdePkgTokenSpaceGuid.PcdUartDefaultParity|1
  286. gEfiMdePkgTokenSpaceGuid.PcdUartDefaultStopBits|1
  287. gEfiMdePkgTokenSpaceGuid.PcdDefaultTerminalType|0
  288. gEfiMdeModulePkgTokenSpaceGuid.PcdConOutRow|31
  289. gEfiMdeModulePkgTokenSpaceGuid.PcdConOutColumn|100
  290. gEfiMdeModulePkgTokenSpaceGuid.PcdSetupVideoHorizontalResolution|800
  291. gEfiMdeModulePkgTokenSpaceGuid.PcdSetupVideoVerticalResolution|600
  292. gUefiCpuPkgTokenSpaceGuid.PcdCpuHotPlugDataAddress|0