SimicsPlatforms.h 1.4 KB

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  1. /** @file
  2. Simics Platform definitions
  3. Copyright (C) 2015, Red Hat, Inc.
  4. Copyright (c) 2014, Gabriel L. Somlo <somlo@cmu.edu>
  5. Copyright (c) 2019, Intel Corporation. All rights reserved.<BR>
  6. SPDX-License-Identifier: BSD-2-Clause-Patent
  7. **/
  8. #ifndef __SIMICS_PLATFORMS_H__
  9. #define __SIMICS_PLATFORMS_H__
  10. #include <Library/PciLib.h>
  11. #include <IndustryStandard/Pci22.h>
  12. #include <Register/X58Ich10.h>
  13. #include <IndustryStandard/I440FxPiix4.h>
  14. //
  15. // Simics Host Bridge DID Address
  16. //
  17. #define SIMICS_HOSTBRIDGE_DID \
  18. PCI_LIB_ADDRESS (0, 0, 0, PCI_DEVICE_ID_OFFSET)
  19. //
  20. // Simics SideBand PCI device registers
  21. //
  22. #define SIMICS_SIDEBANDPCI_DEV 0
  23. #define SIMICS_SIDEBANDPCI_FUNC 7
  24. #define SIMICS_SIDEBANDPCI_SVID \
  25. PCI_LIB_ADDRESS (0, 0, 7, PCI_SVID_OFFSET)
  26. #define SIMICS_SIDEBANDPCI_SDID \
  27. PCI_LIB_ADDRESS (0, 0, 7, PCI_SID_OFFSET)
  28. #define SIMICS_SIDEBANDPCI_CAP \
  29. PCI_LIB_ADDRESS (0, 0, 7, PCI_CAPBILITY_POINTER_OFFSET)
  30. #define SIMICS_SIDEBANDPCI_CAP_Offset 0x40
  31. #define SIMICS_SIDEBANDPCI_CAP_ID 0xFF
  32. //
  33. // Values we program into the PM base address registers
  34. //
  35. #define PIIX4_PMBA_VALUE 0xB000
  36. #define ICH10_PMBASE_VALUE 0x0400
  37. //
  38. // Common bits in same-purpose registers
  39. //
  40. #define PMBA_RTE BIT0
  41. //
  42. // Common IO ports relative to the Power Management Base Address
  43. //
  44. #define ACPI_TIMER_OFFSET 0x8
  45. #endif