CpuDxe.c 13 KB

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  1. /** @file
  2. CPU DXE Module to produce CPU ARCH Protocol
  3. Copyright (c) 2022 Loongson Technology Corporation Limited. All rights reserved.<BR>
  4. SPDX-License-Identifier: BSD-2-Clause-Patent
  5. **/
  6. #include <Guid/IdleLoopEvent.h>
  7. #include <Uefi.h>
  8. #include <Library/CacheMaintenanceLib.h>
  9. #include <Library/UefiBootServicesTableLib.h>
  10. #include <Library/CpuLib.h>
  11. #include <Library/DebugLib.h>
  12. #include <Library/BaseLib.h>
  13. #include <Library/MmuLib.h>
  14. #include "CpuDxe.h"
  15. BOOLEAN mInterruptState = FALSE;
  16. /*
  17. This function flushes the range of addresses from Start to Start+Length
  18. from the processor's data cache. If Start is not aligned to a cache line
  19. boundary, then the bytes before Start to the preceding cache line boundary
  20. are also flushed. If Start+Length is not aligned to a cache line boundary,
  21. then the bytes past Start+Length to the end of the next cache line boundary
  22. are also flushed. The FlushType of EfiCpuFlushTypeWriteBackInvalidate must be
  23. supported. If the data cache is fully coherent with all DMA operations, then
  24. this function can just return EFI_SUCCESS. If the processor does not support
  25. flushing a range of the data cache, then the entire data cache can be flushed.
  26. @param This The EFI_CPU_ARCH_PROTOCOL instance.
  27. @param Start The beginning physical address to flush from the processor's data
  28. cache.
  29. @param Length The number of bytes to flush from the processor's data cache. This
  30. function may flush more bytes than Length specifies depending upon
  31. the granularity of the flush operation that the processor supports.
  32. @param FlushType Specifies the type of flush operation to perform.
  33. @retval EFI_SUCCESS The address range from Start to Start+Length was flushed from
  34. the processor's data cache.
  35. @retval EFI_UNSUPPORTEDT The processor does not support the cache flush type specified
  36. by FlushType.
  37. @retval EFI_DEVICE_ERROR The address range from Start to Start+Length could not be flushed
  38. from the processor's data cache.
  39. **/
  40. EFI_STATUS
  41. EFIAPI
  42. CpuFlushCpuDataCache (
  43. IN EFI_CPU_ARCH_PROTOCOL *This,
  44. IN EFI_PHYSICAL_ADDRESS Start,
  45. IN UINT64 Length,
  46. IN EFI_CPU_FLUSH_TYPE FlushType
  47. )
  48. {
  49. switch (FlushType) {
  50. case EfiCpuFlushTypeWriteBack:
  51. WriteBackDataCacheRange ((VOID *) (UINTN)Start, (UINTN)Length);
  52. break;
  53. case EfiCpuFlushTypeInvalidate:
  54. InvalidateDataCacheRange ((VOID *) (UINTN)Start, (UINTN)Length);
  55. break;
  56. case EfiCpuFlushTypeWriteBackInvalidate:
  57. WriteBackInvalidateDataCacheRange ((VOID *) (UINTN)Start, (UINTN)Length);
  58. break;
  59. default:
  60. return EFI_INVALID_PARAMETER;
  61. }
  62. return EFI_SUCCESS;
  63. }
  64. /**
  65. This function enables interrupt processing by the processor.
  66. @param This The EFI_CPU_ARCH_PROTOCOL instance.
  67. @retval EFI_SUCCESS Interrupts are enabled on the processor.
  68. @retval EFI_DEVICE_ERROR Interrupts could not be enabled on the processor.
  69. **/
  70. EFI_STATUS
  71. EFIAPI
  72. CpuEnableInterrupt (
  73. IN EFI_CPU_ARCH_PROTOCOL *This
  74. )
  75. {
  76. EnableInterrupts ();
  77. mInterruptState = TRUE;
  78. return EFI_SUCCESS;
  79. }
  80. /**
  81. This function disables interrupt processing by the processor.
  82. @param This The EFI_CPU_ARCH_PROTOCOL instance.
  83. @retval EFI_SUCCESS Interrupts are disabled on the processor.
  84. @retval EFI_DEVICE_ERROR Interrupts could not be disabled on the processor.
  85. **/
  86. EFI_STATUS
  87. EFIAPI
  88. CpuDisableInterrupt (
  89. IN EFI_CPU_ARCH_PROTOCOL *This
  90. )
  91. {
  92. DisableInterrupts ();
  93. mInterruptState = FALSE;
  94. return EFI_SUCCESS;
  95. }
  96. /**
  97. This function retrieves the processor's current interrupt state a returns it in
  98. State. If interrupts are currently enabled, then TRUE is returned. If interrupts
  99. are currently disabled, then FALSE is returned.
  100. @param This The EFI_CPU_ARCH_PROTOCOL instance.
  101. @param State A pointer to the processor's current interrupt state. Set to TRUE if
  102. interrupts are enabled and FALSE if interrupts are disabled.
  103. @retval EFI_SUCCESS The processor's current interrupt state was returned in State.
  104. @retval EFI_INVALID_PARAMETER State is NULL.
  105. **/
  106. EFI_STATUS
  107. EFIAPI
  108. CpuGetInterruptState (
  109. IN EFI_CPU_ARCH_PROTOCOL *This,
  110. OUT BOOLEAN *State
  111. )
  112. {
  113. if (State == NULL) {
  114. return EFI_INVALID_PARAMETER;
  115. }
  116. *State = mInterruptState;
  117. return EFI_SUCCESS;
  118. }
  119. /**
  120. This function generates an INIT on the processor. If this function succeeds, then the
  121. processor will be reset, and control will not be returned to the caller. If InitType is
  122. not supported by this processor, or the processor cannot programmatically generate an
  123. INIT without help from external hardware, then EFI_UNSUPPORTED is returned. If an error
  124. occurs attempting to generate an INIT, then EFI_DEVICE_ERROR is returned.
  125. @param This The EFI_CPU_ARCH_PROTOCOL instance.
  126. @param InitType The type of processor INIT to perform.
  127. @retval EFI_SUCCESS The processor INIT was performed. This return code should never be seen.
  128. @retval EFI_UNSUPPORTED The processor INIT operation specified by InitType is not supported
  129. by this processor.
  130. @retval EFI_DEVICE_ERROR The processor INIT failed.
  131. **/
  132. EFI_STATUS
  133. EFIAPI
  134. CpuInit (
  135. IN EFI_CPU_ARCH_PROTOCOL *This,
  136. IN EFI_CPU_INIT_TYPE InitType
  137. )
  138. {
  139. return EFI_UNSUPPORTED;
  140. }
  141. /**
  142. This function registers and enables the handler specified by InterruptHandler for a processor
  143. interrupt or exception type specified by InterruptType. If InterruptHandler is NULL, then the
  144. handler for the processor interrupt or exception type specified by InterruptType is uninstalled.
  145. The installed handler is called once for each processor interrupt or exception.
  146. @param InterruptType Interrupt Type.
  147. @param InterruptHandler A pointer to a function of type EFI_CPU_INTERRUPT_HANDLER that is called
  148. when a processor interrupt occurs. If this parameter is NULL, then the handler
  149. will be uninstalled.
  150. @retval EFI_SUCCESS The handler for the processor interrupt was successfully installed or uninstalled.
  151. @retval EFI_ALREADY_STARTED InterruptHandler is not NULL, and a handler for InterruptType was
  152. previously installed.
  153. @retval EFI_INVALID_PARAMETER InterruptHandler is NULL, and a handler for InterruptType was not
  154. previously installed.
  155. @retval EFI_UNSUPPORTED The interrupt specified by InterruptType is not supported.
  156. **/
  157. EFI_STATUS
  158. EFIAPI
  159. CpuRegisterInterruptHandler (
  160. IN EFI_CPU_ARCH_PROTOCOL *This,
  161. IN EFI_EXCEPTION_TYPE InterruptType,
  162. IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler
  163. )
  164. {
  165. return RegisterInterruptHandler (InterruptType, InterruptHandler);
  166. }
  167. /**
  168. Returns a timer value from one of the CPU's internal timers. There is no
  169. inherent time interval between ticks but is a function of the CPU frequency.
  170. @param This - Protocol instance structure.
  171. @param TimerIndex - Specifies which CPU timer is requested.
  172. @param TimerValue - Pointer to the returned timer value.
  173. @param TimerPeriod - A pointer to the amount of time that passes
  174. in femtoseconds (10-15) for each increment
  175. of TimerValue. If TimerValue does not
  176. increment at a predictable rate, then 0 is
  177. returned. The amount of time that has
  178. passed between two calls to GetTimerValue()
  179. can be calculated with the formula
  180. (TimerValue2 - TimerValue1) * TimerPeriod.
  181. This parameter is optional and may be NULL.
  182. @retval EFI_SUCCESS - If the CPU timer count was returned.
  183. @retval EFI_UNSUPPORTED - If the CPU does not have any readable timers.
  184. @retval EFI_DEVICE_ERROR - If an error occurred while reading the timer.
  185. @retval EFI_INVALID_PARAMETER - TimerIndex is not valid or TimerValue is NULL.
  186. **/
  187. EFI_STATUS
  188. EFIAPI
  189. CpuGetTimerValue (
  190. IN EFI_CPU_ARCH_PROTOCOL *This,
  191. IN UINT32 TimerIndex,
  192. OUT UINT64 *TimerValue,
  193. OUT UINT64 *TimerPeriod OPTIONAL
  194. )
  195. {
  196. return EFI_UNSUPPORTED;
  197. }
  198. /**
  199. This function modifies the attributes for the memory region specified by BaseAddress and
  200. Length from their current attributes to the attributes specified by Attributes.
  201. @param This The EFI_CPU_ARCH_PROTOCOL instance.
  202. @param BaseAddress The physical address that is the start address of a memory region.
  203. @param Length The size in bytes of the memory region.
  204. @param Attributes The bit mask of attributes to set for the memory region.
  205. @retval EFI_SUCCESS The attributes were set for the memory region.
  206. @retval EFI_ACCESS_DENIED The attributes for the memory resource range specified by
  207. BaseAddress and Length cannot be modified.
  208. @retval EFI_INVALID_PARAMETER Length is zero.
  209. @retval EFI_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of
  210. the memory resource range.
  211. @retval EFI_UNSUPPORTED The processor does not support one or more bytes of the memory
  212. resource range specified by BaseAddress and Length.
  213. The bit mask of attributes is not support for the memory resource
  214. range specified by BaseAddress and Length.
  215. **/
  216. EFI_STATUS
  217. EFIAPI
  218. CpuSetMemoryAttributes (
  219. IN EFI_CPU_ARCH_PROTOCOL *This,
  220. IN EFI_PHYSICAL_ADDRESS BaseAddress,
  221. IN UINT64 Length,
  222. IN UINT64 EfiAttributes
  223. )
  224. {
  225. EFI_STATUS Status;
  226. UINTN LoongArchAttributes;
  227. UINTN RegionBaseAddress;
  228. UINTN RegionLength;
  229. UINTN RegionLoongArchAttributes;
  230. if ((BaseAddress & (SIZE_4KB - 1)) != 0) {
  231. // Minimum granularity is SIZE_4KB (4KB on ARM)
  232. DEBUG ((DEBUG_PAGE, "CpuSetMemoryAttributes(%lx, %lx, %lx): Minimum granularity is SIZE_4KB\n",
  233. BaseAddress,
  234. Length,
  235. EfiAttributes));
  236. return EFI_UNSUPPORTED;
  237. }
  238. // Convert the 'Attribute' into LoongArch Attribute
  239. LoongArchAttributes = EfiAttributeToLoongArchAttribute (EfiAttributes);
  240. // Get the region starting from 'BaseAddress' and its 'Attribute'
  241. RegionBaseAddress = BaseAddress;
  242. Status = GetLoongArchMemoryRegion (RegionBaseAddress, BaseAddress + Length,
  243. &RegionLength, &RegionLoongArchAttributes);
  244. LoongArchSetMemoryAttributes (BaseAddress, Length, EfiAttributes);
  245. // Data & Instruction Caches are flushed when we set new memory attributes.
  246. // So, we only set the attributes if the new region is different.
  247. if (EFI_ERROR (Status) || (RegionLoongArchAttributes != LoongArchAttributes) ||
  248. ((BaseAddress + Length) > (RegionBaseAddress + RegionLength)))
  249. {
  250. return LoongArchSetMemoryAttributes (BaseAddress, Length, EfiAttributes);
  251. }
  252. return EFI_SUCCESS;
  253. }
  254. /**
  255. Callback function for idle events.
  256. @param Event Event whose notification function is being invoked.
  257. @param Context The pointer to the notification function's context,
  258. which is implementation-dependent.
  259. @param VOID
  260. **/
  261. VOID
  262. EFIAPI
  263. IdleLoopEventCallback (
  264. IN EFI_EVENT Event,
  265. IN VOID *Context
  266. )
  267. {
  268. CpuSleep ();
  269. }
  270. //
  271. // Globals used to initialize the protocol
  272. //
  273. EFI_HANDLE CpuHandle = NULL;
  274. EFI_CPU_ARCH_PROTOCOL Cpu = {
  275. CpuFlushCpuDataCache,
  276. CpuEnableInterrupt,
  277. CpuDisableInterrupt,
  278. CpuGetInterruptState,
  279. CpuInit,
  280. CpuRegisterInterruptHandler,
  281. CpuGetTimerValue,
  282. CpuSetMemoryAttributes,
  283. 0, // NumberOfTimers
  284. 4, // DmaBufferAlignment
  285. };
  286. /**
  287. Initialize the state information for the CPU Architectural Protocol.
  288. @param ImageHandle Image handle this driver.
  289. @param SystemTable Pointer to the System Table.
  290. @retval EFI_SUCCESS Thread can be successfully created
  291. @retval EFI_OUT_OF_RESOURCES Cannot allocate protocol data structure
  292. @retval EFI_DEVICE_ERROR Cannot create the thread
  293. **/
  294. EFI_STATUS
  295. CpuDxeInitialize (
  296. IN EFI_HANDLE ImageHandle,
  297. IN EFI_SYSTEM_TABLE *SystemTable
  298. )
  299. {
  300. EFI_STATUS Status;
  301. EFI_EVENT IdleLoopEvent;
  302. InitializeExceptions (&Cpu);
  303. Status = gBS->InstallMultipleProtocolInterfaces (
  304. &CpuHandle,
  305. &gEfiCpuArchProtocolGuid, &Cpu,
  306. NULL
  307. );
  308. //
  309. // Setup a callback for idle events
  310. //
  311. Status = gBS->CreateEventEx (
  312. EVT_NOTIFY_SIGNAL,
  313. TPL_NOTIFY,
  314. IdleLoopEventCallback,
  315. NULL,
  316. &gIdleLoopEventGuid,
  317. &IdleLoopEvent
  318. );
  319. ASSERT_EFI_ERROR (Status);
  320. return Status;
  321. }