styx-overdrive1000.dts 11 KB

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  1. /*
  2. * DTS file for SoftIron Overdrive 1000, based on AMD Seattle (Rev.B1)
  3. *
  4. * Copyright 2015 - 2016 ADVANCED MICRO DEVICES, INC. All Rights Reserved.
  5. *
  6. * This program and the accompanying materials are licensed and made available
  7. * under the terms and conditions of the BSD License which accompanies this
  8. * distribution. The full text of the license may be found at
  9. * http://opensource.org/licenses/bsd-license.php
  10. *
  11. * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  12. * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR
  13. * IMPLIED.
  14. *
  15. */
  16. /dts-v1/;
  17. / {
  18. model = "SoftIron Overdrive 1000 (AMD Seattle (Rev.B1))";
  19. compatible = "amd,seattle-overdrive", "amd,seattle";
  20. interrupt-parent = <0x1>;
  21. #address-cells = <0x2>;
  22. #size-cells = <0x2>;
  23. interrupt-controller@e1101000 {
  24. compatible = "arm,gic-400", "arm,cortex-a15-gic";
  25. interrupt-controller;
  26. #interrupt-cells = <0x3>;
  27. #address-cells = <0x2>;
  28. #size-cells = <0x2>;
  29. reg = <0x0 0xe1110000 0x0 0x1000>,
  30. <0x0 0xe112f000 0x0 0x2000>,
  31. <0x0 0xe1140000 0x0 0x10000>,
  32. <0x0 0xe1160000 0x0 0x10000>;
  33. interrupts = <0x1 0x9 0xf04>;
  34. ranges = <0x0 0x0 0x0 0xe1100000 0x0 0x100000>;
  35. linux,phandle = <0x1>;
  36. phandle = <0x1>;
  37. v2m@e0080000 {
  38. compatible = "arm,gic-v2m-frame";
  39. msi-controller;
  40. reg = <0x0 0x80000 0x0 0x1000>;
  41. linux,phandle = <0x4>;
  42. phandle = <0x4>;
  43. };
  44. };
  45. timer {
  46. compatible = "arm,armv8-timer";
  47. interrupts = <0x1 0xd 0xff04>,
  48. <0x1 0xe 0xff04>,
  49. <0x1 0xb 0xff04>,
  50. <0x1 0xa 0xff04>;
  51. };
  52. smb {
  53. compatible = "simple-bus";
  54. #address-cells = <0x2>;
  55. #size-cells = <0x2>;
  56. ranges;
  57. /*
  58. * dma-ranges is 40-bit address space containing:
  59. * - GICv2m MSI register is at 0xe0080000
  60. * - DRAM range [0x8000000000 to 0xffffffffff]
  61. */
  62. dma-ranges = <0x0 0x0 0x0 0x0 0x100 0x0>;
  63. clk100mhz_0 {
  64. compatible = "fixed-clock";
  65. #clock-cells = <0x0>;
  66. clock-frequency = <100000000>;
  67. clock-output-names = "adl3clk_100mhz";
  68. };
  69. clk375mhz {
  70. compatible = "fixed-clock";
  71. #clock-cells = <0x0>;
  72. clock-frequency = <375000000>;
  73. clock-output-names = "ccpclk_375mhz";
  74. };
  75. clk333mhz {
  76. compatible = "fixed-clock";
  77. #clock-cells = <0x0>;
  78. clock-frequency = <333000000>;
  79. clock-output-names = "sataclk_333mhz";
  80. linux,phandle = <0x2>;
  81. phandle = <0x2>;
  82. };
  83. clk500mhz_0 {
  84. compatible = "fixed-clock";
  85. #clock-cells = <0x0>;
  86. clock-frequency = <500000000>;
  87. clock-output-names = "pcieclk_500mhz";
  88. };
  89. clk500mhz_1 {
  90. compatible = "fixed-clock";
  91. #clock-cells = <0x0>;
  92. clock-frequency = <500000000>;
  93. clock-output-names = "dmaclk_500mhz";
  94. };
  95. clk250mhz_4 {
  96. compatible = "fixed-clock";
  97. #clock-cells = <0x0>;
  98. clock-frequency = <250000000>;
  99. clock-output-names = "miscclk_250mhz";
  100. linux,phandle = <0xd>;
  101. phandle = <0xd>;
  102. };
  103. clk100mhz_1 {
  104. compatible = "fixed-clock";
  105. #clock-cells = <0x0>;
  106. clock-frequency = <100000000>;
  107. clock-output-names = "uartspiclk_100mhz";
  108. linux,phandle = <0x3>;
  109. phandle = <0x3>;
  110. };
  111. sata@e0300000 {
  112. compatible = "snps,dwc-ahci";
  113. reg = <0x0 0xe0300000 0x0 0xf0000>;
  114. interrupts = <0x0 0x163 0x4>;
  115. clocks = <0x2>;
  116. dma-coherent;
  117. };
  118. sata@e0d00000 {
  119. status = "disabled";
  120. compatible = "snps,dwc-ahci";
  121. reg = <0x0 0xe0d00000 0x0 0xf0000>;
  122. interrupts = <0x0 0x162 0x4>;
  123. clocks = <0x2>;
  124. dma-coherent;
  125. };
  126. i2c@e1000000 {
  127. compatible = "snps,designware-i2c";
  128. reg = <0x0 0xe1000000 0x0 0x1000>;
  129. interrupts = <0x0 0x165 0x4>;
  130. clocks = <0xd>;
  131. };
  132. i2c@e0050000 {
  133. compatible = "snps,designware-i2c";
  134. reg = <0x0 0xe0050000 0x0 0x1000>;
  135. interrupts = <0x0 0x154 0x4>;
  136. clocks = <0xd>;
  137. };
  138. serial@e1010000 {
  139. compatible = "arm,pl011", "arm,primecell";
  140. reg = <0x0 0xe1010000 0x0 0x1000>;
  141. interrupts = <0x0 0x148 0x4>;
  142. clocks = <0x3 0x3>;
  143. clock-names = "uartclk", "apb_pclk";
  144. };
  145. ssp@e1020000 {
  146. compatible = "arm,pl022", "arm,primecell";
  147. reg = <0x0 0xe1020000 0x0 0x1000>;
  148. spi-controller;
  149. interrupts = <0x0 0x14a 0x4>;
  150. clocks = <0x3>;
  151. clock-names = "apb_pclk";
  152. };
  153. ssp@e1030000 {
  154. compatible = "arm,pl022", "arm,primecell";
  155. reg = <0x0 0xe1030000 0x0 0x1000>;
  156. spi-controller;
  157. interrupts = <0x0 0x149 0x4>;
  158. clocks = <0x3>;
  159. clock-names = "apb_pclk";
  160. num-cs = <0x1>;
  161. #address-cells = <0x1>;
  162. #size-cells = <0x0>;
  163. sdcard@0 {
  164. compatible = "mmc-spi-slot";
  165. reg = <0x0>;
  166. spi-max-frequency = <20000000>;
  167. voltage-ranges = <3200 3400>;
  168. pl022,hierarchy = <0x0>;
  169. pl022,interface = <0x0>;
  170. pl022,com-mode = <0x0>;
  171. pl022,rx-level-trig = <0x0>;
  172. pl022,tx-level-trig = <0x0>;
  173. };
  174. };
  175. gpio@e1050000 { /* [0 : 7] */
  176. compatible = "arm,pl061", "arm,primecell";
  177. #gpio-cells = <0x2>;
  178. reg = <0x0 0xe1050000 0x0 0x1000>;
  179. gpio-controller;
  180. interrupt-controller;
  181. #interrupt-cells = <0x2>;
  182. interrupts = <0x0 0x166 0x4>;
  183. clocks = <0x3>;
  184. clock-names = "apb_pclk";
  185. };
  186. gpio@e0020000 { /* [8 : 15] */
  187. status = "disabled";
  188. compatible = "arm,pl061", "arm,primecell";
  189. #gpio-cells = <0x2>;
  190. reg = <0x0 0xe0020000 0x0 0x1000>;
  191. gpio-controller;
  192. interrupt-controller;
  193. #interrupt-cells = <0x2>;
  194. interrupts = <0x0 0x16e 0x4>;
  195. clocks = <0x3>;
  196. clock-names = "apb_pclk";
  197. };
  198. gpio@e0030000 { /* [16 : 23] */
  199. status = "disabled";
  200. compatible = "arm,pl061", "arm,primecell";
  201. #gpio-cells = <0x2>;
  202. reg = <0x0 0xe0030000 0x0 0x1000>;
  203. gpio-controller;
  204. interrupt-controller;
  205. #interrupt-cells = <0x2>;
  206. interrupts = <0x0 0x16d 0x4>;
  207. clocks = <0x3>;
  208. clock-names = "apb_pclk";
  209. };
  210. gpio@e0080000 { /* [24] */
  211. compatible = "arm,pl061", "arm,primecell";
  212. #gpio-cells = <0x2>;
  213. reg = <0x0 0xe0080000 0x0 0x1000>;
  214. gpio-controller;
  215. interrupt-controller;
  216. #interrupt-cells = <0x2>;
  217. interrupts = <0x0 0x169 0x4>;
  218. clocks = <0x3>;
  219. clock-names = "apb_pclk";
  220. };
  221. ccp: ccp@e0100000 {
  222. compatible = "amd,ccp-seattle-v1a";
  223. reg = <0x0 0xe0100000 0x0 0x10000>;
  224. interrupts = <0x0 0x3 0x4>;
  225. dma-coherent;
  226. amd,zlib-support = <0x1>;
  227. };
  228. pcie: pcie@f0000000 {
  229. compatible = "pci-host-ecam-generic";
  230. #address-cells = <0x3>;
  231. #size-cells = <0x2>;
  232. #interrupt-cells = <0x1>;
  233. device_type = "pci";
  234. bus-range = <0x0 0x7f>;
  235. msi-parent = <0x4>;
  236. reg = <0x0 0xf0000000 0x0 0x10000000>;
  237. interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
  238. interrupt-map = <0x1000 0x0 0x0 0x1 0x1 0x0 0x0 0x0 0x120 0x1>,
  239. <0x1000 0x0 0x0 0x2 0x1 0x0 0x0 0x0 0x121 0x1>,
  240. <0x1000 0x0 0x0 0x3 0x1 0x0 0x0 0x0 0x122 0x1>,
  241. <0x1000 0x0 0x0 0x4 0x1 0x0 0x0 0x0 0x123 0x1>;
  242. dma-coherent;
  243. dma-ranges = <0x43000000 0x0 0x0 0x0 0x0 0x100 0x0>;
  244. ranges = <0x1000000 0x0 0x00000000 0x0 0xefff0000 0x00 0x00010000>, /* I/O Memory (size=64K) */
  245. <0x2000000 0x0 0x40000000 0x0 0x40000000 0x00 0x80000000>, /* 32-bit MMIO (size=2G) */
  246. <0x3000000 0x1 0x00000000 0x1 0x00000000 0x7f 0x00000000>; /* 64-bit MMIO (size= 124G) */
  247. };
  248. ccn@0xe8000000 {
  249. compatible = "arm,ccn-504";
  250. reg = <0x0 0xe8000000 0x0 0x1000000>;
  251. interrupts = <0x0 0x17c 0x4>;
  252. };
  253. gwdt@e0bb0000 {
  254. status = "disabled";
  255. compatible = "arm,sbsa-gwdt";
  256. reg = <0x0 0xe0bb0000 0x0 0x10000
  257. 0x0 0xe0bc0000 0x0 0x10000>;
  258. reg-names = "refresh", "control";
  259. interrupts = <0x0 0x151 0x4>;
  260. interrupt-names = "ws0";
  261. };
  262. kcs@e0010000 {
  263. status = "disabled";
  264. compatible = "ipmi-kcs";
  265. device_type = "ipmi";
  266. reg = <0x0 0xe0010000 0 0x8>;
  267. interrupts = <0 389 4>;
  268. interrupt-names = "ipmi_kcs";
  269. reg-size = <1>;
  270. reg-spacing = <4>;
  271. };
  272. clk250mhz_0 {
  273. compatible = "fixed-clock";
  274. #clock-cells = <0x0>;
  275. clock-frequency = <250000000>;
  276. clock-output-names = "xgmacclk0_dma_250mhz";
  277. linux,phandle = <0x5>;
  278. phandle = <0x5>;
  279. };
  280. clk250mhz_1 {
  281. compatible = "fixed-clock";
  282. #clock-cells = <0x0>;
  283. clock-frequency = <250000000>;
  284. clock-output-names = "xgmacclk0_ptp_250mhz";
  285. linux,phandle = <0x6>;
  286. phandle = <0x6>;
  287. };
  288. clk250mhz_2 {
  289. compatible = "fixed-clock";
  290. #clock-cells = <0x0>;
  291. clock-frequency = <250000000>;
  292. clock-output-names = "xgmacclk1_dma_250mhz";
  293. linux,phandle = <0x7>;
  294. phandle = <0x7>;
  295. };
  296. clk250mhz_3 {
  297. compatible = "fixed-clock";
  298. #clock-cells = <0x0>;
  299. clock-frequency = <250000000>;
  300. clock-output-names = "xgmacclk1_ptp_250mhz";
  301. linux,phandle = <0x8>;
  302. phandle = <0x8>;
  303. };
  304. phy@e1240800 {
  305. status = "disabled";
  306. compatible = "amd,xgbe-phy-seattle-v1a";
  307. reg = <0x0 0xe1240800 0x0 0x0400>, /* SERDES RX/TX0 */
  308. <0x0 0xe1250000 0x0 0x0060>, /* SERDES IR 1/2 */
  309. <0x0 0xe12500f8 0x0 0x0004>; /* SERDES IR 2/2 */
  310. interrupts = <0x0 0x143 0x4>;
  311. amd,speed-set = <0x0>;
  312. amd,serdes-blwc = <0x1 0x1 0x0>;
  313. amd,serdes-cdr-rate = <0x2 0x2 0x7>;
  314. amd,serdes-pq-skew = <0xa 0xa 0x12>;
  315. amd,serdes-tx-amp = <0xf 0xf 0xa>;
  316. amd,serdes-dfe-tap-config = <0x3 0x3 0x1>;
  317. amd,serdes-dfe-tap-enable = <0x0 0x0 0x7f>;
  318. linux,phandle = <0x9>;
  319. phandle = <0x9>;
  320. };
  321. phy@e1240c00 {
  322. status = "disabled";
  323. compatible = "amd,xgbe-phy-seattle-v1a";
  324. reg = <0x0 0xe1240c00 0x0 0x0400>, /* SERDES RX/TX0 */
  325. <0x0 0xe1250080 0x0 0x0060>, /* SERDES IR 1/2 */
  326. <0x0 0xe12500fc 0x0 0x0004>; /* SERDES IR 2/2 */
  327. interrupts = <0x0 0x142 0x4>;
  328. amd,speed-set = <0x0>;
  329. amd,serdes-blwc = <0x1 0x1 0x0>;
  330. amd,serdes-cdr-rate = <0x2 0x2 0x7>;
  331. amd,serdes-pq-skew = <0xa 0xa 0x12>;
  332. amd,serdes-tx-amp = <0xf 0xf 0xa>;
  333. amd,serdes-dfe-tap-config = <0x3 0x3 0x1>;
  334. amd,serdes-dfe-tap-enable = <0x0 0x0 0x7f>;
  335. linux,phandle = <0xa>;
  336. phandle = <0xa>;
  337. };
  338. xgmac@e0700000 {
  339. status = "disabled";
  340. compatible = "amd,xgbe-seattle-v1a";
  341. reg = <0x0 0xe0700000 0x0 0x80000 0x0 0xe0780000 0x0 0x80000>;
  342. interrupts = <0x0 0x145 0x4>,
  343. <0x0 0x15a 0x1>,
  344. <0x0 0x15b 0x1>,
  345. <0x0 0x15c 0x1>,
  346. <0x0 0x15d 0x1>;
  347. amd,per-channel-interrupt;
  348. mac-address = [02 a1 a2 a3 a4 a5];
  349. clocks = <0x5 0x6>;
  350. clock-names = "dma_clk", "ptp_clk";
  351. phy-handle = <0x9>;
  352. phy-mode = "xgmii";
  353. #stream-id-cells = <0x18>;
  354. dma-coherent;
  355. linux,phandle = <0xb>;
  356. phandle = <0xb>;
  357. };
  358. xgmac@e0900000 {
  359. status = "disabled";
  360. compatible = "amd,xgbe-seattle-v1a";
  361. reg = <0x0 0xe0900000 0x0 0x80000 0x0 0xe0980000 0x0 0x80000>;
  362. interrupts = <0x0 0x144 0x4>,
  363. <0x0 0x155 0x1>,
  364. <0x0 0x156 0x1>,
  365. <0x0 0x157 0x1>,
  366. <0x0 0x158 0x1>;
  367. amd,per-channel-interrupt;
  368. mac-address = [02 b1 b2 b3 b4 b5];
  369. clocks = <0x7 0x8>;
  370. clock-names = "dma_clk", "ptp_clk";
  371. phy-handle = <0xa>;
  372. phy-mode = "xgmii";
  373. #stream-id-cells = <0x18>;
  374. dma-coherent;
  375. linux,phandle = <0xc>;
  376. phandle = <0xc>;
  377. };
  378. };
  379. chosen {
  380. stdout-path = "/smb/serial@e1010000";
  381. /* Note:
  382. * Linux support for pci-probe-only DT is not
  383. * stable. Disable this for now and let Linux
  384. * take care of the resource assignment.
  385. */
  386. // linux,pci-probe-only;
  387. };
  388. psci {
  389. compatible = "arm,psci-0.2", "arm,psci";
  390. method = "smc";
  391. };
  392. };