ConfigurationManager.h 5.4 KB

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  1. /** @file
  2. Configuration Manager headers
  3. Copyright 2020 NXP
  4. Copyright 2020 Puresoftware Ltd
  5. SPDX-License-Identifier: BSD-2-Clause-Patent
  6. @par Glossary:
  7. - Cm or CM - Configuration Manager
  8. - Obj or OBJ - Object
  9. **/
  10. #ifndef CONFIGURATION_MANAGER_H
  11. #define CONFIGURATION_MANAGER_H
  12. #include <Platform.h>
  13. /** The configuration manager version
  14. */
  15. #define CONFIGURATION_MANAGER_REVISION CREATE_REVISION (0, 0)
  16. /** The OEM ID
  17. */
  18. #define CFG_MGR_OEM_ID { 'N', 'X', 'P', ' ', ' ', ' ' }
  19. /** A helper macro for populating the GIC CPU information
  20. */
  21. #define GICC_ENTRY( \
  22. CPUInterfaceNumber, \
  23. Mpidr, \
  24. PmuIrq, \
  25. VGicIrq, \
  26. EnergyEfficiency \
  27. ) { \
  28. CPUInterfaceNumber, /* UINT32 CPUInterfaceNumber */ \
  29. CPUInterfaceNumber, /* UINT32 AcpiProcessorUid */ \
  30. EFI_ACPI_6_2_GIC_ENABLED, /* UINT32 Flags */ \
  31. 0, /* UINT32 ParkingProtocolVersion */ \
  32. PmuIrq, /* UINT32 PerformanceInterruptGsiv */ \
  33. 0, /* UINT64 ParkedAddress */ \
  34. GICC_BASE, /* UINT64 PhysicalBaseAddress */ \
  35. GICV_BASE, /* UINT64 GICV */ \
  36. GICH_BASE, /* UINT64 GICH */ \
  37. VGicIrq, /* UINT32 VGICMaintenanceInterrupt */ \
  38. 0, /* UINT64 GICRBaseAddress */ \
  39. Mpidr, /* UINT64 MPIDR */ \
  40. EnergyEfficiency /* UINT8 ProcessorPowerEfficiency */ \
  41. }
  42. /**
  43. @retval EFI_SUCCESS Success.
  44. @retval EFI_INVALID_PARAMETER A parameter is invalid.
  45. @retval EFI_NOT_FOUND The required object information is not found.
  46. **/
  47. typedef EFI_STATUS (*CM_OBJECT_HANDLER_PROC) (
  48. IN CONST EDKII_CONFIGURATION_MANAGER_PROTOCOL * CONST This,
  49. IN CONST CM_OBJECT_ID CmObjectId,
  50. IN CONST CM_OBJECT_TOKEN Token,
  51. IN OUT CM_OBJ_DESCRIPTOR * CONST CmObject
  52. );
  53. /** The number of ACPI tables to install
  54. */
  55. #define PLAT_ACPI_TABLE_COUNT 5
  56. /** A structure describing the platform configuration
  57. manager repository information
  58. */
  59. typedef struct PlatformRepositoryInfo {
  60. /// Configuration Manager Information
  61. CM_STD_OBJ_CONFIGURATION_MANAGER_INFO CmInfo;
  62. /// List of ACPI tables
  63. CM_STD_OBJ_ACPI_TABLE_INFO CmAcpiTableList[PLAT_ACPI_TABLE_COUNT];
  64. /// Boot architecture information
  65. CM_ARM_BOOT_ARCH_INFO BootArchInfo;
  66. /// Power management profile information
  67. CM_ARM_POWER_MANAGEMENT_PROFILE_INFO PmProfileInfo;
  68. /// Generic timer information
  69. CM_ARM_GENERIC_TIMER_INFO GenericTimerInfo;
  70. /// Generic timer block information
  71. CM_ARM_GTBLOCK_INFO GTBlockInfo[PLAT_GTBLOCK_COUNT];
  72. /// Generic timer frame information
  73. CM_ARM_GTBLOCK_TIMER_FRAME_INFO GTBlock0TimerInfo[PLAT_GTFRAME_COUNT];
  74. /// Watchdog information
  75. CM_ARM_GENERIC_WATCHDOG_INFO Watchdog;
  76. /// GIC CPU interface information
  77. CM_ARM_GICC_INFO GicCInfo[PLAT_CPU_COUNT];
  78. /// GIC distributor information
  79. CM_ARM_GICD_INFO GicDInfo;
  80. /// GIC Redistributor information
  81. CM_ARM_GIC_REDIST_INFO GicRedistInfo;
  82. /// GIC ITS information
  83. CM_ARM_GIC_ITS_INFO GicItsInfo;
  84. /// PCI configuration space information
  85. CM_ARM_PCI_CONFIG_SPACE_INFO PciConfigInfo[PLAT_PCI_CONFG_COUNT];
  86. /// Serial port information for serial port console redirection port
  87. CM_ARM_SERIAL_PORT_INFO SpcrSerialPort;
  88. /// Fsl Board Revision
  89. UINT32 FslBoardRevision;
  90. } FSL_PLATFORM_REPOSITORY_INFO;
  91. /*
  92. * GTDT_GTIMER_FLAGS
  93. * IT trigger (Level/Edge- Bit 0) and Polarity (Low/High) Bit 1
  94. * Set bit-0 is 0 (Level trigger), Bit 1 1 (Active low)
  95. */
  96. #define GTDT_GTIMER_FLAGS (EFI_ACPI_6_1_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY)
  97. /*
  98. * Timer Frame IT High Level triggered
  99. * IT trigger (Level/Edge- Bit 0) and Polarity (Low/High) Bit 1
  100. * Set bit-0 is 0 (Level trigger), Bit 1 0 (Active High)
  101. */
  102. #define GTDT_FRAME_FLAGS 0
  103. /*
  104. * Timer frame status
  105. * Access - Secure or non secure <-- Bit 0
  106. * State - Save (meaning always on) or Lose Context <-- Bit 1
  107. * Set Bit 0 1 as Secure and Bit 1 zero as lose context
  108. */
  109. #define GTDT_FRAME_COMMON_FLAGS EFI_ACPI_6_1_GTDT_GT_BLOCK_COMMON_FLAG_SECURE_TIMER
  110. /*
  111. * Watchdog flags
  112. * IT trigger (Level/Edge- Bit 0), Polarity (Low/High) Bit 1, Secured Bit 2
  113. * Set Level trigger (Bit 0 as 0)
  114. * Active High (Bit 1 as 0)
  115. * Non secure (Bit 2 as 0)
  116. */
  117. #define SBSA_WATCHDOG_FLAGS 0
  118. #define SBSA_SEC_WATCHDOG_FLAGS EFI_ACPI_6_1_GTDT_GT_BLOCK_COMMON_FLAG_SECURE_TIMER
  119. #define GT_BLOCK_FRAME_RES_BASE MAX_UINT64
  120. #endif // CONFIGURATION_MANAGER_H