PciHostBridgeLib.c 7.4 KB

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  1. /** @file
  2. * PCI Host Bridge Library instance for ARM Neoverse N1 platform
  3. *
  4. * Copyright (c) 2019 - 2022, ARM Limited. All rights reserved.<BR>
  5. *
  6. * SPDX-License-Identifier: BSD-2-Clause-Patent
  7. *
  8. **/
  9. #include <PiDxe.h>
  10. #include <Library/DebugLib.h>
  11. #include <Library/DevicePathLib.h>
  12. #include <Library/MemoryAllocationLib.h>
  13. #include <Library/PcdLib.h>
  14. #include <Library/PciHostBridgeLib.h>
  15. #include <Protocol/PciHostBridgeResourceAllocation.h>
  16. #include <Protocol/PciRootBridgeIo.h>
  17. #define ROOT_COMPLEX_NUM 2
  18. GLOBAL_REMOVE_IF_UNREFERENCED
  19. STATIC CHAR16 CONST * CONST mPciHostBridgeLibAcpiAddressSpaceTypeStr[] = {
  20. L"Mem", L"I/O", L"Bus"
  21. };
  22. #pragma pack (1)
  23. typedef struct {
  24. ACPI_HID_DEVICE_PATH AcpiDevicePath;
  25. EFI_DEVICE_PATH_PROTOCOL EndDevicePath;
  26. } EFI_PCI_ROOT_BRIDGE_DEVICE_PATH;
  27. #pragma pack ()
  28. STATIC EFI_PCI_ROOT_BRIDGE_DEVICE_PATH mEfiPciRootBridgeDevicePath[ROOT_COMPLEX_NUM] = {
  29. // PCIe
  30. {
  31. {
  32. {
  33. ACPI_DEVICE_PATH,
  34. ACPI_DP,
  35. {
  36. (UINT8)sizeof (ACPI_HID_DEVICE_PATH),
  37. (UINT8)(sizeof (ACPI_HID_DEVICE_PATH) >> 8)
  38. }
  39. },
  40. EISA_PNP_ID (0x0A08), // PCIe
  41. 0
  42. },
  43. {
  44. END_DEVICE_PATH_TYPE,
  45. END_ENTIRE_DEVICE_PATH_SUBTYPE,
  46. {
  47. END_DEVICE_PATH_LENGTH,
  48. 0
  49. }
  50. }
  51. },
  52. //CCIX
  53. {
  54. {
  55. {
  56. ACPI_DEVICE_PATH,
  57. ACPI_DP,
  58. {
  59. (UINT8)sizeof (ACPI_HID_DEVICE_PATH),
  60. (UINT8)(sizeof (ACPI_HID_DEVICE_PATH) >> 8)
  61. }
  62. },
  63. EISA_PNP_ID(0x0A08), // CCIX
  64. 1
  65. },
  66. {
  67. END_DEVICE_PATH_TYPE,
  68. END_ENTIRE_DEVICE_PATH_SUBTYPE,
  69. {
  70. END_DEVICE_PATH_LENGTH,
  71. 0
  72. }
  73. }
  74. },
  75. };
  76. STATIC PCI_ROOT_BRIDGE mPciRootBridge[ROOT_COMPLEX_NUM] = {
  77. {
  78. 0, // Segment
  79. 0, // Supports
  80. 0, // Attributes
  81. TRUE, // DmaAbove4G
  82. FALSE, // NoExtendedConfigSpace
  83. FALSE, // ResourceAssigned
  84. EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM | // AllocationAttributes
  85. EFI_PCI_HOST_BRIDGE_MEM64_DECODE,
  86. {
  87. // Bus
  88. FixedPcdGet32 (PcdPcieBusMin),
  89. FixedPcdGet32 (PcdPcieBusMax)
  90. }, {
  91. // Io
  92. FixedPcdGet64 (PcdPcieIoBase),
  93. FixedPcdGet64 (PcdPcieIoBase) + FixedPcdGet64 (PcdPcieIoSize) - 1
  94. }, {
  95. // Mem
  96. FixedPcdGet32 (PcdPcieMmio32Base),
  97. FixedPcdGet32 (PcdPcieMmio32Base) + FixedPcdGet32 (PcdPcieMmio32Size) - 1
  98. }, {
  99. // MemAbove4G
  100. FixedPcdGet64 (PcdPcieMmio64Base),
  101. FixedPcdGet64 (PcdPcieMmio64Base) + FixedPcdGet64 (PcdPcieMmio64Size) - 1
  102. }, {
  103. // PMem
  104. MAX_UINT64,
  105. 0
  106. }, {
  107. // PMemAbove4G
  108. MAX_UINT64,
  109. 0
  110. },
  111. (EFI_DEVICE_PATH_PROTOCOL *)&mEfiPciRootBridgeDevicePath[0]
  112. },
  113. {
  114. 1, // Segment
  115. 0, // Supports
  116. 0, // Attributes
  117. TRUE, // DmaAbove4G
  118. FALSE, // NoExtendedConfigSpace
  119. FALSE, // ResourceAssigned
  120. EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM | // AllocationAttributes
  121. EFI_PCI_HOST_BRIDGE_MEM64_DECODE,
  122. {
  123. // Bus
  124. FixedPcdGet32 (PcdCcixBusMin),
  125. FixedPcdGet32 (PcdCcixBusMax)
  126. }, {
  127. // Io
  128. FixedPcdGet64 (PcdCcixIoBase),
  129. FixedPcdGet64 (PcdCcixIoBase) + FixedPcdGet64 (PcdCcixIoSize) - 1
  130. }, {
  131. // Mem
  132. FixedPcdGet32 (PcdCcixMmio32Base),
  133. FixedPcdGet32 (PcdCcixMmio32Base) + FixedPcdGet32 (PcdCcixMmio32Size) - 1
  134. }, {
  135. // MemAbove4G
  136. FixedPcdGet64 (PcdCcixMmio64Base),
  137. FixedPcdGet64 (PcdCcixMmio64Base) + FixedPcdGet64 (PcdCcixMmio64Size) - 1
  138. }, {
  139. // PMem
  140. MAX_UINT64,
  141. 0
  142. }, {
  143. // PMemAbove4G
  144. MAX_UINT64,
  145. 0
  146. },
  147. (EFI_DEVICE_PATH_PROTOCOL *)&mEfiPciRootBridgeDevicePath[1]
  148. },
  149. };
  150. /**
  151. Return all the root bridge instances in an array.
  152. @param Count Return the count of root bridge instances.
  153. @return All the root bridge instances in an array.
  154. The array should be passed into PciHostBridgeFreeRootBridges()
  155. when it's not used.
  156. **/
  157. PCI_ROOT_BRIDGE *
  158. EFIAPI
  159. PciHostBridgeGetRootBridges (
  160. UINTN *Count
  161. )
  162. {
  163. *Count = ARRAY_SIZE (mPciRootBridge);
  164. return mPciRootBridge;
  165. }
  166. /**
  167. Free the root bridge instances array returned from PciHostBridgeGetRootBridges().
  168. @param Bridges The root bridge instances array.
  169. @param Count The count of the array.
  170. **/
  171. VOID
  172. EFIAPI
  173. PciHostBridgeFreeRootBridges (
  174. PCI_ROOT_BRIDGE *Bridges,
  175. UINTN Count
  176. )
  177. {
  178. }
  179. /**
  180. Inform the platform that the resource conflict happens.
  181. @param HostBridgeHandle Handle of the Host Bridge.
  182. @param Configuration Pointer to PCI I/O and PCI memory resource
  183. descriptors. The Configuration contains the resources
  184. for all the root bridges. The resource for each root
  185. bridge is terminated with END descriptor and an
  186. additional END is appended indicating the end of the
  187. entire resources. The resource descriptor field
  188. values follow the description in
  189. EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.\
  190. SubmitResources().
  191. **/
  192. VOID
  193. EFIAPI
  194. PciHostBridgeResourceConflict (
  195. EFI_HANDLE HostBridgeHandle,
  196. VOID *Configuration
  197. )
  198. {
  199. EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Descriptor;
  200. DEBUG ((DEBUG_ERROR, "PciHostBridge: Resource conflict happened!\n"));
  201. Descriptor = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *) Configuration;
  202. while (Descriptor->Desc == ACPI_ADDRESS_SPACE_DESCRIPTOR) {
  203. for (; Descriptor->Desc == ACPI_ADDRESS_SPACE_DESCRIPTOR; Descriptor++) {
  204. ASSERT (Descriptor->ResType <
  205. (sizeof (mPciHostBridgeLibAcpiAddressSpaceTypeStr) /
  206. sizeof (mPciHostBridgeLibAcpiAddressSpaceTypeStr[0])
  207. )
  208. );
  209. DEBUG ((DEBUG_ERROR, " %s: Length/Alignment = 0x%lx / 0x%lx\n",
  210. mPciHostBridgeLibAcpiAddressSpaceTypeStr[Descriptor->ResType],
  211. Descriptor->AddrLen, Descriptor->AddrRangeMax
  212. ));
  213. if (Descriptor->ResType == ACPI_ADDRESS_SPACE_TYPE_MEM) {
  214. DEBUG ((DEBUG_ERROR, " Granularity/SpecificFlag = %ld / %02x%s\n",
  215. Descriptor->AddrSpaceGranularity, Descriptor->SpecificFlag,
  216. ((Descriptor->SpecificFlag &
  217. EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE_PREFETCHABLE
  218. ) != 0) ? L" (Prefetchable)" : L""
  219. ));
  220. }
  221. }
  222. //
  223. // Skip the END descriptor for root bridge
  224. //
  225. ASSERT (Descriptor->Desc == ACPI_END_TAG_DESCRIPTOR);
  226. Descriptor = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)(
  227. (EFI_ACPI_END_TAG_DESCRIPTOR *)Descriptor + 1
  228. );
  229. }
  230. }