Armada7k8k.fdf 16 KB

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  1. #
  2. # Copyright (C) Marvell International Ltd. and its affiliates
  3. #
  4. # This program and the accompanying materials
  5. # are licensed and made available under the terms and conditions of the BSD License
  6. # which accompanies this distribution. The full text of the license may be found at
  7. # http://opensource.org/licenses/bsd-license.php
  8. #
  9. # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  10. # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  11. #
  12. ################################################################################
  13. #
  14. # FD Section
  15. # The [FD] Section is made up of the definition statements and a
  16. # description of what goes into the Flash Device Image. Each FD section
  17. # defines one flash "device" image. A flash device image may be one of
  18. # the following: Removable media bootable image (like a boot floppy
  19. # image,) an Option ROM image (that would be "flashed" into an add-in
  20. # card,) a System "Flash" image (that would be burned into a system's
  21. # flash) or an Update ("Capsule") image that will be used to update and
  22. # existing system flash.
  23. #
  24. ################################################################################
  25. [FD.Armada_EFI]
  26. BaseAddress = 0x00000000|gArmTokenSpaceGuid.PcdFdBaseAddress # The base address of the Firmware in NOR Flash.
  27. Size = 0x00400000|gArmTokenSpaceGuid.PcdFdSize # The size in bytes of the FLASH Device
  28. ErasePolarity = 1
  29. # This one is tricky, it must be: BlockSize * NumBlocks = Size
  30. BlockSize = 0x00001000
  31. NumBlocks = 0x400
  32. ################################################################################
  33. #
  34. # Following are lists of FD Region layout which correspond to the locations of different
  35. # images within the flash device.
  36. #
  37. # Regions must be defined in ascending order and may not overlap.
  38. #
  39. # A Layout Region start with a eight digit hex offset (leading "0x" required) followed by
  40. # the pipe "|" character, followed by the size of the region, also in hex with the leading
  41. # "0x" characters. Like:
  42. # Offset|Size
  43. # PcdOffsetCName|PcdSizeCName
  44. # RegionType <FV, DATA, or FILE>
  45. #
  46. ################################################################################
  47. #
  48. # UEFI has trouble dealing with FVs that reside at physical address 0x0.
  49. # So instead, put a hardcoded 'jump to 0x1000' at offset 0x0, and put the
  50. # real FV at offset 0x1000
  51. #
  52. 0x00000000|0x00001000
  53. DATA = {
  54. !if $(ARCH) == AARCH64
  55. 0x00, 0x04, 0x00, 0x14 # 'b 0x1000' in AArch64 ASM
  56. !else
  57. 0xfe, 0x03, 0x00, 0xea # 'b 0x1000' in AArch32 ASM
  58. !endif
  59. }
  60. 0x00001000|0x001ff000
  61. gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize
  62. FV = FVMAIN_COMPACT
  63. ################################################################################
  64. #
  65. # FV Section
  66. #
  67. # [FV] section is used to define what components or modules are placed within a flash
  68. # device file. This section also defines order the components and modules are positioned
  69. # within the image. The [FV] section consists of define statements, set statements and
  70. # module statements.
  71. #
  72. ################################################################################
  73. # DXE phase firmware volume
  74. [FV.FvMain]
  75. BlockSize = 0x40
  76. NumBlocks = 0 # This FV gets compressed so make it just big enough
  77. FvAlignment = 8 # FV alignment and FV attributes setting.
  78. ERASE_POLARITY = 1
  79. MEMORY_MAPPED = TRUE
  80. STICKY_WRITE = TRUE
  81. LOCK_CAP = TRUE
  82. LOCK_STATUS = TRUE
  83. WRITE_DISABLED_CAP = TRUE
  84. WRITE_ENABLED_CAP = TRUE
  85. WRITE_STATUS = TRUE
  86. WRITE_LOCK_CAP = TRUE
  87. WRITE_LOCK_STATUS = TRUE
  88. READ_DISABLED_CAP = TRUE
  89. READ_ENABLED_CAP = TRUE
  90. READ_STATUS = TRUE
  91. READ_LOCK_CAP = TRUE
  92. READ_LOCK_STATUS = TRUE
  93. FvNameGuid = 5eda4200-2c5f-43cb-9da3-0baf74b1b30c
  94. INF MdeModulePkg/Core/Dxe/DxeMain.inf
  95. #
  96. # Platform Initialization
  97. #
  98. INF Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
  99. INF Silicon/Marvell/Armada7k8k/Drivers/PlatInitDxe/PlatInitDxe.inf
  100. # PI DXE Drivers producing Architectural Protocols (EFI Services)
  101. INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
  102. INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf
  103. INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
  104. INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf
  105. INF ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf
  106. INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
  107. INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
  108. INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
  109. INF EmbeddedPkg/EmbeddedMonotonicCounter/EmbeddedMonotonicCounter.inf
  110. INF MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf
  111. INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
  112. INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
  113. INF Silicon/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.inf
  114. INF MdeModulePkg/Bus/I2c/I2cDxe/I2cDxe.inf
  115. INF Silicon/Marvell/Drivers/I2c/MvEepromDxe/MvEepromDxe.inf
  116. INF Silicon/Marvell/Drivers/Spi/MvSpiOrionDxe/MvSpiOrionDxe.inf
  117. INF Silicon/Marvell/Drivers/Spi/MvSpiFlashDxe/MvSpiFlashDxe.inf
  118. INF Silicon/Marvell/Armada7k8k/Drivers/Armada7k8kRngDxe/Armada7k8kRngDxe.inf
  119. # Variable services
  120. INF Silicon/Marvell/Drivers/Spi/MvFvbDxe/MvFvbDxe.inf
  121. INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
  122. INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
  123. # Network support
  124. INF MdeModulePkg/Universal/Network/SnpDxe/SnpDxe.inf
  125. INF MdeModulePkg/Universal/Network/DpcDxe/DpcDxe.inf
  126. INF MdeModulePkg/Universal/Network/MnpDxe/MnpDxe.inf
  127. INF MdeModulePkg/Universal/Network/VlanConfigDxe/VlanConfigDxe.inf
  128. INF MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf
  129. INF MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf
  130. INF MdeModulePkg/Universal/Network/Ip4Dxe/Ip4Dxe.inf
  131. INF MdeModulePkg/Universal/Network/Mtftp4Dxe/Mtftp4Dxe.inf
  132. INF MdeModulePkg/Universal/Network/Udp4Dxe/Udp4Dxe.inf
  133. INF NetworkPkg/UefiPxeBcDxe/UefiPxeBcDxe.inf
  134. INF NetworkPkg/TcpDxe/TcpDxe.inf
  135. INF Silicon/Marvell/Drivers/Net/MvMdioDxe/MvMdioDxe.inf
  136. INF Silicon/Marvell/Drivers/Net/MvPhyDxe/MvPhyDxe.inf
  137. INF Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.inf
  138. # NonDiscoverableDevices
  139. INF Silicon/Marvell/Drivers/NonDiscoverableDxe/NonDiscoverableDxe.inf
  140. INF MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverablePciDeviceDxe.inf
  141. # SCSI
  142. INF MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf
  143. INF MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf
  144. # SATA
  145. INF MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
  146. INF MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
  147. INF OvmfPkg/SataControllerDxe/SataControllerDxe.inf
  148. # USB
  149. INF MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf
  150. INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf
  151. INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf
  152. # SD/MMC
  153. INF MdeModulePkg/Bus/Sd/EmmcDxe/EmmcDxe.inf
  154. INF MdeModulePkg/Bus/Sd/SdDxe/SdDxe.inf
  155. INF Silicon/Marvell/Drivers/SdMmc/XenonDxe/SdMmcPciHcDxe.inf
  156. # Multiple Console IO support
  157. INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
  158. INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
  159. INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
  160. INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
  161. INF MdeModulePkg/Universal/SerialDxe/SerialDxe.inf
  162. # Human interface
  163. INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
  164. # FAT filesystem + GPT/MBR partitioning
  165. INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
  166. INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
  167. INF FatPkg/EnhancedFatDxe/Fat.inf
  168. INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
  169. # UEFI application (Shell Embedded Boot Loader)
  170. INF ShellPkg/Application/Shell/Shell.inf
  171. !ifdef $(INCLUDE_TFTP_COMMAND)
  172. INF ShellPkg/DynamicCommand/TftpDynamicCommand/TftpDynamicCommand.inf
  173. !endif #$(INCLUDE_TFTP_COMMAND)
  174. # Bds
  175. INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
  176. INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
  177. INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
  178. INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
  179. INF MdeModulePkg/Application/UiApp/UiApp.inf
  180. !if $(CAPSULE_ENABLE)
  181. # Firmware update
  182. INF MdeModulePkg/Universal/EsrtDxe/EsrtDxe.inf
  183. INF SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareReportDxe.inf
  184. FILE FREEFORM = PCD(gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiPkcs7TestPublicKeyFileGuid) {
  185. SECTION RAW = BaseTools/Source/Python/Pkcs7Sign/TestRoot.cer
  186. SECTION UI = "Pkcs7TestRoot"
  187. }
  188. !endif
  189. # DTB
  190. INF EmbeddedPkg/Drivers/DtPlatformDxe/DtPlatformDxe.inf
  191. !if $(ARCH) == AARCH64
  192. # ACPI support
  193. INF MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf
  194. INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
  195. !endif
  196. !include $(BOARD_DXE_FV_COMPONENTS)
  197. # PEI phase firmware volume
  198. [FV.FVMAIN_COMPACT]
  199. FvAlignment = 8
  200. ERASE_POLARITY = 1
  201. MEMORY_MAPPED = TRUE
  202. STICKY_WRITE = TRUE
  203. LOCK_CAP = TRUE
  204. LOCK_STATUS = TRUE
  205. WRITE_DISABLED_CAP = TRUE
  206. WRITE_ENABLED_CAP = TRUE
  207. WRITE_STATUS = TRUE
  208. WRITE_LOCK_CAP = TRUE
  209. WRITE_LOCK_STATUS = TRUE
  210. READ_DISABLED_CAP = TRUE
  211. READ_ENABLED_CAP = TRUE
  212. READ_STATUS = TRUE
  213. READ_LOCK_CAP = TRUE
  214. READ_LOCK_STATUS = TRUE
  215. INF ArmPlatformPkg/PrePeiCore/PrePeiCoreUniCore.inf
  216. INF MdeModulePkg/Core/Pei/PeiMain.inf
  217. INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
  218. INF ArmPlatformPkg/PlatformPei/PlatformPeim.inf
  219. INF ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf
  220. INF ArmPkg/Drivers/CpuPei/CpuPei.inf
  221. INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
  222. !if $(CAPSULE_ENABLE)
  223. INF MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf
  224. INF MdeModulePkg/Universal/CapsulePei/CapsulePei.inf
  225. INF RuleOverride = FMP_IMAGE_DESC Silicon/Marvell/Armada7k8k/Feature/Capsule/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf
  226. !endif
  227. INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
  228. FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
  229. SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
  230. SECTION FV_IMAGE = FVMAIN
  231. }
  232. }
  233. !if $(CAPSULE_ENABLE)
  234. [FV.SystemFirmwareDescriptor]
  235. FvAlignment = 8
  236. ERASE_POLARITY = 1
  237. MEMORY_MAPPED = TRUE
  238. STICKY_WRITE = TRUE
  239. LOCK_CAP = TRUE
  240. LOCK_STATUS = TRUE
  241. WRITE_DISABLED_CAP = TRUE
  242. WRITE_ENABLED_CAP = TRUE
  243. WRITE_STATUS = TRUE
  244. WRITE_LOCK_CAP = TRUE
  245. WRITE_LOCK_STATUS = TRUE
  246. READ_DISABLED_CAP = TRUE
  247. READ_ENABLED_CAP = TRUE
  248. READ_STATUS = TRUE
  249. READ_LOCK_CAP = TRUE
  250. READ_LOCK_STATUS = TRUE
  251. INF RuleOverride = FMP_IMAGE_DESC Silicon/Marvell/Armada7k8k/Feature/Capsule/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf
  252. [FV.CapsuleDispatchFv]
  253. FvAlignment = 8
  254. ERASE_POLARITY = 1
  255. MEMORY_MAPPED = TRUE
  256. STICKY_WRITE = TRUE
  257. LOCK_CAP = TRUE
  258. LOCK_STATUS = TRUE
  259. WRITE_DISABLED_CAP = TRUE
  260. WRITE_ENABLED_CAP = TRUE
  261. WRITE_STATUS = TRUE
  262. WRITE_LOCK_CAP = TRUE
  263. WRITE_LOCK_STATUS = TRUE
  264. READ_DISABLED_CAP = TRUE
  265. READ_ENABLED_CAP = TRUE
  266. READ_STATUS = TRUE
  267. READ_LOCK_CAP = TRUE
  268. READ_LOCK_STATUS = TRUE
  269. INF SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareUpdateDxe.inf
  270. !endif
  271. ################################################################################
  272. #
  273. # Rules are use with the [FV] section's module INF type to define
  274. # how an FFS file is created for a given INF file. The following Rule are the default
  275. # rules for the different module type. User can add the customized rules to define the
  276. # content of the FFS file.
  277. #
  278. ################################################################################
  279. ############################################################################
  280. # Example of a DXE_DRIVER FFS file with a Checksum encapsulation section #
  281. ############################################################################
  282. #
  283. #[Rule.Common.DXE_DRIVER]
  284. # FILE DRIVER = $(NAMED_GUID) {
  285. # DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
  286. # COMPRESS PI_STD {
  287. # GUIDED {
  288. # PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
  289. # UI STRING="$(MODULE_NAME)" Optional
  290. # VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  291. # }
  292. # }
  293. # }
  294. #
  295. ############################################################################
  296. [Rule.Common.SEC]
  297. FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED FIXED {
  298. TE TE Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
  299. }
  300. [Rule.Common.PEI_CORE]
  301. FILE PEI_CORE = $(NAMED_GUID) {
  302. TE TE Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
  303. UI STRING ="$(MODULE_NAME)" Optional
  304. }
  305. [Rule.Common.PEIM]
  306. FILE PEIM = $(NAMED_GUID) {
  307. PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
  308. TE TE Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
  309. UI STRING="$(MODULE_NAME)" Optional
  310. }
  311. [Rule.Common.PEIM.TIANOCOMPRESSED]
  312. FILE PEIM = $(NAMED_GUID) DEBUG_MYTOOLS_IA32 {
  313. PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
  314. GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {
  315. PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
  316. UI STRING="$(MODULE_NAME)" Optional
  317. }
  318. }
  319. [Rule.Common.DXE_CORE]
  320. FILE DXE_CORE = $(NAMED_GUID) {
  321. PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
  322. UI STRING="$(MODULE_NAME)" Optional
  323. }
  324. [Rule.Common.UEFI_DRIVER]
  325. FILE DRIVER = $(NAMED_GUID) {
  326. DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
  327. PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
  328. UI STRING="$(MODULE_NAME)" Optional
  329. }
  330. [Rule.Common.UEFI_DRIVER.BINARY]
  331. FILE DRIVER = $(NAMED_GUID) {
  332. DXE_DEPEX DXE_DEPEX Optional |.depex
  333. PE32 PE32 |.efi
  334. UI STRING="$(MODULE_NAME)" Optional
  335. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  336. }
  337. [Rule.Common.DXE_DRIVER]
  338. FILE DRIVER = $(NAMED_GUID) {
  339. DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
  340. PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
  341. UI STRING="$(MODULE_NAME)" Optional
  342. }
  343. [Rule.Common.DXE_RUNTIME_DRIVER]
  344. FILE DRIVER = $(NAMED_GUID) {
  345. DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
  346. PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
  347. UI STRING="$(MODULE_NAME)" Optional
  348. }
  349. [Rule.Common.UEFI_APPLICATION]
  350. FILE APPLICATION = $(NAMED_GUID) {
  351. UI STRING ="$(MODULE_NAME)" Optional
  352. PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
  353. }
  354. [Rule.Common.PEIM.FMP_IMAGE_DESC]
  355. FILE PEIM = $(NAMED_GUID) {
  356. RAW BIN |.acpi
  357. PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
  358. PE32 PE32 Align=4K $(INF_OUTPUT)/$(MODULE_NAME).efi
  359. UI STRING="$(MODULE_NAME)" Optional
  360. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  361. }
  362. [Rule.Common.USER_DEFINED.DTB]
  363. FILE FREEFORM = $(NAMED_GUID) {
  364. RAW BIN |.dtb
  365. }
  366. [Rule.Common.USER_DEFINED.ACPITABLE]
  367. FILE FREEFORM = $(NAMED_GUID) {
  368. RAW ASL |.aml
  369. RAW ACPI |.acpi
  370. }