D06.fdf 16 KB

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  1. #
  2. # Copyright (c) 2011, 2012, ARM Limited. All rights reserved.
  3. # Copyright (c) 2017 - 2018, Hisilicon Limited. All rights reserved.
  4. # Copyright (c) 2017 - 2018, Linaro Limited. All rights reserved.
  5. #
  6. # This program and the accompanying materials
  7. # are licensed and made available under the terms and conditions of the BSD License
  8. # which accompanies this distribution. The full text of the license may be found at
  9. # http://opensource.org/licenses/bsd-license.php
  10. #
  11. # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  12. # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  13. #
  14. [DEFINES]
  15. ################################################################################
  16. #
  17. # FD Section
  18. # The [FD] Section is made up of the definition statements and a
  19. # description of what goes into the Flash Device Image. Each FD section
  20. # defines one flash "device" image. A flash device image may be one of
  21. # the following: Removable media bootable image (like a boot floppy
  22. # image,) an Option ROM image (that would be "flashed" into an add-in
  23. # card,) a System "Flash" image (that would be burned into a system's
  24. # flash) or an Update ("Capsule") image that will be used to update and
  25. # existing system flash.
  26. #
  27. ################################################################################
  28. [FD.D06]
  29. BaseAddress = 0x204100000|gArmTokenSpaceGuid.PcdFdBaseAddress # The base address of the Firmware in NOR Flash.
  30. Size = 0x00400000|gArmTokenSpaceGuid.PcdFdSize # The size in bytes of the FLASH Device
  31. ErasePolarity = 1
  32. # This one is tricky, it must be: BlockSize * NumBlocks = Size
  33. BlockSize = 0x00010000
  34. NumBlocks = 0x40
  35. ################################################################################
  36. #
  37. # Following are lists of FD Region layout which correspond to the locations of different
  38. # images within the flash device.
  39. #
  40. # Regions must be defined in ascending order and may not overlap.
  41. #
  42. # A Layout Region start with a eight digit hex offset (leading "0x" required) followed by
  43. # the pipe "|" character, followed by the size of the region, also in hex with the leading
  44. # "0x" characters. Like:
  45. # Offset|Size
  46. # PcdOffsetCName|PcdSizeCName
  47. # RegionType <FV, DATA, or FILE>
  48. #
  49. ################################################################################
  50. 0x00000000|0x00100000
  51. gArmTokenSpaceGuid.PcdSecureFvBaseAddress|gArmTokenSpaceGuid.PcdSecureFvSize
  52. FILE = Platform/Hisilicon/D06/Sec/FVMAIN_SEC.Fv
  53. 0x00100000|0x00280000
  54. gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize
  55. FV = FVMAIN_COMPACT
  56. 0x00380000|0x00020000
  57. gHisiTokenSpaceGuid.PcdTrustedFirmwareBL1Base
  58. FILE = Platform/Hisilicon/D06/bl1.bin
  59. 0x003A0000|0x00020000
  60. FILE = Platform/Hisilicon/D06/fip.bin
  61. 0x003C0000|0x0000e000
  62. gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase64|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize
  63. DATA = {
  64. ## This is the EFI_FIRMWARE_VOLUME_HEADER
  65. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  66. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  67. # FileSystemGuid: gEfiSystemNvDataFvGuid =
  68. 0x8D, 0x2B, 0xF1, 0xFF, 0x96, 0x76, 0x8B, 0x4C,
  69. 0xA9, 0x85, 0x27, 0x47, 0x07, 0x5B, 0x4F, 0x50,
  70. # FvLength: 0x20000
  71. 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00,
  72. #Signature "_FVH" #Attributes
  73. 0x5f, 0x46, 0x56, 0x48, 0xff, 0xfe, 0x04, 0x00,
  74. #HeaderLength #CheckSum #ExtHeaderOffset #Reserved #Revision
  75. 0x48, 0x00, 0x36, 0x09, 0x00, 0x00, 0x00, 0x02,
  76. #Blockmap[0]: 2 Blocks * 0x10000 Bytes / Block
  77. 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00,
  78. #Blockmap[1]: End
  79. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  80. ## This is the VARIABLE_STORE_HEADER
  81. !if $(SECURE_BOOT_ENABLE) == TRUE
  82. #Signature: gEfiAuthenticatedVariableGuid =
  83. # { 0xaaf32c78, 0x947b, 0x439a, { 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92 }}
  84. 0x78, 0x2c, 0xf3, 0xaa, 0x7b, 0x94, 0x9a, 0x43,
  85. 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92,
  86. !else
  87. #Signature: gEfiVariableGuid =
  88. # { 0xddcf3616, 0x3275, 0x4164, { 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d }}
  89. 0x16, 0x36, 0xcf, 0xdd, 0x75, 0x32, 0x64, 0x41,
  90. 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d,
  91. !endif
  92. #Size: 0xe000 (gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize) - 0x48 (size of EFI_FIRMWARE_VOLUME_HEADER) = 0xdFB8
  93. 0xB8, 0xdF, 0x00, 0x00,
  94. #FORMATTED: 0x5A #HEALTHY: 0xFE #Reserved: UINT16 #Reserved1: UINT32
  95. 0x5A, 0xFE, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
  96. }
  97. 0x003CE000|0x00002000
  98. gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase64|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize
  99. #NV_FTW_WORKING
  100. DATA = {
  101. # EFI_FAULT_TOLERANT_WORKING_BLOCK_HEADER->Signature = gEdkiiWorkingBlockSignatureGuid =
  102. 0x2B, 0x29, 0x58, 0x9E, 0x68, 0x7C, 0x7D, 0x49,
  103. 0xA0, 0xCE, 0x65, 0x0 , 0xFD, 0x9F, 0x1B, 0x95,
  104. # Crc:UINT32 #WorkingBlockValid:1, WorkingBlockInvalid:1, Reserved
  105. 0xE2, 0x33, 0xF2, 0x03, 0xFE, 0xFF, 0xFF, 0xFF,
  106. # WriteQueueSize: UINT64 #Size: 0x2000 - 0x20 (FTW_WORKING_HEADER) = 0x1FE0
  107. 0xE0, 0x1F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
  108. }
  109. 0x003D0000|0x00010000
  110. gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase64|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
  111. 0x003E0000|0x00010000
  112. 0x003F0000|0x00010000
  113. FILE = Platform/Hisilicon/D0x-CustomData.Fv
  114. ################################################################################
  115. #
  116. # FV Section
  117. #
  118. # [FV] section is used to define what components or modules are placed within a flash
  119. # device file. This section also defines order the components and modules are positioned
  120. # within the image. The [FV] section consists of define statements, set statements and
  121. # module statements.
  122. #
  123. ################################################################################
  124. [FV.FvMain]
  125. BlockSize = 0x40
  126. NumBlocks = 0 # This FV gets compressed so make it just big enough
  127. FvAlignment = 16 # FV alignment and FV attributes setting.
  128. ERASE_POLARITY = 1
  129. MEMORY_MAPPED = TRUE
  130. STICKY_WRITE = TRUE
  131. LOCK_CAP = TRUE
  132. LOCK_STATUS = TRUE
  133. WRITE_DISABLED_CAP = TRUE
  134. WRITE_ENABLED_CAP = TRUE
  135. WRITE_STATUS = TRUE
  136. WRITE_LOCK_CAP = TRUE
  137. WRITE_LOCK_STATUS = TRUE
  138. READ_DISABLED_CAP = TRUE
  139. READ_ENABLED_CAP = TRUE
  140. READ_STATUS = TRUE
  141. READ_LOCK_CAP = TRUE
  142. READ_LOCK_STATUS = TRUE
  143. APRIORI DXE {
  144. INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
  145. }
  146. INF MdeModulePkg/Core/Dxe/DxeMain.inf
  147. INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
  148. INF Platform/Hisilicon/D06/Drivers/IoInitDxe/IoInitDxe.inf
  149. #
  150. # PI DXE Drivers producing Architectural Protocols (EFI Services)
  151. #
  152. INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf
  153. INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
  154. INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
  155. INF Platform/Hisilicon/D06/Drivers/SFC/SfcDxeDriver.inf
  156. INF Platform/Hisilicon/D06/Drivers/OemNicConfig2PHi1620/OemNicConfig2P.inf
  157. INF Silicon/Hisilicon/Drivers/FlashFvbDxe/FlashFvbDxe.inf
  158. INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
  159. INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
  160. INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
  161. INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
  162. !if $(SECURE_BOOT_ENABLE) == TRUE
  163. INF SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf
  164. !endif
  165. INF MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf
  166. INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
  167. INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
  168. INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
  169. #
  170. # Multiple Console IO support
  171. #
  172. INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
  173. INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
  174. INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
  175. INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
  176. INF MdeModulePkg/Universal/SerialDxe/SerialDxe.inf
  177. INF EmbeddedPkg/Drivers/ConsolePrefDxe/ConsolePrefDxe.inf
  178. INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
  179. INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf
  180. INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
  181. #
  182. # FAT filesystem + GPT/MBR partitioning
  183. #
  184. INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
  185. INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
  186. INF FatPkg/EnhancedFatDxe/Fat.inf
  187. INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
  188. INF IntelFrameworkModulePkg/Universal/StatusCode/RuntimeDxe/StatusCodeRuntimeDxe.inf
  189. #
  190. # Usb Support
  191. #
  192. INF MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf
  193. INF MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf
  194. INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf
  195. INF MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf
  196. INF MdeModulePkg/Bus/Usb/UsbMouseDxe/UsbMouseDxe.inf
  197. INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf
  198. INF Platform/Hisilicon/D06/Drivers/Ipmi/IpmiInterfaceDxe/IpmiInterfaceDxe.inf
  199. INF Platform/Hisilicon/D06/Drivers/GetInfoFromBmc/GetInfoFromBmc.inf
  200. INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
  201. INF Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf
  202. INF Silicon/Hisilicon/Drivers/Smbios/AddSmbiosType9/AddSmbiosType9.inf
  203. INF Silicon/Hisilicon/Drivers/Smbios/MemorySubClassDxe/MemorySubClassDxe.inf
  204. INF Silicon/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClassDxe.inf
  205. INF Platform/Hisilicon/D06/Drivers/TransferSmbiosInfo/TransSmbiosInfo.inf
  206. INF Platform/Hisilicon/D06/Drivers/IpmiMiscOpDxe/IpmiMiscOpDxe.inf
  207. INF Platform/Hisilicon/D06/Drivers/IpmiWatchdogDxe/IpmiWatchdogDxe.inf
  208. #
  209. #ACPI
  210. #
  211. INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
  212. INF Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/AcpiPlatformDxe.inf
  213. INF RuleOverride=ACPITABLE Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/AcpiTablesHi1620.inf
  214. INF Silicon/Hisilicon/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf
  215. INF Silicon/Hisilicon/Hi1620/Drivers/Apei/Apei.inf
  216. INF Silicon/Hisilicon/Hi1620/Pptt/Pptt.inf
  217. #
  218. #Network
  219. #
  220. INF Platform/Hisilicon/D06/Drivers/Net/SnpHi1620NewDxe/SnpDxe.inf
  221. INF MdeModulePkg/Universal/Network/SnpDxe/SnpDxe.inf
  222. INF MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf
  223. INF MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf
  224. INF MdeModulePkg/Universal/Network/DpcDxe/DpcDxe.inf
  225. INF MdeModulePkg/Universal/Network/Ip4Dxe/Ip4Dxe.inf
  226. INF MdeModulePkg/Universal/Network/MnpDxe/MnpDxe.inf
  227. INF MdeModulePkg/Universal/Network/Mtftp4Dxe/Mtftp4Dxe.inf
  228. INF MdeModulePkg/Universal/Network/Udp4Dxe/Udp4Dxe.inf
  229. INF NetworkPkg/UefiPxeBcDxe/UefiPxeBcDxe.inf
  230. INF NetworkPkg/TcpDxe/TcpDxe.inf
  231. INF NetworkPkg/IScsiDxe/IScsiDxe.inf
  232. !if $(NETWORK_IP6_ENABLE) == TRUE
  233. INF NetworkPkg/Ip6Dxe/Ip6Dxe.inf
  234. INF NetworkPkg/Udp6Dxe/Udp6Dxe.inf
  235. INF NetworkPkg/Dhcp6Dxe/Dhcp6Dxe.inf
  236. INF NetworkPkg/Mtftp6Dxe/Mtftp6Dxe.inf
  237. !endif
  238. !if $(HTTP_BOOT_ENABLE) == TRUE
  239. INF NetworkPkg/DnsDxe/DnsDxe.inf
  240. INF NetworkPkg/HttpUtilitiesDxe/HttpUtilitiesDxe.inf
  241. INF NetworkPkg/HttpDxe/HttpDxe.inf
  242. INF NetworkPkg/HttpBootDxe/HttpBootDxe.inf
  243. !endif
  244. #
  245. # PCI Support
  246. #
  247. INF Silicon/Hisilicon/Drivers/PciPlatform/PciPlatform.inf
  248. INF ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf
  249. INF MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf
  250. INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
  251. INF Platform/Hisilicon/D06/Drivers/PcieRasInitDxe/PcieRasInitDxe.inf
  252. INF Platform/Hisilicon/D06/Drivers/RasInitDxe/RasInitDxe.inf
  253. # VGA Driver
  254. #
  255. INF Platform/Hisilicon/D06/Drivers/Sm750Dxe/UefiSmi.inf
  256. INF MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDxe.inf
  257. INF Platform/Hisilicon/D06/Drivers/Sas/SasDxeDriver.inf
  258. INF MdeModulePkg/Bus/Pci/SataControllerDxe/SataControllerDxe.inf
  259. INF MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
  260. INF MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
  261. INF Silicon/Hisilicon/Hi1620/Drivers/Pl011DebugSerialPortInitDxe/Pl011DebugSerialPortInitDxe.inf
  262. INF SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareReportDxe.inf
  263. INF MdeModulePkg/Universal/EsrtDxe/EsrtDxe.inf
  264. #
  265. # Build Shell from latest source code instead of prebuilt binary
  266. #
  267. INF ShellPkg/Application/Shell/Shell.inf
  268. INF MdeModulePkg/Application/UiApp/UiApp.inf
  269. #
  270. # Bds
  271. #
  272. INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
  273. INF MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf
  274. INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
  275. INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
  276. INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
  277. [FV.FVMAIN_COMPACT]
  278. FvAlignment = 16
  279. ERASE_POLARITY = 1
  280. MEMORY_MAPPED = TRUE
  281. STICKY_WRITE = TRUE
  282. LOCK_CAP = TRUE
  283. LOCK_STATUS = TRUE
  284. WRITE_DISABLED_CAP = TRUE
  285. WRITE_ENABLED_CAP = TRUE
  286. WRITE_STATUS = TRUE
  287. WRITE_LOCK_CAP = TRUE
  288. WRITE_LOCK_STATUS = TRUE
  289. READ_DISABLED_CAP = TRUE
  290. READ_ENABLED_CAP = TRUE
  291. READ_STATUS = TRUE
  292. READ_LOCK_CAP = TRUE
  293. READ_LOCK_STATUS = TRUE
  294. APRIORI PEI {
  295. INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
  296. }
  297. INF ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf
  298. INF MdeModulePkg/Core/Pei/PeiMain.inf
  299. INF ArmPlatformPkg/PlatformPei/PlatformPeim.inf
  300. INF MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf
  301. INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
  302. INF Silicon/Hisilicon/Drivers/VersionInfoPeim/VersionInfoPeim.inf
  303. INF Platform/Hisilicon/D06/Drivers/Ipmi/IpmiInterfacePei/IpmiInterfacePei.inf
  304. INF Platform/Hisilicon/D06/MemoryInitPei/MemoryInitPeim.inf
  305. INF ArmPkg/Drivers/CpuPei/CpuPei.inf
  306. INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
  307. INF IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf
  308. INF Platform/Hisilicon/D06/EarlyConfigPeim/EarlyConfigPeimD06.inf
  309. INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
  310. INF RuleOverride = FMP_IMAGE_DESC Platform/Hisilicon/D06/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf
  311. FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
  312. SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
  313. SECTION FV_IMAGE = FVMAIN
  314. }
  315. }
  316. [FV.CapsuleDispatchFv]
  317. FvAlignment = 16
  318. ERASE_POLARITY = 1
  319. MEMORY_MAPPED = TRUE
  320. STICKY_WRITE = TRUE
  321. LOCK_CAP = TRUE
  322. LOCK_STATUS = TRUE
  323. WRITE_DISABLED_CAP = TRUE
  324. WRITE_ENABLED_CAP = TRUE
  325. WRITE_STATUS = TRUE
  326. WRITE_LOCK_CAP = TRUE
  327. WRITE_LOCK_STATUS = TRUE
  328. READ_DISABLED_CAP = TRUE
  329. READ_ENABLED_CAP = TRUE
  330. READ_STATUS = TRUE
  331. READ_LOCK_CAP = TRUE
  332. READ_LOCK_STATUS = TRUE
  333. INF SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareUpdateDxe.inf
  334. [FV.SystemFirmwareUpdateCargo]
  335. FvAlignment = 16
  336. ERASE_POLARITY = 1
  337. MEMORY_MAPPED = TRUE
  338. STICKY_WRITE = TRUE
  339. LOCK_CAP = TRUE
  340. LOCK_STATUS = TRUE
  341. WRITE_DISABLED_CAP = TRUE
  342. WRITE_ENABLED_CAP = TRUE
  343. WRITE_STATUS = TRUE
  344. WRITE_LOCK_CAP = TRUE
  345. WRITE_LOCK_STATUS = TRUE
  346. READ_DISABLED_CAP = TRUE
  347. READ_ENABLED_CAP = TRUE
  348. READ_STATUS = TRUE
  349. READ_LOCK_CAP = TRUE
  350. READ_LOCK_STATUS = TRUE
  351. FILE RAW = 642e4fcf-2df7-4415-8b70-a03909c57b55 { # PcdEdkiiSystemFirmwareFileGuid
  352. FD = D06
  353. }
  354. FILE RAW = ce57b167-b0e4-41e8-a897-5f4feb781d40 { # gEdkiiSystemFmpCapsuleDriverFvFileGuid
  355. FV = CapsuleDispatchFv
  356. }
  357. FILE RAW = 812136D3-4D3A-433A-9418-29BB9BF78F6E { # gEdkiiSystemFmpCapsuleConfigFileGuid
  358. Platform/Hisilicon/D06/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini
  359. }
  360. [FmpPayload.FmpPayloadSystemFirmwarePkcs7]
  361. IMAGE_HEADER_INIT_VERSION = 0x02
  362. IMAGE_TYPE_ID = df8fe8d1-e937-45b8-9691-c4b5e183874e # PcdSystemFmpCapsuleImageTypeIdGuid
  363. IMAGE_INDEX = 0x1
  364. HARDWARE_INSTANCE = 0x0
  365. MONOTONIC_COUNT = 0x1
  366. CERTIFICATE_GUID = 4AAFD29D-68DF-49EE-8AA9-347D375665A7 # PKCS7
  367. FV = SystemFirmwareUpdateCargo
  368. [Capsule.D06FirmwareUpdateCapsuleFmpPkcs7]
  369. CAPSULE_GUID = 6dcbd5ed-e82d-4c44-bda1-7194199ad92a # gEfiFmpCapsuleGuid
  370. CAPSULE_HEADER_SIZE = 0x20
  371. CAPSULE_HEADER_INIT_VERSION = 0x1
  372. FMP_PAYLOAD = FmpPayloadSystemFirmwarePkcs7
  373. !include Silicon/Hisilicon/Hisilicon.fdf.inc