LpcWpc83627Policy.h 3.3 KB

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  1. /*++
  2. Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
  3. SPDX-License-Identifier: BSD-2-Clause-Patent
  4. Module Name:
  5. LpcWpc83667Policy.h
  6. Abstract:
  7. Protocol used for WPC83627 Policy definition.
  8. -------------------------------------------------------------------------------
  9. Rev Date<MM/DD/YYYY> Name Description
  10. -------------------------------------------------------------------------------
  11. R01 < 4/22/2011> LB Update driver for Sio83627UGH support.
  12. -------------------------------------------------------------------------------
  13. **/
  14. #ifndef _WPC83627_POLICY_PROTOCOL_H_
  15. #define _WPC83627_POLICY_PROTOCOL_H_
  16. EFI_FORWARD_DECLARATION (EFI_WPC83627_POLICY_PROTOCOL);
  17. #define EFI_WPC83627_POLICY_PROTOCOL_GUID \
  18. { \
  19. 0xd3ecc567, 0x9fd5, 0x44c1, 0x86, 0xcf, 0x5d, 0xa7, 0xa2, 0x4f, 0x4b, 0x5d \
  20. }
  21. #define EFI_WPC83627_COM1_ENABLE 0x01
  22. #define EFI_WPC83627_COM2_ENABLE 0x01
  23. #define EFI_WPC83627_COM3_ENABLE 0x01
  24. #define EFI_WPC83627_COM4_ENABLE 0x01
  25. #define EFI_WPC83627_LPT1_ENABLE 0x01
  26. #define EFI_WPC83627_LPT1_ENABLE 0x01
  27. #define EFI_WPC83627_FDD_ENABLE 0x01
  28. #define EFI_WPC83627_FDD_WRITE_ENABLE 0x01
  29. #define EFI_WPC83627_PS2_KBC_ENABLE 0x01
  30. #define EFI_WPC83627_ECIR_ENABLE 0x01
  31. #define EFI_WPC83627_COM1_DISABLE 0x00
  32. #define EFI_WPC83627_COM2_DISABLE 0x00
  33. #define EFI_WPC83627_COM3_DISABLE 0x00
  34. #define EFI_WPC83627_COM4_DISABLE 0x00
  35. #define EFI_WPC83627_LPT1_DISABLE 0x00
  36. #define EFI_WPC83627_FDD_DISABLE 0x00
  37. #define EFI_WPC83627_FDD_WRITE_PROTECT 0x00
  38. #define EFI_WPC83627_PS2_KBC_DISABLE 0x00
  39. #define EFI_WPC83627_ECIR_DISABLE 0x00
  40. #define EFI_WPC83627_RESERVED_DEFAULT 0x00
  41. typedef struct {
  42. UINT16 Com1 :1; // 0 = Disable, 1 = Enable
  43. UINT16 Lpt1 :1; // 0 = Disable, 1 = Enable
  44. UINT16 Floppy :1; // 0 = Disable, 1 = Enable
  45. UINT16 FloppyWriteProtect :1; // 0 = Write Protect, 1 = Write Enable
  46. UINT16 Port80 :1; // 0 = Disable, 1 = Enable
  47. UINT16 CIR :1; // CIR enable or disable
  48. UINT16 Ps2Keyboard :1; // 0 = Disable, 1 = Enable
  49. UINT16 Ps2Mouse :1; // 0 = Disable, 1 = Enable
  50. UINT16 Com2 :1; // 0 = Disable, 1 = Enable
  51. UINT16 Com3 :1; // 0 = Disable, 1 = Enable
  52. UINT16 Com4 :1; // 0 = Disable, 1 = Enable
  53. UINT16 Dac :1; // 0 = Disable, 1 = Enable
  54. UINT16 Rsvd :6;
  55. } EFI_WPC83627_DEVICE_ENABLES;
  56. typedef enum {
  57. LptModeOutput,
  58. LptModeBiDirectional,
  59. LptModeEpp,
  60. LptModeEcp
  61. } EFI_LPT_MODE;
  62. typedef struct _EFI_WPC83627_POLICY_PROTOCOL {
  63. EFI_WPC83627_DEVICE_ENABLES DeviceEnables;
  64. EFI_LPT_MODE LptMode;
  65. } EFI_WPC83627_POLICY_PROTOCOL;
  66. extern EFI_GUID gEfiLpcWpc83627PolicyProtocolGuid;
  67. #endif