PeiKabylakeRvp3InitPreMemLib.c 5.4 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229
  1. /** @file
  2. Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
  3. SPDX-License-Identifier: BSD-2-Clause-Patent
  4. **/
  5. #include <PiPei.h>
  6. #include <SaPolicyCommon.h>
  7. #include <Library/DebugLib.h>
  8. #include <Library/BaseMemoryLib.h>
  9. #include <Library/IoLib.h>
  10. #include <Library/HobLib.h>
  11. #include <Library/PcdLib.h>
  12. #include <Library/PchCycleDecodingLib.h>
  13. #include <Library/PciLib.h>
  14. #include <Library/PcdLib.h>
  15. #include <Library/BaseMemoryLib.h>
  16. #include <Library/PeiSaPolicyLib.h>
  17. #include <Library/BoardInitLib.h>
  18. #include <PchAccess.h>
  19. #include <Library/GpioNativeLib.h>
  20. #include <Library/GpioLib.h>
  21. #include <GpioPinsSklLp.h>
  22. #include <GpioPinsSklH.h>
  23. #include <Library/GpioExpanderLib.h>
  24. #include <SioRegs.h>
  25. #include <Library/PchPcrLib.h>
  26. #include <Library/SiliconInitLib.h>
  27. #include "PeiKabylakeRvp3InitLib.h"
  28. #include <ConfigBlock.h>
  29. #include <ConfigBlock/MemoryConfig.h>
  30. //
  31. // Reference RCOMP resistors on motherboard - for SKL RVP1
  32. //
  33. GLOBAL_REMOVE_IF_UNREFERENCED const UINT16 RcompResistorSklRvp1[SA_MRC_MAX_RCOMP] = { 200, 81, 162 };
  34. //
  35. // RCOMP target values for RdOdt, WrDS, WrDSCmd, WrDSCtl, WrDSClk - for SKL RVP1
  36. //
  37. GLOBAL_REMOVE_IF_UNREFERENCED const UINT16 RcompTargetSklRvp1[SA_MRC_MAX_RCOMP_TARGETS] = { 100, 40, 40, 23, 40 };
  38. /**
  39. SkylaeA0Rvp3 board configuration init function for PEI pre-memory phase.
  40. PEI_BOARD_CONFIG_PCD_INIT
  41. @param Content pointer to the buffer contain init information for board init.
  42. @retval EFI_SUCCESS The function completed successfully.
  43. @retval EFI_INVALID_PARAMETER The parameter is NULL.
  44. **/
  45. EFI_STATUS
  46. EFIAPI
  47. KabylakeRvp3InitPreMem (
  48. VOID
  49. )
  50. {
  51. PcdSet32S (PcdPcie0WakeGpioNo, 0);
  52. PcdSet8S (PcdPcie0HoldRstExpanderNo, 0);
  53. PcdSet32S (PcdPcie0HoldRstGpioNo, 8);
  54. PcdSetBoolS (PcdPcie0HoldRstActive, TRUE);
  55. PcdSet8S (PcdPcie0PwrEnableExpanderNo, 0);
  56. PcdSet32S (PcdPcie0PwrEnableGpioNo, 16);
  57. PcdSetBoolS (PcdPcie0PwrEnableActive, FALSE);
  58. //
  59. // HSIO PTSS Table
  60. //
  61. PcdSet32S (PcdSpecificLpHsioPtssTable1, (UINTN) PchLpHsioPtss_Bx_KabylakeRvp3);
  62. PcdSet16S (PcdSpecificLpHsioPtssTable1Size, (UINTN) PchLpHsioPtss_Bx_KabylakeRvp3_Size);
  63. PcdSet32S (PcdSpecificLpHsioPtssTable2, (UINTN) PchLpHsioPtss_Cx_KabylakeRvp3);
  64. PcdSet16S (PcdSpecificLpHsioPtssTable2Size, (UINTN) PchLpHsioPtss_Cx_KabylakeRvp3_Size);
  65. //
  66. // DRAM related definition
  67. //
  68. PcdSet8S (PcdSaMiscUserBd, 5);
  69. PcdSet8S (PcdMrcSpdAddressTable0, 0xA2);
  70. PcdSet8S (PcdMrcSpdAddressTable1, 0xA0);
  71. PcdSet8S (PcdMrcSpdAddressTable2, 0xA2);
  72. PcdSet8S (PcdMrcSpdAddressTable3, 0xA0);
  73. PcdSet32S (PcdMrcDqByteMap, (UINTN) mDqByteMapSklRvp3);
  74. PcdSet16S (PcdMrcDqByteMapSize, sizeof (mDqByteMapSklRvp3));
  75. PcdSet32S (PcdMrcDqsMapCpu2Dram, (UINTN) mDqsMapCpu2DramSklRvp3);
  76. PcdSet16S (PcdMrcDqsMapCpu2DramSize, sizeof (mDqsMapCpu2DramSklRvp3));
  77. PcdSet32S (PcdMrcRcompResistor, (UINTN) RcompResistorSklRvp1);
  78. PcdSet32S (PcdMrcRcompTarget, (UINTN) RcompTargetSklRvp1);
  79. PcdSet32S (PcdMrcSpdData, (UINTN) mSkylakeRvp3Spd110);
  80. PcdSet16S (PcdMrcSpdDataSize, mSkylakeRvp3Spd110Size);
  81. PcdSetBoolS (PcdIoExpanderPresent, TRUE);
  82. return EFI_SUCCESS;
  83. }
  84. #define SIO_RUNTIME_REG_BASE_ADDRESS 0x0680
  85. /**
  86. Configures GPIO
  87. @param[in] GpioTable Point to Platform Gpio table
  88. @param[in] GpioTableCount Number of Gpio table entries
  89. **/
  90. VOID
  91. ConfigureGpio (
  92. IN GPIO_INIT_CONFIG *GpioDefinition,
  93. IN UINT16 GpioTableCount
  94. )
  95. {
  96. EFI_STATUS Status;
  97. DEBUG ((DEBUG_INFO, "ConfigureGpio() Start\n"));
  98. Status = GpioConfigurePads (GpioTableCount, GpioDefinition);
  99. DEBUG ((DEBUG_INFO, "ConfigureGpio() End\n"));
  100. }
  101. /**
  102. Configure GPIO Before Memory is not ready.
  103. **/
  104. VOID
  105. GpioInitPreMem (
  106. VOID
  107. )
  108. {
  109. // ConfigureGpio ();
  110. }
  111. /**
  112. Configure Super IO
  113. **/
  114. VOID
  115. SioInit (
  116. VOID
  117. )
  118. {
  119. //
  120. // Program and Enable Default Super IO Configuration Port Addresses and range
  121. //
  122. PchLpcGenIoRangeSet (PcdGet16 (PcdLpcSioConfigDefaultPort) & (~0xF), 0x10);
  123. //
  124. // 128 Byte Boundary and SIO Runtime Register Range is 0x0 to 0xF;
  125. //
  126. PchLpcGenIoRangeSet (SIO_RUNTIME_REG_BASE_ADDRESS & (~0x7F), 0x10);
  127. return;
  128. }
  129. /**
  130. Configues the IC2 Controller on which GPIO Expander Communicates.
  131. This Function is to enable the I2CGPIOExapanderLib to programm the Gpios
  132. Complete intilization will be done in later Stage
  133. **/
  134. VOID
  135. EFIAPI
  136. I2CGpioExpanderInitPreMem(
  137. VOID
  138. )
  139. {
  140. ConfigureSerialIoController (PchSerialIoIndexI2C4, PchSerialIoAcpiHidden);
  141. SerialIoI2cGpioInit (PchSerialIoIndexI2C4, PchSerialIoAcpiHidden, PchSerialIoIs33V);
  142. }
  143. /**
  144. Configure GPIO and SIO before memory ready
  145. @retval EFI_SUCCESS Operation success.
  146. **/
  147. EFI_STATUS
  148. EFIAPI
  149. KabylakeRvp3BoardInitBeforeMemoryInit (
  150. VOID
  151. )
  152. {
  153. KabylakeRvp3InitPreMem ();
  154. //
  155. // Configures the I2CGpioExpander
  156. //
  157. if (PcdGetBool (PcdIoExpanderPresent)) {
  158. I2CGpioExpanderInitPreMem();
  159. }
  160. GpioInitPreMem ();
  161. SioInit ();
  162. ///
  163. /// Do basic PCH init
  164. ///
  165. SiliconInit ();
  166. return EFI_SUCCESS;
  167. }
  168. EFI_STATUS
  169. EFIAPI
  170. KabylakeRvp3BoardDebugInit (
  171. VOID
  172. )
  173. {
  174. ///
  175. /// Do Early PCH init
  176. ///
  177. EarlySiliconInit ();
  178. return EFI_SUCCESS;
  179. }
  180. EFI_BOOT_MODE
  181. EFIAPI
  182. KabylakeRvp3BoardBootModeDetect (
  183. VOID
  184. )
  185. {
  186. return BOOT_WITH_FULL_CONFIGURATION;
  187. }