PchDmi15.h 2.7 KB

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  1. /** @file
  2. Internal header file for PCH DMI library for SIP15
  3. Copyright (c) 2019 Intel Corporation. All rights reserved. <BR>
  4. SPDX-License-Identifier: BSD-2-Clause-Patent
  5. **/
  6. #ifndef __PCH_DMI_15_H__
  7. #define __PCH_DMI_15_H__
  8. #include <Private/Library/PchDmiLib.h>
  9. #include <Private/Library/PeiPchDmiLib.h>
  10. /**
  11. This function checks if DMI SIP15 Secured Register Lock (SRL) is set
  12. @retval SRL state
  13. **/
  14. BOOLEAN
  15. IsPchDmi15Locked (
  16. VOID
  17. );
  18. /**
  19. Set DMI thermal throttling to recommended configuration.
  20. It's intended only for P-DMI SIP15.
  21. **/
  22. VOID
  23. PchDmi15SetRecommendedThermalThrottling (
  24. VOID
  25. );
  26. /**
  27. Set DMI thermal throttling to custom configuration.
  28. This function will configure Thermal Sensor 0/1/2/3 TargetWidth and set
  29. DMI Thermal Sensor Autonomous Width Enable.
  30. It's intended only for P-DMI SIP15.
  31. @param[in] DmiThermalThrottling DMI Thermal Throttling structure.
  32. **/
  33. VOID
  34. PchDmi15SetCustomThermalThrottling (
  35. IN DMI_THERMAL_THROTTLING DmiThermalThrottling
  36. );
  37. /**
  38. Enable PCIe Relaxed Order for DMI SIP15
  39. **/
  40. VOID
  41. PchDmi15EnablePcieRelaxedOrder (
  42. VOID
  43. );
  44. /**
  45. This function will switch SAI value to be driven to IOSF Primary Fabric
  46. for cycles with Core BDF from HOSTIA_BOOT_SAI to HOSTIA_POSTBOOT_SAI.
  47. To be used when PCH is paired with CFL CPU.
  48. **/
  49. VOID
  50. PchDmi15EnablePostBootSai (
  51. VOID
  52. );
  53. /**
  54. This function will do necessary configuration after platform
  55. should have switched to POSTBOOT_SAI. It needs to be called even if
  56. POSTBOOT_SAI was not set.
  57. **/
  58. VOID
  59. PchDmi15ConfigAfterPostBootSai (
  60. VOID
  61. );
  62. /**
  63. Secure Register Lock data
  64. @param[out] SrlRegOffset Register offset holding Secure Register Lock setting
  65. @param[out] SrlRegMask Mask for Secure Register Lock setting
  66. **/
  67. VOID
  68. PchDmi15SrlRegData (
  69. OUT UINT16 *SrlRegOffset,
  70. OUT UINT32 *SrlRegMask
  71. );
  72. /**
  73. Get PCH DMI SIP15 Virtual Channel Control and Status registers
  74. @param[in] Vc The virtual channel number for programing
  75. @param[out] DmiVcCtlAddress DMI Virtual Channel Control register address
  76. @param[out] DmiVcStsAddress DMI Virtual Channel Status register address
  77. **/
  78. VOID
  79. PchDmi15VcRegs (
  80. IN PCH_DMI_VC_TYPE Vc,
  81. OUT UINT16 *DmiVcCtlAddress,
  82. OUT UINT16 *DmiVcStsAddress
  83. );
  84. /**
  85. The function sets the Target Link Speed to GEN 3 in P-DMI SIP15.
  86. @param[in] TargetLinkSpeed Target Link Speed
  87. 2: GEN2
  88. 3: GEN3
  89. **/
  90. VOID
  91. PchDmi15SetTargetLinkSpeed (
  92. IN UINT8 TargetLinkSpeed
  93. );
  94. #endif