PchDmi14.h 1.6 KB

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  1. /** @file
  2. Internal header file for PCH DMI library for SIP14
  3. Copyright (c) 2019 Intel Corporation. All rights reserved. <BR>
  4. SPDX-License-Identifier: BSD-2-Clause-Patent
  5. **/
  6. #ifndef __PCH_DMI_14_H__
  7. #define __PCH_DMI_14_H__
  8. #include <Private/Library/PchDmiLib.h>
  9. #include <Private/Library/PeiPchDmiLib.h>
  10. /**
  11. This function checks if DMI SIP14 Secured Register Lock (SRL) is set
  12. @retval SRL state
  13. **/
  14. BOOLEAN
  15. IsPchDmi14Locked (
  16. VOID
  17. );
  18. /**
  19. Enable PCIe Relaxed Order for DMI SIP14
  20. **/
  21. VOID
  22. PchDmi14EnablePcieRelaxedOrder (
  23. VOID
  24. );
  25. /**
  26. This function will switch SAI value to be driven to IOSF Primary Fabric
  27. for cycles with Core BDF from HOSTIA_BOOT_SAI to HOSTIA_POSTBOOT_SAI.
  28. To be used when PCH is paired with CFL CPU.
  29. **/
  30. VOID
  31. PchDmi14EnablePostBootSai (
  32. VOID
  33. );
  34. /**
  35. Secure Register Lock data
  36. @param[out] SrlRegOffset Register offset holding Secure Register Lock setting
  37. @param[out] SrlRegMask Mask for Secure Register Lock setting
  38. **/
  39. VOID
  40. PchDmi14SrlRegData (
  41. OUT UINT16 *SrlRegOffset,
  42. OUT UINT32 *SrlRegMask
  43. );
  44. /**
  45. Get PCH DMI SIP14 Virtual Channel Control and Status registers
  46. @param[in] Vc The virtual channel number for programing
  47. @param[out] DmiVcCtlAddress DMI Virtual Channel Control register address
  48. @param[out] DmiVcStsAddress DMI Virtual Channel Status register address
  49. **/
  50. VOID
  51. PchDmi14VcRegs (
  52. IN PCH_DMI_VC_TYPE Vc,
  53. OUT UINT16 *DmiVcCtlAddress,
  54. OUT UINT16 *DmiVcStsAddress
  55. );
  56. #endif