PchPrintPolicy.c 42 KB

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  1. /** @file
  2. Print whole PCH_POLICY_PPI
  3. Copyright (c) 2019 - 2020 Intel Corporation. All rights reserved. <BR>
  4. SPDX-License-Identifier: BSD-2-Clause-Patent
  5. **/
  6. #include "PeiPchPolicyLibrary.h"
  7. #include <Private/PchHsio.h>
  8. #include <Library/ConfigBlockLib.h>
  9. /**
  10. Print USB_CONFIG and serial out.
  11. @param[in] UsbConfig Pointer to a USB_CONFIG that provides the platform setting
  12. **/
  13. VOID
  14. PchPrintUsbConfig (
  15. IN CONST USB_CONFIG *UsbConfig
  16. )
  17. {
  18. UINT32 Index;
  19. DEBUG ((DEBUG_INFO, "------------------ PCH USB Config ------------------\n"));
  20. DEBUG ((DEBUG_INFO, " EnableComplianceMode = %x\n", UsbConfig->EnableComplianceMode));
  21. DEBUG ((DEBUG_INFO, " PdoProgramming = %x\n", UsbConfig->PdoProgramming));
  22. DEBUG ((DEBUG_INFO, " OverCurrentEnable = %x\n", UsbConfig->OverCurrentEnable));
  23. DEBUG ((DEBUG_INFO, " XhciOcLock = %x\n", UsbConfig->XhciOcLock));
  24. DEBUG ((DEBUG_INFO, " Usb2PhySusPgEnable = %x\n", UsbConfig->Usb2PhySusPgEnable));
  25. for (Index = 0; Index < GetPchUsb2MaxPhysicalPortNum (); Index++) {
  26. DEBUG ((DEBUG_INFO, " PortUsb20[%d].Enabled = %x\n", Index, UsbConfig->PortUsb20[Index].Enable));
  27. DEBUG ((DEBUG_INFO, " PortUsb20[%d].OverCurrentPin = OC%x\n", Index, UsbConfig->PortUsb20[Index].OverCurrentPin));
  28. DEBUG ((DEBUG_INFO, " PortUsb20[%d].Afe.Petxiset = %x\n", Index, UsbConfig->PortUsb20[Index].Afe.Petxiset));
  29. DEBUG ((DEBUG_INFO, " PortUsb20[%d].Afe.Txiset = %x\n", Index, UsbConfig->PortUsb20[Index].Afe.Txiset));
  30. DEBUG ((DEBUG_INFO, " PortUsb20[%d].Afe.Predeemp = %x\n", Index, UsbConfig->PortUsb20[Index].Afe.Predeemp));
  31. DEBUG ((DEBUG_INFO, " PortUsb20[%d].Afe.Pehalfbit = %x\n", Index, UsbConfig->PortUsb20[Index].Afe.Pehalfbit));
  32. }
  33. for (Index = 0; Index < GetPchXhciMaxUsb3PortNum (); Index++) {
  34. DEBUG ((DEBUG_INFO, " PortUsb30[%d] Enabled = %x\n", Index, UsbConfig->PortUsb30[Index].Enable));
  35. DEBUG ((DEBUG_INFO, " PortUsb30[%d].OverCurrentPin = OC%x\n", Index, UsbConfig->PortUsb30[Index].OverCurrentPin));
  36. DEBUG ((DEBUG_INFO, " PortUsb30[%d].HsioTxDeEmphEnable = %x\n", Index, UsbConfig->PortUsb30[Index].HsioTxDeEmphEnable));
  37. DEBUG ((DEBUG_INFO, " PortUsb30[%d].HsioTxDeEmph = %x\n", Index, UsbConfig->PortUsb30[Index].HsioTxDeEmph));
  38. DEBUG ((DEBUG_INFO, " PortUsb30[%d].HsioTxDownscaleAmpEnable = %x\n", Index, UsbConfig->PortUsb30[Index].HsioTxDownscaleAmpEnable));
  39. DEBUG ((DEBUG_INFO, " PortUsb30[%d].HsioTxDownscaleAmp = %x\n", Index, UsbConfig->PortUsb30[Index].HsioTxDownscaleAmp));
  40. DEBUG ((DEBUG_INFO, " PortUsb30HsioRx[%d].HsioCtrlAdaptOffsetCfgEnable = %x\n", Index, UsbConfig->PortUsb30HsioRx[Index].HsioCtrlAdaptOffsetCfgEnable));
  41. DEBUG ((DEBUG_INFO, " PortUsb30HsioRx[%d].HsioCtrlAdaptOffsetCfg = %x\n", Index, UsbConfig->PortUsb30HsioRx[Index].HsioCtrlAdaptOffsetCfg));
  42. DEBUG ((DEBUG_INFO, " PortUsb30HsioRx[%d].HsioFilterSelNEnable = %x\n", Index, UsbConfig->PortUsb30HsioRx[Index].HsioFilterSelNEnable));
  43. DEBUG ((DEBUG_INFO, " PortUsb30HsioRx[%d].HsioFilterSelN = %x\n", Index, UsbConfig->PortUsb30HsioRx[Index].HsioFilterSelN));
  44. DEBUG ((DEBUG_INFO, " PortUsb30HsioRx[%d].HsioFilterSelPEnable = %x\n", Index, UsbConfig->PortUsb30HsioRx[Index].HsioFilterSelPEnable));
  45. DEBUG ((DEBUG_INFO, " PortUsb30HsioRx[%d].HsioFilterSelP = %x\n", Index, UsbConfig->PortUsb30HsioRx[Index].HsioFilterSelP));
  46. DEBUG ((DEBUG_INFO, " PortUsb30HsioRx[%d].HsioOlfpsCfgPullUpDwnResEnable = %x\n", Index, UsbConfig->PortUsb30HsioRx[Index].HsioOlfpsCfgPullUpDwnResEnable));
  47. DEBUG ((DEBUG_INFO, " PortUsb30HsioRx[%d].HsioOlfpsCfgPullUpDwnRes = %x\n", Index, UsbConfig->PortUsb30HsioRx[Index].HsioOlfpsCfgPullUpDwnRes));
  48. }
  49. DEBUG ((DEBUG_INFO, " XdciConfig.Enable= %x\n", UsbConfig->XdciConfig.Enable));
  50. }
  51. /**
  52. Print PCH_PCIE_CONFIG and serial out.
  53. @param[in] PcieConfig Pointer to a PCH_PCIE_CONFIG that provides the platform setting
  54. **/
  55. VOID
  56. PchPrintPcieConfig (
  57. IN CONST PCH_PCIE_CONFIG *PcieConfig
  58. )
  59. {
  60. UINT32 Index;
  61. DEBUG ((DEBUG_INFO, "------------------ PCH PCIE Config ------------------\n"));
  62. for (Index = 0; Index < GetPchMaxPciePortNum (); Index++) {
  63. DEBUG ((DEBUG_INFO, " RootPort[%d] HotPlug= %x\n", Index, PcieConfig->RootPort[Index].HotPlug));
  64. DEBUG ((DEBUG_INFO, " RootPort[%d] PmSci= %x\n", Index, PcieConfig->RootPort[Index].PmSci));
  65. DEBUG ((DEBUG_INFO, " RootPort[%d] ExtSync= %x\n", Index, PcieConfig->RootPort[Index].ExtSync));
  66. DEBUG ((DEBUG_INFO, " RootPort[%d] ClkReqDetect= %x\n", Index, PcieConfig->RootPort[Index].ClkReqDetect));
  67. DEBUG ((DEBUG_INFO, " RootPort[%d] UnsupportedRequestReport= %x\n", Index, PcieConfig->RootPort[Index].UnsupportedRequestReport));
  68. DEBUG ((DEBUG_INFO, " RootPort[%d] FatalErrorReport= %x\n", Index, PcieConfig->RootPort[Index].FatalErrorReport));
  69. DEBUG ((DEBUG_INFO, " RootPort[%d] NoFatalErrorReport= %x\n", Index, PcieConfig->RootPort[Index].NoFatalErrorReport));
  70. DEBUG ((DEBUG_INFO, " RootPort[%d] CorrectableErrorReport= %x\n", Index, PcieConfig->RootPort[Index].CorrectableErrorReport));
  71. DEBUG ((DEBUG_INFO, " RootPort[%d] SystemErrorOnFatalError= %x\n", Index, PcieConfig->RootPort[Index].SystemErrorOnFatalError));
  72. DEBUG ((DEBUG_INFO, " RootPort[%d] SystemErrorOnNonFatalError= %x\n", Index, PcieConfig->RootPort[Index].SystemErrorOnNonFatalError));
  73. DEBUG ((DEBUG_INFO, " RootPort[%d] SystemErrorOnCorrectableError= %x\n", Index, PcieConfig->RootPort[Index].SystemErrorOnCorrectableError));
  74. DEBUG ((DEBUG_INFO, " RootPort[%d] MaxPayload= %x\n", Index, PcieConfig->RootPort[Index].MaxPayload));
  75. DEBUG ((DEBUG_INFO, " RootPort[%d] SlotImplemented= %x\n", Index, PcieConfig->RootPort[Index].SlotImplemented));
  76. DEBUG ((DEBUG_INFO, " RootPort[%d] AcsEnabled= %x\n", Index, PcieConfig->RootPort[Index].AcsEnabled));
  77. DEBUG ((DEBUG_INFO, " RootPort[%d] PtmEnabled= %x\n", Index, PcieConfig->RootPort[Index].PtmEnabled));
  78. DEBUG ((DEBUG_INFO, " RootPort[%d] AdvancedErrorReporting= %x\n", Index, PcieConfig->RootPort[Index].AdvancedErrorReporting));
  79. DEBUG ((DEBUG_INFO, " RootPort[%d] TransmitterHalfSwing= %x\n", Index, PcieConfig->RootPort[Index].TransmitterHalfSwing));
  80. DEBUG ((DEBUG_INFO, " RootPort[%d] PcieSpeed= %x\n", Index, PcieConfig->RootPort[Index].PcieSpeed));
  81. DEBUG ((DEBUG_INFO, " RootPort[%d] Gen3EqPh3Method= %x\n", Index, PcieConfig->RootPort[Index].Gen3EqPh3Method));
  82. DEBUG ((DEBUG_INFO, " RootPort[%d] PhysicalSlotNumber= %x\n", Index, PcieConfig->RootPort[Index].PhysicalSlotNumber));
  83. DEBUG ((DEBUG_INFO, " RootPort[%d] CompletionTimeout= %x\n", Index, PcieConfig->RootPort[Index].CompletionTimeout));
  84. DEBUG ((DEBUG_INFO, " RootPort[%d] Aspm= %x\n", Index, PcieConfig->RootPort[Index].Aspm));
  85. DEBUG ((DEBUG_INFO, " RootPort[%d] L1Substates= %x\n", Index, PcieConfig->RootPort[Index].L1Substates));
  86. DEBUG ((DEBUG_INFO, " RootPort[%d] LtrEnable= %x\n", Index, PcieConfig->RootPort[Index].LtrEnable));
  87. DEBUG ((DEBUG_INFO, " RootPort[%d] LtrConfigLock= %x\n", Index, PcieConfig->RootPort[Index].LtrConfigLock));
  88. DEBUG ((DEBUG_INFO, " RootPort[%d] LtrMaxSnoopLatency= %x\n", Index, PcieConfig->RootPort[Index].LtrMaxSnoopLatency));
  89. DEBUG ((DEBUG_INFO, " RootPort[%d] LtrMaxNoSnoopLatency= %x\n", Index, PcieConfig->RootPort[Index].LtrMaxNoSnoopLatency));
  90. DEBUG ((DEBUG_INFO, " RootPort[%d] SnoopLatencyOverrideMode= %x\n", Index, PcieConfig->RootPort[Index].SnoopLatencyOverrideMode));
  91. DEBUG ((DEBUG_INFO, " RootPort[%d] SnoopLatencyOverrideMultiplier= %x\n", Index, PcieConfig->RootPort[Index].SnoopLatencyOverrideMultiplier));
  92. DEBUG ((DEBUG_INFO, " RootPort[%d] SnoopLatencyOverrideValue= %x\n", Index, PcieConfig->RootPort[Index].SnoopLatencyOverrideValue));
  93. DEBUG ((DEBUG_INFO, " RootPort[%d] NonSnoopLatencyOverrideMode= %x\n", Index, PcieConfig->RootPort[Index].NonSnoopLatencyOverrideMode));
  94. DEBUG ((DEBUG_INFO, " RootPort[%d] NonSnoopLatencyOverrideMultiplier= %x\n", Index, PcieConfig->RootPort[Index].NonSnoopLatencyOverrideMultiplier));
  95. DEBUG ((DEBUG_INFO, " RootPort[%d] NonSnoopLatencyOverrideValue= %x\n", Index, PcieConfig->RootPort[Index].NonSnoopLatencyOverrideValue));
  96. DEBUG ((DEBUG_INFO, " RootPort[%d] ForceLtrOverride= %x\n", Index, PcieConfig->RootPort[Index].ForceLtrOverride));
  97. DEBUG ((DEBUG_INFO, " RootPort[%d] DetectTimeoutMs= %x\n", Index, PcieConfig->RootPort[Index].DetectTimeoutMs));
  98. DEBUG ((DEBUG_INFO, " RootPort[%d] SlotPowerLimitScale= %x\n", Index, PcieConfig->RootPort[Index].SlotPowerLimitScale));
  99. DEBUG ((DEBUG_INFO, " RootPort[%d] SlotPowerLimitValue= %x\n", Index, PcieConfig->RootPort[Index].SlotPowerLimitValue));
  100. DEBUG ((DEBUG_INFO, " RootPort[%d] Uptp= %x\n", Index, PcieConfig->RootPort[Index].Uptp));
  101. DEBUG ((DEBUG_INFO, " RootPort[%d] Dptp= %x\n", Index, PcieConfig->RootPort[Index].Dptp));
  102. DEBUG ((DEBUG_INFO, " RootPort[%d] EnableCpm= %x\n", Index, PcieConfig->RootPort[Index].EnableCpm));
  103. }
  104. for (Index = 0; Index < GetPchMaxPcieClockNum (); Index++) {
  105. DEBUG ((DEBUG_INFO, " Clock[%d] Usage= %x\n", Index, PcieConfig->PcieClock[Index].Usage));
  106. DEBUG ((DEBUG_INFO, " Clock[%d] ClkReq= %x\n", Index, PcieConfig->PcieClock[Index].ClkReq));
  107. }
  108. for (Index = 0; Index < PCH_PCIE_SWEQ_COEFFS_MAX; Index++) {
  109. DEBUG ((DEBUG_INFO, " SwEqCoeffCm[%d] = %x\n", Index, PcieConfig->SwEqCoeffList[Index].Cm));
  110. DEBUG ((DEBUG_INFO, " SwEqCoeffCp[%d] = %x\n", Index, PcieConfig->SwEqCoeffList[Index].Cp));
  111. }
  112. DEBUG ((DEBUG_INFO, " EnablePort8xhDecode= %x\n", PcieConfig->EnablePort8xhDecode));
  113. DEBUG ((DEBUG_INFO, " PchPciePort8xhDecodePortIndex= %x\n", PcieConfig->PchPciePort8xhDecodePortIndex));
  114. DEBUG ((DEBUG_INFO, " DisableRootPortClockGating= %x\n", PcieConfig->DisableRootPortClockGating));
  115. DEBUG ((DEBUG_INFO, " EnablePeerMemoryWrite= %x\n", PcieConfig->EnablePeerMemoryWrite));
  116. DEBUG ((DEBUG_INFO, " ComplianceTestMode= %x\n", PcieConfig->ComplianceTestMode));
  117. DEBUG ((DEBUG_INFO, " RpFunctionSwap= %x\n", PcieConfig->RpFunctionSwap));
  118. DEBUG ((DEBUG_INFO, " PcieDeviceOverrideTablePtr= %x\n", PcieConfig->PcieDeviceOverrideTablePtr));
  119. }
  120. /**
  121. Print PCH_SATA_CONFIG and serial out.
  122. @param[in] SataCtrlIndex SATA controller index
  123. @param[in] SataConfig Pointer to a PCH_SATA_CONFIG that provides the platform setting
  124. **/
  125. VOID
  126. PchPrintSataConfig (
  127. IN UINT32 SataCtrlIndex,
  128. IN CONST PCH_SATA_CONFIG *SataConfig
  129. )
  130. {
  131. UINT32 Index;
  132. DEBUG ((DEBUG_INFO, "--------------- PCH SATA Config for controller %d -----------\n", SataCtrlIndex));
  133. DEBUG ((DEBUG_INFO, " Enable= %x\n", SataConfig->Enable));
  134. DEBUG ((DEBUG_INFO, " SataMode= %x\n", SataConfig->SataMode));
  135. for (Index = 0; Index < GetPchMaxSataPortNum (SataCtrlIndex); Index++) {
  136. DEBUG ((DEBUG_INFO, " PortSettings[%d] Enabled= %x\n", Index, SataConfig->PortSettings[Index].Enable));
  137. DEBUG ((DEBUG_INFO, " PortSettings[%d] HotPlug= %x\n", Index, SataConfig->PortSettings[Index].HotPlug));
  138. DEBUG ((DEBUG_INFO, " PortSettings[%d] InterlockSw= %x\n", Index, SataConfig->PortSettings[Index].InterlockSw));
  139. DEBUG ((DEBUG_INFO, " PortSettings[%d] External= %x\n", Index, SataConfig->PortSettings[Index].External));
  140. DEBUG ((DEBUG_INFO, " PortSettings[%d] SpinUp= %x\n", Index, SataConfig->PortSettings[Index].SpinUp));
  141. DEBUG ((DEBUG_INFO, " PortSettings[%d] SolidStateDrive= %x\n", Index, SataConfig->PortSettings[Index].SolidStateDrive));
  142. DEBUG ((DEBUG_INFO, " PortSettings[%d] DevSlp= %x\n", Index, SataConfig->PortSettings[Index].DevSlp));
  143. DEBUG ((DEBUG_INFO, " PortSettings[%d] EnableDitoConfig= %x\n", Index, SataConfig->PortSettings[Index].EnableDitoConfig));
  144. DEBUG ((DEBUG_INFO, " PortSettings[%d] DmVal= %x\n", Index, SataConfig->PortSettings[Index].DmVal));
  145. DEBUG ((DEBUG_INFO, " PortSettings[%d] DitoVal= %x\n", Index, SataConfig->PortSettings[Index].DitoVal));
  146. DEBUG ((DEBUG_INFO, " PortSettings[%d] ZpOdd= %x\n", Index, SataConfig->PortSettings[Index].ZpOdd));
  147. }
  148. DEBUG ((DEBUG_INFO, " RaidDeviceId= %x\n", SataConfig->Rst.RaidDeviceId));
  149. DEBUG ((DEBUG_INFO, " Sata interrupt mode = %x\n", SataConfig->Rst.SataRstInterrupt));
  150. DEBUG ((DEBUG_INFO, " Raid0= %x\n", SataConfig->Rst.Raid0));
  151. DEBUG ((DEBUG_INFO, " Raid1= %x\n", SataConfig->Rst.Raid1));
  152. DEBUG ((DEBUG_INFO, " Raid10= %x\n", SataConfig->Rst.Raid10));
  153. DEBUG ((DEBUG_INFO, " Raid5= %x\n", SataConfig->Rst.Raid5));
  154. DEBUG ((DEBUG_INFO, " Irrt= %x\n", SataConfig->Rst.Irrt));
  155. DEBUG ((DEBUG_INFO, " OromUiBanner= %x\n", SataConfig->Rst.OromUiBanner));
  156. DEBUG ((DEBUG_INFO, " OromUiDelay= %x\n", SataConfig->Rst.OromUiDelay));
  157. DEBUG ((DEBUG_INFO, " HddUnlock= %x\n", SataConfig->Rst.HddUnlock));
  158. DEBUG ((DEBUG_INFO, " LedLocate= %x\n", SataConfig->Rst.LedLocate));
  159. DEBUG ((DEBUG_INFO, " IrrtOnly= %x\n", SataConfig->Rst.IrrtOnly));
  160. DEBUG ((DEBUG_INFO, " SmartStorage= %x\n", SataConfig->Rst.SmartStorage));
  161. DEBUG ((DEBUG_INFO, " LegacyOrom= %x\n", SataConfig->Rst.LegacyOrom));
  162. DEBUG ((DEBUG_INFO, " OptaneMemory= %x\n", SataConfig->Rst.OptaneMemory));
  163. DEBUG ((DEBUG_INFO, " CpuAttachedStorage= %x\n", SataConfig->Rst.CpuAttachedStorage));
  164. DEBUG ((DEBUG_INFO, " SpeedSupport= %x\n", SataConfig->SpeedLimit));
  165. DEBUG ((DEBUG_INFO, " EsataSpeedLimit= %x\n", SataConfig->EsataSpeedLimit));
  166. DEBUG ((DEBUG_INFO, " LedEnable= %x\n", SataConfig->LedEnable));
  167. DEBUG ((DEBUG_INFO, " TestMode= %x\n", SataConfig->TestMode));
  168. DEBUG ((DEBUG_INFO, " SalpSupport= %x\n", SataConfig->SalpSupport));
  169. DEBUG ((DEBUG_INFO, " PwrOptEnable= %x\n", SataConfig->PwrOptEnable));
  170. for (Index = 0; Index < PCH_MAX_RST_PCIE_STORAGE_CR; Index++) {
  171. DEBUG ((DEBUG_INFO, " RstPcieStorageRemap[%d].Enable = %x\n", Index, SataConfig->RstPcieStorageRemap[Index].Enable));
  172. DEBUG ((DEBUG_INFO, " RstPcieStorageRemap[%d].RstPcieStoragePort = %x\n", Index, SataConfig->RstPcieStorageRemap[Index].RstPcieStoragePort));
  173. DEBUG ((DEBUG_INFO, " RstPcieStorageRemap[%d].DeviceResetDelay = %x\n", Index, SataConfig->RstPcieStorageRemap[Index].DeviceResetDelay));
  174. }
  175. DEBUG ((DEBUG_INFO, " ThermalThrottling P0T1M %x\n", SataConfig->ThermalThrottling.P0T1M));
  176. DEBUG ((DEBUG_INFO, " ThermalThrottling P0T2M %x\n", SataConfig->ThermalThrottling.P0T2M));
  177. DEBUG ((DEBUG_INFO, " ThermalThrottling P0T3M %x\n", SataConfig->ThermalThrottling.P0T3M));
  178. DEBUG ((DEBUG_INFO, " ThermalThrottling P0TDisp %x\n", SataConfig->ThermalThrottling.P0TDisp));
  179. DEBUG ((DEBUG_INFO, " ThermalThrottling P0Tinact %x\n", SataConfig->ThermalThrottling.P0Tinact));
  180. DEBUG ((DEBUG_INFO, " ThermalThrottling P0TDispFinit %x\n", SataConfig->ThermalThrottling.P0TDispFinit));
  181. DEBUG ((DEBUG_INFO, " ThermalThrottling P1T1M %x\n", SataConfig->ThermalThrottling.P1T1M));
  182. DEBUG ((DEBUG_INFO, " ThermalThrottling P1T2M %x\n", SataConfig->ThermalThrottling.P1T2M));
  183. DEBUG ((DEBUG_INFO, " ThermalThrottling P1T3M %x\n", SataConfig->ThermalThrottling.P1T3M));
  184. DEBUG ((DEBUG_INFO, " ThermalThrottling P1TDisp %x\n", SataConfig->ThermalThrottling.P1TDisp));
  185. DEBUG ((DEBUG_INFO, " ThermalThrottling P1Tinact %x\n", SataConfig->ThermalThrottling.P1Tinact));
  186. DEBUG ((DEBUG_INFO, " ThermalThrottling P1TDispFinit %x\n", SataConfig->ThermalThrottling.P1TDispFinit));
  187. DEBUG ((DEBUG_INFO, " ThermalThrottling SuggestedSetting %x\n", SataConfig->ThermalThrottling.SuggestedSetting));
  188. }
  189. /**
  190. Print PCH_IOAPIC_CONFIG and serial out.
  191. @param[in] IoApicConfig Pointer to a PCH_IOAPIC_CONFIG that provides the platform setting
  192. **/
  193. VOID
  194. PchPrintIoApicConfig (
  195. IN CONST PCH_IOAPIC_CONFIG *IoApicConfig
  196. )
  197. {
  198. DEBUG ((DEBUG_INFO, "------------------ PCH IOAPIC Config ------------------\n"));
  199. DEBUG ((DEBUG_INFO, " IoApicEntry24_119= %x\n", IoApicConfig->IoApicEntry24_119));
  200. DEBUG ((DEBUG_INFO, " Enable8254ClockGating= %x\n", IoApicConfig->Enable8254ClockGating));
  201. DEBUG ((DEBUG_INFO, " Enable8254ClockGatingOnS3= %x\n", IoApicConfig->Enable8254ClockGatingOnS3));
  202. DEBUG ((DEBUG_INFO, " IoApicId= %x\n", IoApicConfig->IoApicId));
  203. }
  204. /**
  205. Print PCH_LOCK_DOWN_CONFIG and serial out.
  206. @param[in] LockDownConfig Pointer to a PCH_LOCK_DOWN_CONFIG that provides the platform setting
  207. **/
  208. VOID
  209. PchPrintLockDownConfig (
  210. IN CONST PCH_LOCK_DOWN_CONFIG *LockDownConfig
  211. )
  212. {
  213. DEBUG ((DEBUG_INFO, "------------------ PCH Lock Down Config ------------------\n"));
  214. DEBUG ((DEBUG_INFO, " GlobalSmi= %x\n", LockDownConfig->GlobalSmi));
  215. DEBUG ((DEBUG_INFO, " BiosInterface= %x\n", LockDownConfig->BiosInterface));
  216. DEBUG ((DEBUG_INFO, " RtcMemoryLock= %x\n", LockDownConfig->RtcMemoryLock));
  217. DEBUG ((DEBUG_INFO, " BiosLock= %x\n", LockDownConfig->BiosLock));
  218. DEBUG ((DEBUG_INFO, " UnlockGpioPads= %x\n", LockDownConfig->UnlockGpioPads));
  219. }
  220. /**
  221. Print PCH_HDAUDIO_CONFIG and serial out.
  222. @param[in] HdaConfig Pointer to a PCH_HDAUDIO_CONFIG that provides the platform setting
  223. **/
  224. VOID
  225. PchPrintHdAudioConfig (
  226. IN CONST PCH_HDAUDIO_CONFIG *HdaConfig
  227. )
  228. {
  229. DEBUG ((DEBUG_INFO, "------------------ PCH HD-Audio Config ------------------\n"));
  230. DEBUG ((DEBUG_INFO, " DSP Enable = %x\n", HdaConfig->DspEnable));
  231. DEBUG ((DEBUG_INFO, " DSP UAA Compliance = %x\n", HdaConfig->DspUaaCompliance));
  232. DEBUG ((DEBUG_INFO, " iDisp Codec Disconnect = %x\n", HdaConfig->IDispCodecDisconnect));
  233. DEBUG ((DEBUG_INFO, " Pme = %x\n", HdaConfig->Pme));
  234. DEBUG ((DEBUG_INFO, " Codec Sx Wake Capability = %x\n", HdaConfig->CodecSxWakeCapability));
  235. DEBUG ((DEBUG_INFO, " VC Type = %x\n", HdaConfig->VcType));
  236. DEBUG ((DEBUG_INFO, " HD-A Link Frequency = %x\n", HdaConfig->HdAudioLinkFrequency));
  237. DEBUG ((DEBUG_INFO, " iDisp Link Frequency = %x\n", HdaConfig->IDispLinkFrequency));
  238. DEBUG ((DEBUG_INFO, " iDisp Link T-Mode = %x\n", HdaConfig->IDispLinkTmode));
  239. DEBUG ((DEBUG_INFO, " Audio Link: HDA Link = %x\n", HdaConfig->AudioLinkHda));
  240. DEBUG ((DEBUG_INFO, " Audio Link: DMIC#0 = %x\n", HdaConfig->AudioLinkDmic0));
  241. DEBUG ((DEBUG_INFO, " Audio Link: DMIC#1 = %x\n", HdaConfig->AudioLinkDmic1));
  242. DEBUG ((DEBUG_INFO, " Audio Link: SSP#0 = %x\n", HdaConfig->AudioLinkSsp0));
  243. DEBUG ((DEBUG_INFO, " Audio Link: SSP#1 = %x\n", HdaConfig->AudioLinkSsp1));
  244. DEBUG ((DEBUG_INFO, " Audio Link: SSP#2 = %x\n", HdaConfig->AudioLinkSsp1));
  245. DEBUG ((DEBUG_INFO, " Audio Link: SoundWire#1 = %x\n", HdaConfig->AudioLinkSndw1));
  246. DEBUG ((DEBUG_INFO, " Audio Link: SoundWire#2 = %x\n", HdaConfig->AudioLinkSndw2));
  247. DEBUG ((DEBUG_INFO, " Audio Link: SoundWire#3 = %x\n", HdaConfig->AudioLinkSndw3));
  248. DEBUG ((DEBUG_INFO, " Audio Link: SoundWire#4 = %x\n", HdaConfig->AudioLinkSndw4));
  249. DEBUG ((DEBUG_INFO, " SoundWire Buffer RCOMP = %x\n", HdaConfig->SndwBufferRcomp));
  250. DEBUG ((DEBUG_INFO, " ResetWaitTimer = %x\n", HdaConfig->ResetWaitTimer));
  251. DEBUG ((DEBUG_INFO, " VerbTableEntryNum = %x\n", HdaConfig->VerbTableEntryNum));
  252. DEBUG ((DEBUG_INFO, " VerbTablePtr = %x\n", HdaConfig->VerbTablePtr));
  253. }
  254. /**
  255. Print PCH_PM_CONFIG and serial out.
  256. @param[in] PmConfig Pointer to a PCH_PM_CONFIG that provides the platform setting
  257. **/
  258. VOID
  259. PchPrintPmConfig (
  260. IN CONST PCH_PM_CONFIG *PmConfig
  261. )
  262. {
  263. DEBUG ((DEBUG_INFO, "------------------ PCH PM Config ------------------\n"));
  264. DEBUG ((DEBUG_INFO, " WakeConfig PmeB0S5Dis = %x\n", PmConfig->WakeConfig.PmeB0S5Dis));
  265. DEBUG ((DEBUG_INFO, " WakeConfig WolEnableOverride = %x\n", PmConfig->WakeConfig.WolEnableOverride));
  266. DEBUG ((DEBUG_INFO, " WakeConfig LanWakeFromDeepSx = %x\n", PmConfig->WakeConfig.LanWakeFromDeepSx));
  267. DEBUG ((DEBUG_INFO, " WakeConfig PcieWakeFromDeepSx = %x\n", PmConfig->WakeConfig.PcieWakeFromDeepSx));
  268. DEBUG ((DEBUG_INFO, " WakeConfig WoWlanEnable = %x\n", PmConfig->WakeConfig.WoWlanEnable));
  269. DEBUG ((DEBUG_INFO, " WakeConfig WoWlanDeepSxEnable = %x\n", PmConfig->WakeConfig.WoWlanDeepSxEnable));
  270. DEBUG ((DEBUG_INFO, " PchDeepSxPol = %x\n", PmConfig->PchDeepSxPol));
  271. DEBUG ((DEBUG_INFO, " PchSlpS3MinAssert = %x\n", PmConfig->PchSlpS3MinAssert));
  272. DEBUG ((DEBUG_INFO, " PchSlpS4MinAssert = %x\n", PmConfig->PchSlpS4MinAssert));
  273. DEBUG ((DEBUG_INFO, " PchSlpSusMinAssert = %x\n", PmConfig->PchSlpSusMinAssert));
  274. DEBUG ((DEBUG_INFO, " PchSlpAMinAssert = %x\n", PmConfig->PchSlpAMinAssert));
  275. DEBUG ((DEBUG_INFO, " LpcClockRun = %x\n", PmConfig->LpcClockRun));
  276. DEBUG ((DEBUG_INFO, " SlpStrchSusUp = %x\n", PmConfig->SlpStrchSusUp));
  277. DEBUG ((DEBUG_INFO, " SlpLanLowDc = %x\n", PmConfig->SlpLanLowDc));
  278. DEBUG ((DEBUG_INFO, " PwrBtnOverridePeriod = %x\n", PmConfig->PwrBtnOverridePeriod));
  279. DEBUG ((DEBUG_INFO, " DisableEnergyReport = %x\n", PmConfig->DisableEnergyReport));
  280. DEBUG ((DEBUG_INFO, " DisableDsxAcPresentPulldown = %x\n", PmConfig->DisableDsxAcPresentPulldown));
  281. DEBUG ((DEBUG_INFO, " PchPwrCycDur = %x\n", PmConfig->PchPwrCycDur));
  282. DEBUG ((DEBUG_INFO, " PciePllSsc = %x\n", PmConfig->PciePllSsc));
  283. DEBUG ((DEBUG_INFO, " DisableNativePowerButton = %x\n", PmConfig->DisableNativePowerButton));
  284. DEBUG ((DEBUG_INFO, " SlpS0Enabled = %x\n", PmConfig->SlpS0Enable));
  285. DEBUG ((DEBUG_INFO, " MeWakeSts = %x\n", PmConfig->MeWakeSts));
  286. DEBUG ((DEBUG_INFO, " WolOvrWkSts = %x\n", PmConfig->WolOvrWkSts));
  287. DEBUG ((DEBUG_INFO, " EnableTcoTimer = %x\n", PmConfig->EnableTcoTimer));
  288. DEBUG ((DEBUG_INFO, " VrAlert = %x\n", PmConfig->VrAlert));
  289. DEBUG ((DEBUG_INFO, " PowerButtonDebounce = %x\n", PmConfig->PowerButtonDebounce));
  290. DEBUG ((DEBUG_INFO, " SlpS0VmRuntimeControl = %x\n", PmConfig->SlpS0VmRuntimeControl));
  291. DEBUG ((DEBUG_INFO, " SlpS0Vm070VSupport = %x\n", PmConfig->SlpS0Vm070VSupport));
  292. DEBUG ((DEBUG_INFO, " SlpS0Vm075VSupport = %x\n", PmConfig->SlpS0Vm075VSupport));
  293. DEBUG ((DEBUG_INFO, " SlpS0Override = %x\n", PmConfig->SlpS0Override));
  294. DEBUG ((DEBUG_INFO, " SlpS0DisQForDebug = %x\n", PmConfig->SlpS0DisQForDebug));
  295. DEBUG ((DEBUG_INFO, " PsOnEnable = %x\n", PmConfig->PsOnEnable));
  296. DEBUG ((DEBUG_INFO, " CpuC10GatePinEnable = %x\n", PmConfig->CpuC10GatePinEnable));
  297. DEBUG ((DEBUG_INFO, " PmcDbgMsgEn = %x\n", PmConfig->PmcDbgMsgEn));
  298. DEBUG ((DEBUG_INFO, " ModPhySusPgEnable = %x\n", PmConfig->ModPhySusPgEnable));
  299. DEBUG ((DEBUG_INFO, " SlpS0WithGbeSupport = %x\n", PmConfig->SlpS0WithGbeSupport));
  300. }
  301. /**
  302. Print PCH_DMI_CONFIG and serial out.
  303. @param[in] DmiConfig Pointer to a PCH_DMI_CONFIG that provides the platform setting
  304. **/
  305. VOID
  306. PchPrintDmiConfig (
  307. IN CONST PCH_DMI_CONFIG *DmiConfig
  308. )
  309. {
  310. DEBUG ((DEBUG_INFO, "------------------ PCH DMI Config ------------------\n"));
  311. DEBUG ((DEBUG_INFO, " PwrOptEnable= %x\n", DmiConfig->PwrOptEnable));
  312. DEBUG ((DEBUG_INFO, " DmiAspmCtrl= %x\n", DmiConfig->DmiAspmCtrl));
  313. }
  314. /**
  315. Print PCH_LPC_SIRQ_CONFIG and serial out.
  316. @param[in] SerialIrqConfig Pointer to a PCH_LPC_SIRQ_CONFIG that provides the platform setting
  317. **/
  318. VOID
  319. PchPrintSerialIrqConfig (
  320. IN CONST PCH_LPC_SIRQ_CONFIG *SerialIrqConfig
  321. )
  322. {
  323. DEBUG ((DEBUG_INFO, "------------------ PCH LPC SIRQ Config ------------------\n"));
  324. DEBUG ((DEBUG_INFO, " SirqEnable= %x\n", SerialIrqConfig->SirqEnable));
  325. DEBUG ((DEBUG_INFO, " SirqMode= %x\n", SerialIrqConfig->SirqMode));
  326. DEBUG ((DEBUG_INFO, " StartFramePulse= %x\n", SerialIrqConfig->StartFramePulse));
  327. }
  328. /**
  329. Print PCH_THERMAL_CONFIG and serial out.
  330. @param[in] ThermalConfig Pointer to a PCH_THERMAL_CONFIG that provides the platform setting
  331. **/
  332. VOID
  333. PchPrintThermalConfig (
  334. IN CONST PCH_THERMAL_CONFIG *ThermalConfig
  335. )
  336. {
  337. UINTN Index;
  338. DEBUG ((DEBUG_INFO, "------------------ PCH Thermal Config ------------------\n"));
  339. DEBUG ((DEBUG_INFO, " TsmicLock= %x\n", ThermalConfig->TsmicLock));
  340. DEBUG ((DEBUG_INFO, " TTLevels T0Level %x centigrade degree\n", ThermalConfig->TTLevels.T0Level));
  341. DEBUG ((DEBUG_INFO, " TTLevels T1Level %x centigrade degree\n", ThermalConfig->TTLevels.T1Level));
  342. DEBUG ((DEBUG_INFO, " TTLevels T2Level %x centigrade degree\n", ThermalConfig->TTLevels.T2Level));
  343. DEBUG ((DEBUG_INFO, " TTLevels TTEnable %x\n", ThermalConfig->TTLevels.TTEnable));
  344. DEBUG ((DEBUG_INFO, " TTLevels TTState13Enable %x\n", ThermalConfig->TTLevels.TTState13Enable));
  345. DEBUG ((DEBUG_INFO, " TTLevels TTLock %x\n", ThermalConfig->TTLevels.TTLock));
  346. DEBUG ((DEBUG_INFO, " TTLevels SuggestedSetting %x\n", ThermalConfig->TTLevels.SuggestedSetting));
  347. DEBUG ((DEBUG_INFO, " TTLevels PchCrossThrottling %x\n", ThermalConfig->TTLevels.PchCrossThrottling));
  348. DEBUG ((DEBUG_INFO, " DmiHaAWC DmiTsawEn %x\n", ThermalConfig->DmiHaAWC.DmiTsawEn));
  349. DEBUG ((DEBUG_INFO, " DmiHaAWC TS0TW %x\n", ThermalConfig->DmiHaAWC.TS0TW));
  350. DEBUG ((DEBUG_INFO, " DmiHaAWC TS1TW %x\n", ThermalConfig->DmiHaAWC.TS1TW));
  351. DEBUG ((DEBUG_INFO, " DmiHaAWC TS2TW %x\n", ThermalConfig->DmiHaAWC.TS2TW));
  352. DEBUG ((DEBUG_INFO, " DmiHaAWC TS3TW %x\n", ThermalConfig->DmiHaAWC.TS3TW));
  353. DEBUG ((DEBUG_INFO, " DmiHaAWC SuggestedSetting %x\n", ThermalConfig->DmiHaAWC.SuggestedSetting));
  354. DEBUG ((DEBUG_INFO, " MemoryThrottling Enable= %x\n", ThermalConfig->MemoryThrottling.Enable));
  355. for (Index = 0; Index < MaxTsGpioPin; Index++) {
  356. DEBUG ((DEBUG_INFO, " MemoryThrottling TsGpioPinSetting PmsyncEnable= %x\n", ThermalConfig->MemoryThrottling.TsGpioPinSetting[Index].PmsyncEnable));
  357. DEBUG ((DEBUG_INFO, " MemoryThrottling TsGpioPinSetting C0TransmitEnable= %x\n", ThermalConfig->MemoryThrottling.TsGpioPinSetting[Index].C0TransmitEnable));
  358. DEBUG ((DEBUG_INFO, " MemoryThrottling TsGpioPinSetting PinSelection= %x\n", ThermalConfig->MemoryThrottling.TsGpioPinSetting[Index].PinSelection));
  359. }
  360. DEBUG ((DEBUG_INFO, " PchHotEnable = %x\n", ThermalConfig->PchHotEnable));
  361. DEBUG ((DEBUG_INFO, " PchHotLevel = %x\n", ThermalConfig->PchHotLevel));
  362. }
  363. /**
  364. Print PCH_GENERAL_CONFIG and serial out.
  365. @param[in] PchGeneralConfig Pointer to a PCH_GENERAL_CONFIG that provides the platform setting
  366. **/
  367. VOID
  368. PchPrintGeneralConfig (
  369. IN CONST PCH_GENERAL_CONFIG *PchGeneralConfig
  370. )
  371. {
  372. DEBUG ((DEBUG_INFO, "------------------ PCH General Config ------------------\n"));
  373. DEBUG ((DEBUG_INFO, " Crid= %x\n", PchGeneralConfig->Crid));
  374. DEBUG ((DEBUG_INFO, " LegacyIoLowLatency = %x\n", PchGeneralConfig->LegacyIoLowLatency));
  375. }
  376. /**
  377. Print PCH_LAN_CONFIG and serial out.
  378. @param[in] LanConfig Pointer to a PCH_LAN_CONFIG that provides the platform setting
  379. **/
  380. VOID
  381. PchPrintLanConfig (
  382. IN CONST PCH_LAN_CONFIG *LanConfig
  383. )
  384. {
  385. DEBUG ((DEBUG_INFO, "------------------ PCH LAN Config ------------------\n"));
  386. DEBUG ((DEBUG_INFO, " Enable= %x\n", LanConfig->Enable));
  387. DEBUG ((DEBUG_INFO, " LtrEnable= %x\n", LanConfig->LtrEnable));
  388. }
  389. /**
  390. Print PCH_SERIAL_IO_CONFIG and serial out.
  391. @param[in] SerialIoConfig Pointer to a PCH_SERIAL_IO_CONFIG that provides the platform setting
  392. **/
  393. VOID
  394. PchPrintSerialIoConfig (
  395. IN CONST PCH_SERIAL_IO_CONFIG *SerialIoConfig
  396. )
  397. {
  398. UINTN Index;
  399. #ifndef MDEPKG_NDEBUG
  400. static UINT8 DeviceName[PCH_MAX_SERIALIO_CONTROLLERS][5] = {"I2C0","I2C1","I2C2","I2C3","I2C4","I2C5","SPI0","SPI1","SPI2","UA00","UA01","UA02"};
  401. #endif
  402. DEBUG ((DEBUG_INFO, "------------------ PCH Serial IO Config ------------------\n"));
  403. DEBUG_CODE_BEGIN ();
  404. for (Index = 0; Index < GetPchMaxSerialIoControllersNum (); Index++) {
  405. DEBUG ((DEBUG_INFO, " SerialIoController %a: Mode 0x%x\n", DeviceName[Index], SerialIoConfig->DevMode[Index]));
  406. }
  407. DEBUG_CODE_END ();
  408. for (Index = 0; Index < GetPchMaxSerialIoSpiControllersNum (); Index++) {
  409. DEBUG ((DEBUG_INFO, " SpiCsPolarity[%d] = 0x%x\n", Index, SerialIoConfig->SpiCsPolarity[Index]));
  410. }
  411. for (Index = 0; Index < GetPchMaxSerialIoUartControllersNum (); Index++) {
  412. DEBUG ((DEBUG_INFO, " UartHwFlowCtrl[%d] = 0x%x\n", Index, SerialIoConfig->UartHwFlowCtrl[Index]));
  413. }
  414. for (Index = 0; Index < GetPchMaxSerialIoI2cControllersNum (); Index ++) {
  415. DEBUG ((DEBUG_INFO, " I2cPadsTermination[%d] = 0x%x\n", Index, SerialIoConfig->I2cPadsTermination[Index]));
  416. }
  417. DEBUG ((DEBUG_INFO, " DebugUartNumber = 0x%x\n", SerialIoConfig->DebugUartNumber));
  418. DEBUG ((DEBUG_INFO, " EnableDebugUartAfterPost = 0x%x\n", SerialIoConfig->EnableDebugUartAfterPost));
  419. DEBUG ((DEBUG_INFO, " Uart0PinMuxing = 0x%x\n", SerialIoConfig->Uart0PinMuxing));
  420. }
  421. /**
  422. Print PCH_INTERRUPT_CONFIG and serial out
  423. @param[in] InterruptConfig Pointer to Interrupt Configuration structure
  424. **/
  425. VOID
  426. PchPrintInterruptConfig (
  427. IN CONST PCH_INTERRUPT_CONFIG *InterruptConfig
  428. )
  429. {
  430. UINTN Index;
  431. //
  432. // Print interrupt information
  433. //
  434. DEBUG ((DEBUG_INFO, "------------------ PCH Interrupt Config ------------------\n"));
  435. DEBUG ((DEBUG_INFO, " Interrupt assignment:\n"));
  436. DEBUG ((DEBUG_INFO, " Dxx:Fx INTx IRQ\n"));
  437. for (Index = 0; Index < InterruptConfig->NumOfDevIntConfig; Index++) {
  438. DEBUG ((DEBUG_INFO, " D%02d:F%d %d %03d\n",
  439. InterruptConfig->DevIntConfig[Index].Device,
  440. InterruptConfig->DevIntConfig[Index].Function,
  441. InterruptConfig->DevIntConfig[Index].IntX,
  442. InterruptConfig->DevIntConfig[Index].Irq));
  443. }
  444. DEBUG ((DEBUG_INFO, " Legacy PIC interrupt routing:\n"));
  445. DEBUG ((DEBUG_INFO, " PIRQx IRQx\n"));
  446. for (Index = 0; Index < PCH_MAX_PXRC_CONFIG; Index++) {
  447. DEBUG ((DEBUG_INFO, " PIRQ%c -> IRQ%d\n", Index + 65, InterruptConfig->PxRcConfig[Index]));
  448. }
  449. DEBUG ((DEBUG_INFO, " Other interrupt configuration:\n"));
  450. DEBUG ((DEBUG_INFO, " GpioIrqRoute= %d\n", InterruptConfig->GpioIrqRoute));
  451. DEBUG ((DEBUG_INFO, " SciIrqSelect= %d\n", InterruptConfig->SciIrqSelect));
  452. DEBUG ((DEBUG_INFO, " TcoIrqEnable= %d\n", InterruptConfig->TcoIrqEnable));
  453. DEBUG ((DEBUG_INFO, " TcoIrqSelect= %d\n", InterruptConfig->TcoIrqSelect));
  454. }
  455. /**
  456. Print PCH_SCS_CONFIG and serial out.
  457. @param[in] ScsConfig Pointer to a PCH_SCS_CONFIG that provides the platform setting
  458. **/
  459. VOID
  460. PchPrintScsConfig (
  461. IN CONST PCH_SCS_CONFIG *ScsConfig
  462. )
  463. {
  464. DEBUG ((DEBUG_INFO, "------------------ PCH SCS Config ------------------\n"));
  465. DEBUG ((DEBUG_INFO, " ScsEmmcEnabled = %x\n", ScsConfig->ScsEmmcEnabled));
  466. DEBUG ((DEBUG_INFO, " ScsSdcardEnabled = %x\n", ScsConfig->ScsSdcardEnabled));
  467. DEBUG ((DEBUG_INFO, " SdCardPowerEnableActiveHigh = %x\n", ScsConfig->SdCardPowerEnableActiveHigh));
  468. DEBUG ((DEBUG_INFO, " ScsUfsEnabled = %x\n", ScsConfig->ScsUfsEnabled));
  469. DEBUG ((DEBUG_INFO, " ScsEmmcHs400Enabled = %x\n", ScsConfig->ScsEmmcHs400Enabled));
  470. DEBUG ((DEBUG_INFO, " ScsEmmcHs400TuningRequired = %x\n", ScsConfig->ScsEmmcHs400TuningRequired));
  471. DEBUG ((DEBUG_INFO, " ScsEmmcHs400DllDataValid = %x\n", ScsConfig->ScsEmmcHs400DllDataValid));
  472. DEBUG ((DEBUG_INFO, " ScsEmmcHs400RxStrobeDll1 = %x\n", ScsConfig->ScsEmmcHs400RxStrobeDll1));
  473. DEBUG ((DEBUG_INFO, " ScsEmmcHs400TxDataDll = %x\n", ScsConfig->ScsEmmcHs400TxDataDll));
  474. DEBUG ((DEBUG_INFO, " ScsEmmcHs400DriverStrength = %x\n", ScsConfig->ScsEmmcHs400DriverStrength));
  475. }
  476. /**
  477. Print PCH_ISH_CONFIG and serial out.
  478. @param[in] IshConfig Pointer to a PCH_ISH_CONFIG that provides the platform setting
  479. **/
  480. VOID
  481. PchPrintIshConfig (
  482. IN CONST PCH_ISH_CONFIG *IshConfig
  483. )
  484. {
  485. DEBUG ((DEBUG_INFO, "------------------ PCH ISH Config ------------------\n"));
  486. DEBUG ((DEBUG_INFO, " SPI GPIO Assigned = %x\n", IshConfig->SpiGpioAssign));
  487. DEBUG ((DEBUG_INFO, " UART0 GPIO Assigned = %x\n", IshConfig->Uart0GpioAssign));
  488. DEBUG ((DEBUG_INFO, " UART1 GPIO Assigned = %x\n", IshConfig->Uart1GpioAssign));
  489. DEBUG ((DEBUG_INFO, " I2C0 GPIO Assigned = %x\n", IshConfig->I2c0GpioAssign));
  490. DEBUG ((DEBUG_INFO, " I2C1 GPIO Assigned = %x\n", IshConfig->I2c1GpioAssign));
  491. DEBUG ((DEBUG_INFO, " I2C2 GPIO Assigned = %x\n", IshConfig->I2c2GpioAssign));
  492. DEBUG ((DEBUG_INFO, " GP_0 GPIO Assigned = %x\n", IshConfig->Gp0GpioAssign));
  493. DEBUG ((DEBUG_INFO, " GP_1 GPIO Assigned = %x\n", IshConfig->Gp1GpioAssign));
  494. DEBUG ((DEBUG_INFO, " GP_2 GPIO Assigned = %x\n", IshConfig->Gp2GpioAssign));
  495. DEBUG ((DEBUG_INFO, " GP_3 GPIO Assigned = %x\n", IshConfig->Gp3GpioAssign));
  496. DEBUG ((DEBUG_INFO, " GP_4 GPIO Assigned = %x\n", IshConfig->Gp4GpioAssign));
  497. DEBUG ((DEBUG_INFO, " GP_5 GPIO Assigned = %x\n", IshConfig->Gp5GpioAssign));
  498. DEBUG ((DEBUG_INFO, " GP_6 GPIO Assigned = %x\n", IshConfig->Gp6GpioAssign));
  499. DEBUG ((DEBUG_INFO, " GP_7 GPIO Assigned = %x\n", IshConfig->Gp7GpioAssign));
  500. }
  501. /**
  502. Print PCH_FLASH_PROTECTION_CONFIG and serial out.
  503. @param[in] FlashProtectConfig Pointer to a PCH_FLASH_PROTECTION_CONFIG that provides the platform setting
  504. **/
  505. VOID
  506. PchPrintFlashProtectionConfig (
  507. IN CONST PCH_FLASH_PROTECTION_CONFIG *FlashProtectConfig
  508. )
  509. {
  510. UINT32 Index;
  511. DEBUG ((DEBUG_INFO, "------------------ PCH Flash Protection Config ------------------\n"));
  512. for (Index = 0; Index < PCH_FLASH_PROTECTED_RANGES; ++Index) {
  513. DEBUG ((DEBUG_INFO, " WriteProtectionEnable[%d] = %x\n", Index, FlashProtectConfig->ProtectRange[Index].WriteProtectionEnable));
  514. DEBUG ((DEBUG_INFO, " ReadProtectionEnable[%d] = %x\n", Index, FlashProtectConfig->ProtectRange[Index].ReadProtectionEnable));
  515. DEBUG ((DEBUG_INFO, " ProtectedRangeLimit[%d] = %x\n", Index, FlashProtectConfig->ProtectRange[Index].ProtectedRangeLimit));
  516. DEBUG ((DEBUG_INFO, " ProtectedRangeBase[%d] = %x\n", Index, FlashProtectConfig->ProtectRange[Index].ProtectedRangeBase));
  517. }
  518. }
  519. /**
  520. Print PCH_P2SB_CONFIG and serial out.
  521. @param[in] P2sbConfig Pointer to a PCH_P2SB_CONFIG that provides the platform setting
  522. **/
  523. VOID
  524. PchPrintP2sbConfig (
  525. IN CONST PCH_P2SB_CONFIG *P2sbConfig
  526. )
  527. {
  528. DEBUG ((DEBUG_INFO, "------------------ PCH P2SB Config ------------------\n"));
  529. DEBUG ((DEBUG_INFO, "SbAccessUnlock= %x\n", P2sbConfig->SbAccessUnlock));
  530. }
  531. /**
  532. Print PCH_ESPI_CONFIG.
  533. @param[in] EspiConfig Pointer to a PCH_ESPI_CONFIG that provides the eSPI setting
  534. **/
  535. VOID
  536. PchPrintEspiConfig (
  537. IN CONST PCH_ESPI_CONFIG *EspiConfig
  538. )
  539. {
  540. DEBUG ((DEBUG_INFO, "------------------ PCH eSPI Config ------------------\n"));
  541. DEBUG ((DEBUG_INFO, " LGMR Enable %x\n", EspiConfig->LgmrEnable));
  542. DEBUG ((DEBUG_INFO, " BME for Master and Slave Enabled %x\n", EspiConfig->BmeMasterSlaveEnabled));
  543. }
  544. /**
  545. Print PCH_CNVI_CONFIG.
  546. @param[in] CnviConfig Pointer to a PCH_CNVI_CONFIG that provides the CNVi settings
  547. **/
  548. VOID
  549. PchPrintCnviConfig (
  550. IN CONST PCH_CNVI_CONFIG *CnviConfig
  551. )
  552. {
  553. DEBUG ((DEBUG_INFO, "------------------ PCH CNVi Config ------------------\n"));
  554. DEBUG ((DEBUG_INFO, "CNVi Mode = %x\n", CnviConfig->Mode));
  555. DEBUG ((DEBUG_INFO, "CNVi MfUart1 type = %x\n", CnviConfig->MfUart1Type));
  556. }
  557. /**
  558. Print PCH_HSIO_CONFIG.
  559. @param[in] HsioConfig Pointer to a PCH_HSIO_CONFIG that provides the eSPI setting
  560. **/
  561. VOID
  562. PchPrintHsioConfig (
  563. IN CONST PCH_HSIO_CONFIG *HsioConfig
  564. )
  565. {
  566. PCH_HSIO_VER_INFO *BiosChipsetInitVerInfoPtr;
  567. DEBUG ((DEBUG_INFO, "------------------ PCH HSIO Config ------------------\n"));
  568. DEBUG ((DEBUG_INFO, " ChipsetInit Binary Pointer = %x\n", HsioConfig->ChipsetInitBinPtr));
  569. DEBUG ((DEBUG_INFO, " ChipsetInit Binary Length = %x\n", HsioConfig->ChipsetInitBinLen));
  570. BiosChipsetInitVerInfoPtr = (PCH_HSIO_VER_INFO *) HsioConfig->ChipsetInitBinPtr;
  571. if (HsioConfig->ChipsetInitBinPtr && HsioConfig->ChipsetInitBinLen) {
  572. DEBUG ((DEBUG_INFO, " ChipsetInit Binary Base CRC = %x\n", BiosChipsetInitVerInfoPtr->BaseCrc));
  573. DEBUG ((DEBUG_INFO, " ChipsetInit Binary OEM CRC = %x\n", BiosChipsetInitVerInfoPtr->OemCrc));
  574. DEBUG ((DEBUG_INFO, " ChipsetInit Binary SUS CRC = %x\n", BiosChipsetInitVerInfoPtr->SusCrc));
  575. DEBUG ((DEBUG_INFO, " ChipsetInit Binary Version = %x\n", BiosChipsetInitVerInfoPtr->Version));
  576. DEBUG ((DEBUG_INFO, " ChipsetInit Binary Product = %x\n", BiosChipsetInitVerInfoPtr->Product));
  577. DEBUG ((DEBUG_INFO, " ChipsetInit Binary Metal Layer = %x\n", BiosChipsetInitVerInfoPtr->MetalLayer));
  578. DEBUG ((DEBUG_INFO, " ChipsetInit Binary Base Layer = %x\n", BiosChipsetInitVerInfoPtr->BaseLayer));
  579. DEBUG ((DEBUG_INFO, " ChipsetInit Binary OEM Version = %x\n", BiosChipsetInitVerInfoPtr->OemVersion));
  580. DEBUG ((DEBUG_INFO, " ChipsetInit Binary Debug Mode = %x\n", BiosChipsetInitVerInfoPtr->DebugMode));
  581. DEBUG ((DEBUG_INFO, " ChipsetInit Binary OEM CRC Valid = %x\n", BiosChipsetInitVerInfoPtr->OemCrcValid));
  582. DEBUG ((DEBUG_INFO, " ChipsetInit Binary SUS CRC Valid = %x\n", BiosChipsetInitVerInfoPtr->SusCrcValid));
  583. DEBUG ((DEBUG_INFO, " ChipsetInit Binary Base CRC Valid = %x\n", BiosChipsetInitVerInfoPtr->BaseCrcValid));
  584. }
  585. }
  586. /**
  587. Print whole PCH config blocks and serial out.
  588. @param[in] SiPolicyPpi The RC Policy PPI instance
  589. **/
  590. VOID
  591. EFIAPI
  592. PchPrintPolicyPpi (
  593. IN SI_POLICY_PPI *SiPolicyPpi
  594. )
  595. {
  596. DEBUG_CODE_BEGIN();
  597. EFI_STATUS Status;
  598. PCH_GENERAL_CONFIG *PchGeneralConfig;
  599. PCH_PCIE_CONFIG *PcieRpConfig;
  600. PCH_SATA_CONFIG *SataConfig;
  601. PCH_IOAPIC_CONFIG *IoApicConfig;
  602. PCH_DMI_CONFIG *DmiConfig;
  603. PCH_FLASH_PROTECTION_CONFIG *FlashProtectionConfig;
  604. PCH_HDAUDIO_CONFIG *HdAudioConfig;
  605. PCH_INTERRUPT_CONFIG *InterruptConfig;
  606. PCH_ISH_CONFIG *IshConfig;
  607. PCH_LAN_CONFIG *LanConfig;
  608. PCH_P2SB_CONFIG *P2sbConfig;
  609. PCH_LOCK_DOWN_CONFIG *LockDownConfig;
  610. PCH_PM_CONFIG *PmConfig;
  611. PCH_SCS_CONFIG *ScsConfig;
  612. PCH_SERIAL_IO_CONFIG *SerialIoConfig;
  613. PCH_LPC_SIRQ_CONFIG *SerialIrqConfig;
  614. PCH_THERMAL_CONFIG *ThermalConfig;
  615. USB_CONFIG *UsbConfig;
  616. PCH_ESPI_CONFIG *EspiConfig;
  617. PCH_CNVI_CONFIG *CnviConfig;
  618. PCH_HSIO_CONFIG *HsioConfig;
  619. UINT32 SataCtrlIndex;
  620. Status = GetConfigBlock ((VOID *) SiPolicyPpi, &gPchGeneralConfigGuid, (VOID *) &PchGeneralConfig);
  621. ASSERT_EFI_ERROR (Status);
  622. Status = GetConfigBlock ((VOID *) SiPolicyPpi, &gPcieRpConfigGuid, (VOID *) &PcieRpConfig);
  623. ASSERT_EFI_ERROR (Status);
  624. Status = GetConfigBlock ((VOID *) SiPolicyPpi, &gIoApicConfigGuid, (VOID *) &IoApicConfig);
  625. ASSERT_EFI_ERROR (Status);
  626. Status = GetConfigBlock ((VOID *) SiPolicyPpi, &gDmiConfigGuid, (VOID *) &DmiConfig);
  627. ASSERT_EFI_ERROR (Status);
  628. Status = GetConfigBlock ((VOID *) SiPolicyPpi, &gFlashProtectionConfigGuid, (VOID *) &FlashProtectionConfig);
  629. ASSERT_EFI_ERROR (Status);
  630. Status = GetConfigBlock ((VOID *) SiPolicyPpi, &gHdAudioConfigGuid, (VOID *) &HdAudioConfig);
  631. ASSERT_EFI_ERROR (Status);
  632. Status = GetConfigBlock ((VOID *) SiPolicyPpi, &gInterruptConfigGuid, (VOID *) &InterruptConfig);
  633. ASSERT_EFI_ERROR (Status);
  634. Status = GetConfigBlock ((VOID *) SiPolicyPpi, &gIshConfigGuid, (VOID *) &IshConfig);
  635. ASSERT_EFI_ERROR (Status);
  636. Status = GetConfigBlock ((VOID *) SiPolicyPpi, &gLanConfigGuid, (VOID *) &LanConfig);
  637. ASSERT_EFI_ERROR (Status);
  638. Status = GetConfigBlock ((VOID *) SiPolicyPpi, &gLockDownConfigGuid, (VOID *) &LockDownConfig);
  639. ASSERT_EFI_ERROR (Status);
  640. Status = GetConfigBlock ((VOID *) SiPolicyPpi, &gP2sbConfigGuid, (VOID *) &P2sbConfig);
  641. ASSERT_EFI_ERROR (Status);
  642. Status = GetConfigBlock ((VOID *) SiPolicyPpi, &gPmConfigGuid, (VOID *) &PmConfig);
  643. ASSERT_EFI_ERROR (Status);
  644. Status = GetConfigBlock ((VOID *) SiPolicyPpi, &gScsConfigGuid, (VOID *) &ScsConfig);
  645. ASSERT_EFI_ERROR (Status);
  646. Status = GetConfigBlock ((VOID *) SiPolicyPpi, &gSerialIoConfigGuid, (VOID *) &SerialIoConfig);
  647. ASSERT_EFI_ERROR (Status);
  648. Status = GetConfigBlock ((VOID *) SiPolicyPpi, &gSerialIrqConfigGuid, (VOID *) &SerialIrqConfig);
  649. ASSERT_EFI_ERROR (Status);
  650. Status = GetConfigBlock ((VOID *) SiPolicyPpi, &gThermalConfigGuid, (VOID *) &ThermalConfig);
  651. ASSERT_EFI_ERROR (Status);
  652. Status = GetConfigBlock ((VOID *) SiPolicyPpi, &gUsbConfigGuid, (VOID *) &UsbConfig);
  653. ASSERT_EFI_ERROR (Status);
  654. Status = GetConfigBlock ((VOID *) SiPolicyPpi, &gEspiConfigGuid, (VOID *) &EspiConfig);
  655. ASSERT_EFI_ERROR (Status);
  656. Status = GetConfigBlock ((VOID *) SiPolicyPpi, &gCnviConfigGuid, (VOID *) &CnviConfig);
  657. ASSERT_EFI_ERROR (Status);
  658. Status = GetConfigBlock ((VOID *) SiPolicyPpi, &gHsioConfigGuid, (VOID *) &HsioConfig);
  659. ASSERT_EFI_ERROR (Status);
  660. DEBUG ((DEBUG_INFO, "------------------------ PCH Print Policy Start ------------------------\n"));
  661. DEBUG ((DEBUG_INFO, " Revision= %x\n", SiPolicyPpi->TableHeader.Header.Revision));
  662. PchPrintGeneralConfig (PchGeneralConfig);
  663. PchPrintPcieConfig (PcieRpConfig);
  664. for (SataCtrlIndex = 0; SataCtrlIndex < GetPchMaxSataControllerNum (); SataCtrlIndex++) {
  665. SataConfig = GetPchSataConfig (SiPolicyPpi, SataCtrlIndex);
  666. PchPrintSataConfig (SataCtrlIndex, SataConfig);
  667. }
  668. PchPrintUsbConfig (UsbConfig);
  669. PchPrintIoApicConfig (IoApicConfig);
  670. PchPrintHdAudioConfig (HdAudioConfig);
  671. PchPrintLanConfig (LanConfig);
  672. PchPrintLockDownConfig (LockDownConfig);
  673. PchPrintThermalConfig (ThermalConfig);
  674. PchPrintPmConfig (PmConfig);
  675. PchPrintDmiConfig (DmiConfig);
  676. PchPrintSerialIrqConfig (SerialIrqConfig);
  677. PchPrintSerialIoConfig (SerialIoConfig);
  678. PchPrintInterruptConfig (InterruptConfig);
  679. PchPrintScsConfig (ScsConfig);
  680. PchPrintIshConfig (IshConfig);
  681. PchPrintFlashProtectionConfig (FlashProtectionConfig);
  682. PchPrintP2sbConfig (P2sbConfig);
  683. PchPrintEspiConfig (EspiConfig);
  684. PchPrintCnviConfig (CnviConfig);
  685. PchPrintHsioConfig (HsioConfig);
  686. DEBUG ((DEBUG_INFO, "------------------------ PCH Print Platform Protocol End --------------------------\n"));
  687. DEBUG_CODE_END();
  688. }