PchPcieSmiDispatch.h 4.9 KB

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  1. /** @file
  2. APIs of PCH PCIE SMI Dispatch Protocol.
  3. Copyright (c) 2019 Intel Corporation. All rights reserved. <BR>
  4. SPDX-License-Identifier: BSD-2-Clause-Patent
  5. **/
  6. #ifndef _PCH_PCIE_SMI_DISPATCH_PROTOCOL_H_
  7. #define _PCH_PCIE_SMI_DISPATCH_PROTOCOL_H_
  8. //
  9. // Extern the GUID for protocol users.
  10. //
  11. extern EFI_GUID gPchPcieSmiDispatchProtocolGuid;
  12. //
  13. // Forward reference for ANSI C compatibility
  14. //
  15. typedef struct _PCH_PCIE_SMI_DISPATCH_PROTOCOL PCH_PCIE_SMI_DISPATCH_PROTOCOL;
  16. //
  17. // Member functions
  18. //
  19. typedef struct {
  20. UINT8 RpIndex; ///< Root port index (0-based), 0: RP1, 1: RP2, n: RP(N+1)
  21. UINT8 BusNum; ///< Root port pci bus number
  22. UINT8 DevNum; ///< Root port pci device number
  23. UINT8 FuncNum; ///< Root port pci function number
  24. } PCH_PCIE_SMI_RP_CONTEXT;
  25. /**
  26. Callback function for an PCH PCIE RP SMI handler dispatch.
  27. @param[in] DispatchHandle The unique handle assigned to this handler by register function.
  28. @param[in] RpContext Pointer of PCH PCIE Root Port context.
  29. **/
  30. typedef
  31. VOID
  32. (EFIAPI *PCH_PCIE_SMI_RP_DISPATCH_CALLBACK) (
  33. IN EFI_HANDLE DispatchHandle,
  34. IN PCH_PCIE_SMI_RP_CONTEXT *RpContext
  35. );
  36. /**
  37. Register a child SMI source dispatch function for PCH PCIERP SMI events.
  38. @param[in] This Protocol instance pointer.
  39. @param[in] DispatchFunction Pointer to dispatch function to be invoked for
  40. this SMI source
  41. @param[in] RpIndex Refer to PCH PCIE Root Port index.
  42. 0: RP1, 1: RP2, n: RP(N+1)
  43. @param[out] DispatchHandle Handle of dispatch function, for when interfacing
  44. with the parent SMM driver.
  45. @retval EFI_SUCCESS The dispatch function has been successfully
  46. registered and the SMI source has been enabled.
  47. @retval EFI_DEVICE_ERROR The driver was unable to enable the SMI source.
  48. @retval EFI_OUT_OF_RESOURCES Not enough memory (system or SMM) to manage this child.
  49. @retval EFI_ACCESS_DENIED Return access denied if the EndOfDxe event has been triggered
  50. **/
  51. typedef
  52. EFI_STATUS
  53. (EFIAPI *PCH_PCIE_SMI_RP_DISPATCH_REGISTER) (
  54. IN PCH_PCIE_SMI_DISPATCH_PROTOCOL *This,
  55. IN PCH_PCIE_SMI_RP_DISPATCH_CALLBACK DispatchFunction,
  56. IN UINTN RpIndex,
  57. OUT EFI_HANDLE *DispatchHandle
  58. );
  59. /**
  60. Unregister a child SMI source dispatch function with a parent PCIE SMM driver
  61. @param[in] This Protocol instance pointer.
  62. @param[in] DispatchHandle Handle of dispatch function to deregister.
  63. @retval EFI_SUCCESS The dispatch function has been successfully
  64. unregistered and the SMI source has been disabled
  65. if there are no other registered child dispatch
  66. functions for this SMI source.
  67. @retval EFI_INVALID_PARAMETER Handle is invalid.
  68. @retval EFI_ACCESS_DENIED Return access denied if the EndOfDxe event has been triggered
  69. **/
  70. typedef
  71. EFI_STATUS
  72. (EFIAPI *PCH_PCIE_SMI_DISPATCH_UNREGISTER) (
  73. IN PCH_PCIE_SMI_DISPATCH_PROTOCOL *This,
  74. IN EFI_HANDLE DispatchHandle
  75. );
  76. /**
  77. Interface structure for PCH PCIE SMIs Dispatch Protocol
  78. The PCH PCIE SMI DISPATCH PROTOCOL provides the ability to dispatch function for PCH PCIE related SMIs.
  79. It contains SMI types of HotPlug, LinkActive, and Link EQ.
  80. **/
  81. struct _PCH_PCIE_SMI_DISPATCH_PROTOCOL {
  82. /**
  83. This member specifies the revision of this structure. This field is used to
  84. indicate backwards compatible changes to the protocol.
  85. **/
  86. UINT8 Revision;
  87. /**
  88. Smi unregister function for PCH PCIE SMI DISPATCH PROTOCOL.
  89. **/
  90. PCH_PCIE_SMI_DISPATCH_UNREGISTER UnRegister;
  91. /**
  92. PcieRpXHotPlug
  93. The event is triggered when PCIE root port Hot-Plug Presence Detect.
  94. **/
  95. PCH_PCIE_SMI_RP_DISPATCH_REGISTER HotPlugRegister;
  96. /**
  97. PcieRpXLinkActive
  98. The event is triggered when Hot-Plug Link Active State Changed.
  99. **/
  100. PCH_PCIE_SMI_RP_DISPATCH_REGISTER LinkActiveRegister;
  101. /**
  102. PcieRpXLinkEq
  103. The event is triggered when Device Requests Software Link Equalization.
  104. **/
  105. PCH_PCIE_SMI_RP_DISPATCH_REGISTER LinkEqRegister;
  106. };
  107. /**
  108. PCH PCIE SMI dispatch revision number
  109. Revision 1: Initial version
  110. **/
  111. #define PCH_PCIE_SMI_DISPATCH_REVISION 1
  112. #endif