PeiCpuPolicyLibPreMem.c 5.4 KB

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  1. /** @file
  2. This file is PeiCpuPolicyLibPreMem library.
  3. Copyright (c) 2019 - 2020 Intel Corporation. All rights reserved. <BR>
  4. SPDX-License-Identifier: BSD-2-Clause-Patent
  5. **/
  6. #include "PeiCpuPolicyLibrary.h"
  7. #include <Library/PciSegmentLib.h>
  8. #include <Library/PostCodeLib.h>
  9. #include <Library/SaPlatformLib.h>
  10. /**
  11. Load Config block default
  12. @param[in] ConfigBlockPointer Pointer to config block
  13. **/
  14. VOID
  15. LoadCpuSecurityPreMemConfigDefault (
  16. IN VOID *ConfigBlockPointer
  17. )
  18. {
  19. }
  20. /**
  21. Load Config block default
  22. @param[in] ConfigBlockPointer Pointer to config block
  23. **/
  24. VOID
  25. LoadCpuConfigLibPreMemConfigDefault (
  26. IN VOID *ConfigBlockPointer
  27. )
  28. {
  29. CPU_GENERATION CpuGeneration;
  30. CPU_CONFIG_LIB_PREMEM_CONFIG *CpuConfigLibPreMemConfig;
  31. CPU_FAMILY CpuFamily;
  32. CPU_SKU CpuSku;
  33. BOOLEAN PegDisabled;
  34. UINT64 MchBar;
  35. UINT64 SaPciBase;
  36. CpuConfigLibPreMemConfig = ConfigBlockPointer;
  37. CpuFamily = GetCpuFamily();
  38. CpuSku = GetCpuSku();
  39. DEBUG ((DEBUG_INFO, "CpuConfigLibPreMemConfig->Header.GuidHob.Name = %g\n", &CpuConfigLibPreMemConfig->Header.GuidHob.Name));
  40. DEBUG ((DEBUG_INFO, "CpuConfigLibPreMemConfig->Header.GuidHob.Header.HobLength = 0x%x\n", CpuConfigLibPreMemConfig->Header.GuidHob.Header.HobLength));
  41. /********************************
  42. CPU Config Lib PreMem configuration
  43. ********************************/
  44. CpuConfigLibPreMemConfig->HyperThreading = CPU_FEATURE_ENABLE;
  45. CpuConfigLibPreMemConfig->BootFrequency = 1; // Maximum non-turbo Performance
  46. CpuConfigLibPreMemConfig->ActiveCoreCount = 0; // All cores active
  47. CpuConfigLibPreMemConfig->JtagC10PowerGateDisable = CPU_FEATURE_DISABLE;
  48. CpuConfigLibPreMemConfig->BistOnReset = CPU_FEATURE_DISABLE;
  49. CpuConfigLibPreMemConfig->VmxEnable = CPU_FEATURE_ENABLE;
  50. CpuConfigLibPreMemConfig->CpuRatio = (RShiftU64 (AsmReadMsr64 (MSR_PLATFORM_INFO), N_PLATFORM_INFO_MAX_RATIO) & B_PLATFORM_INFO_RATIO_MASK);
  51. CpuGeneration = GetCpuGeneration();
  52. if(CpuGeneration == EnumCflCpu){
  53. ///
  54. /// FCLK Frequency
  55. ///
  56. SaPciBase = PCI_SEGMENT_LIB_ADDRESS (SA_SEG_NUM, SA_MC_BUS, SA_MC_DEV, SA_MC_FUN, 0);
  57. PciSegmentReadBuffer (SaPciBase + R_SA_MCHBAR, sizeof (MchBar), &MchBar);
  58. MchBar &= ((UINT64) ~BIT0);
  59. if (IsPchLinkDmi (CpuFamily) && (PciSegmentRead16 (PCI_SEGMENT_LIB_ADDRESS (SA_SEG_NUM, SA_PEG_BUS_NUM, SA_PEG_DEV_NUM, SA_PEG0_FUN_NUM, PCI_VENDOR_ID_OFFSET)) != 0xFFFF)) {
  60. PegDisabled = MmioRead32 ((UINTN) MchBar + R_SA_MCHBAR_BIOS_RESET_CPL_OFFSET) & BIT3;
  61. } else {
  62. PegDisabled = 1;
  63. }
  64. ///
  65. /// DT/Halo FCLK = 1GHz
  66. /// Ulx/Ult FCLK = 800MHz
  67. ///
  68. if (((CpuSku == EnumCpuHalo) && (!PegDisabled)) || (CpuSku == EnumCpuTrad)) {
  69. CpuConfigLibPreMemConfig->FClkFrequency = 1; // 1Ghz
  70. }
  71. else {
  72. CpuConfigLibPreMemConfig->FClkFrequency = 0; // 800MHz
  73. }
  74. ///
  75. /// Disable Peci Reset on C10 exit on CFL based CPU's
  76. /// Setting to 1 will activate the message that disables peci reset.
  77. ///
  78. CpuConfigLibPreMemConfig->PeciC10Reset = 1;
  79. }
  80. }
  81. /**
  82. Load Overclocking pre-mem Config block default
  83. @param[in] ConfigBlockPointer Pointer to config block
  84. **/
  85. VOID
  86. LoadCpuOverclockingPreMemConfigDefault (
  87. IN VOID *ConfigBlockPointer
  88. )
  89. {
  90. CPU_OVERCLOCKING_PREMEM_CONFIG *CpuOverclockingPreMemConfig;
  91. CpuOverclockingPreMemConfig = ConfigBlockPointer;
  92. /********************************
  93. CPU Overclocking PreMem configuration
  94. ********************************/
  95. DEBUG ((DEBUG_INFO, "CpuOverclockingPreMemConfig->Header.GuidHob.Name = %g\n", &CpuOverclockingPreMemConfig->Header.GuidHob.Name));
  96. DEBUG ((DEBUG_INFO, "CpuOverclockingPreMemConfig->Header.GuidHob.Header.HobLength = 0x%x\n", CpuOverclockingPreMemConfig->Header.GuidHob.Header.HobLength));
  97. }
  98. static COMPONENT_BLOCK_ENTRY mCpuIpBlocksPreMem [] = {
  99. {&gCpuConfigLibPreMemConfigGuid, sizeof (CPU_CONFIG_LIB_PREMEM_CONFIG), CPU_CONFIG_LIB_PREMEM_CONFIG_REVISION, LoadCpuConfigLibPreMemConfigDefault},
  100. {&gCpuOverclockingPreMemConfigGuid, sizeof (CPU_OVERCLOCKING_PREMEM_CONFIG), CPU_OVERCLOCKING_CONFIG_REVISION, LoadCpuOverclockingPreMemConfigDefault},
  101. };
  102. /**
  103. Get CPU PREMEM config block table total size.
  104. @retval Size of CPU PREMEM config block table
  105. **/
  106. UINT16
  107. EFIAPI
  108. CpuGetPreMemConfigBlockTotalSize (
  109. VOID
  110. )
  111. {
  112. return GetComponentConfigBlockTotalSize (&mCpuIpBlocksPreMem[0], sizeof (mCpuIpBlocksPreMem) / sizeof (COMPONENT_BLOCK_ENTRY));
  113. }
  114. /**
  115. CpuAddPreMemConfigBlocks add all CPU PREMEM config blocks.
  116. @param[in] ConfigBlockTableAddress The pointer to add CPU PREMEM config blocks
  117. @retval EFI_SUCCESS The policy default is initialized.
  118. @retval EFI_OUT_OF_RESOURCES Insufficient resources to create buffer
  119. **/
  120. EFI_STATUS
  121. EFIAPI
  122. CpuAddPreMemConfigBlocks (
  123. IN VOID *ConfigBlockTableAddress
  124. )
  125. {
  126. EFI_STATUS Status;
  127. DEBUG((DEBUG_INFO, "CPU Pre-Mem Entry \n"));
  128. PostCode (0xC00);
  129. Status = AddComponentConfigBlocks (ConfigBlockTableAddress, &mCpuIpBlocksPreMem[0], sizeof (mCpuIpBlocksPreMem) / sizeof (COMPONENT_BLOCK_ENTRY));
  130. DEBUG((DEBUG_INFO, "CpuAddPreMemConfigBlocks Done \n"));
  131. PostCode (0xC0F);
  132. return Status;
  133. }