OpenBoardPkgPcd.dsc 25 KB

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  1. ## @file
  2. # PCD configuration build description file for the Aspire VN7-572G board.
  3. #
  4. # Copyright (c) 2017 - 2022, Intel Corporation. All rights reserved.<BR>
  5. #
  6. # SPDX-License-Identifier: BSD-2-Clause-Patent
  7. #
  8. ##
  9. ################################################################################
  10. #
  11. # Pcd Section - list of all PCD Entries used by this board.
  12. #
  13. ################################################################################
  14. # TODO: Harden and tune platform by PCDs
  15. # TODO: Consider removing PCDs declared by build report to be unused (but confirm first)
  16. # - Also, consider more "fixed" and more "dynamic"/"patchable"
  17. [PcdsFixedAtBuild.common]
  18. ######################################
  19. # Key Boot Stage and FSP configuration
  20. ######################################
  21. #
  22. # Please select the Boot Stage here.
  23. # Stage 1 - enable debug (system deadloop after debug init)
  24. # Stage 2 - mem init (system deadloop after mem init)
  25. # Stage 3 - boot to shell only
  26. # Stage 4 - boot to OS
  27. # Stage 5 - boot to OS with security boot enabled
  28. # Stage 6 - boot with advanced features enabled
  29. #
  30. gMinPlatformPkgTokenSpaceGuid.PcdBootStage|6
  31. #
  32. # 0: FSP Wrapper is running in Dispatch mode.
  33. # 1: FSP Wrapper is running in API mode.
  34. #
  35. gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection|0
  36. #
  37. # FALSE: The board is not a FSP wrapper (FSP binary not used)
  38. # TRUE: The board is a FSP wrapper (FSP binary is used)
  39. #
  40. gMinPlatformPkgTokenSpaceGuid.PcdFspWrapperBootMode|TRUE
  41. #
  42. # FALSE: The PEI Main included in FvPreMemory is used to dispatch all PEIMs
  43. # (both inside FSP and outside FSP).
  44. # Pros:
  45. # * PEI Main is re-built from source and is always the latest version
  46. # * Platform code can link any desired LibraryClass to PEI Main
  47. # (Ex: Custom DebugLib instance, SerialPortLib, etc.)
  48. # Cons:
  49. # * The PEI Main being used to execute FSP PEIMs is not the PEI Main
  50. # that the FSP PEIMs were tested with, adding risk of breakage.
  51. # * Two copies of PEI Main will exist in the final binary,
  52. # #1 in FSP-M, #2 in FvPreMemory. The copy in FSP-M is never
  53. # executed, wasting space.
  54. #
  55. # <b>TRUE</b>: The PEI Main included in FSP is used to dispatch all PEIMs
  56. # (both inside FSP and outside FSP). PEI Main will not be included in
  57. # FvPreMemory. This is the default and is the recommended choice.
  58. #
  59. gMinPlatformPkgTokenSpaceGuid.PcdFspDispatchModeUseFspPeiMain|TRUE
  60. #
  61. # FSP Base address PCD will be updated in FDF basing on flash map.
  62. #
  63. gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress|0
  64. gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress|0
  65. gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamBase|0xFEF00000
  66. gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamSize|0x00040000
  67. gSiPkgTokenSpaceGuid.PcdTemporaryRamBase|0xFEF80000
  68. gSiPkgTokenSpaceGuid.PcdTemporaryRamSize|0x00040000
  69. gSiPkgTokenSpaceGuid.PcdTsegSize|0x0800000 # Now hooked up
  70. !if gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection == 1
  71. #
  72. # FSP API mode does not share stack with the boot loader,
  73. # so FSP needs more temporary memory for FSP heap + stack size.
  74. #
  75. gIntelFsp2PkgTokenSpaceGuid.PcdFspTemporaryRamSize|0x28000 # FIXME: Confirm matches UPD default
  76. #
  77. # FSP API mode does not need to enlarge the boot loader stack size
  78. # since the stacks are separate.
  79. #
  80. gSiPkgTokenSpaceGuid.PcdPeiTemporaryRamStackSize|0x20000 # Not hooked up, not used (functionally equivalent and equal to UefiCpuPkg)
  81. !else
  82. #
  83. # In FSP Dispatch mode boot loader stack size must be large
  84. # enough for executing both boot loader and FSP.
  85. #
  86. gSiPkgTokenSpaceGuid.PcdPeiTemporaryRamStackSize|0x40000 # Not hooked up, not used (functionally equivalent but NOT equal to UefiCpuPkg)
  87. !endif
  88. !if (gMinPlatformPkgTokenSpaceGuid.PcdFspWrapperBootMode == FALSE) || (gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection == 1)
  89. gSiPkgTokenSpaceGuid.PcdSiPciExpressBaseAddress|gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress
  90. gSiPkgTokenSpaceGuid.PcdSiPciExpressRegionLength|gMinPlatformPkgTokenSpaceGuid.PcdPciExpressRegionLength
  91. !else
  92. #
  93. # FSP Dispatch mode requires more platform memory as boot loader and FSP sharing the same
  94. # platform memory.
  95. #
  96. gSiPkgTokenSpaceGuid.PcdPeiMinMemorySize|0x5500000
  97. !endif
  98. [PcdsFeatureFlag.common]
  99. ######################################
  100. # Edk2 Configuration
  101. ######################################
  102. gEfiMdeModulePkgTokenSpaceGuid.PcdPeiCoreImageLoaderSearchTeSectionFirst|FALSE
  103. gEfiMdeModulePkgTokenSpaceGuid.PcdInstallAcpiSdtProtocol|TRUE
  104. gEfiMdeModulePkgTokenSpaceGuid.PcdConOutUgaSupport|FALSE # Deprecated, only use GOP
  105. gEfiMdePkgTokenSpaceGuid.PcdUgaConsumeSupport|FALSE
  106. gEfiMdeModulePkgTokenSpaceGuid.PcdPs2KbdExtendedVerification|FALSE
  107. gEfiMdeModulePkgTokenSpaceGuid.PcdPs2MouseExtendedVerification|FALSE # TODO/TEST
  108. gEfiMdeModulePkgTokenSpaceGuid.PcdHiiOsRuntimeSupport|FALSE
  109. gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmEnableBspElection|FALSE
  110. gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmProfileEnable|FALSE
  111. # TODO: Prune this list to relevant features only
  112. !if gMinPlatformPkgTokenSpaceGuid.PcdBootStage >= 6
  113. # FIXME: SMM path also PatchAndLoadAcpiTable()
  114. gAcpiDebugFeaturePkgTokenSpaceGuid.PcdAcpiDebugFeatureEnable |FALSE
  115. # PcdIpmiFeatureEnable will not be enabled (no BMC)
  116. # TODO: Can be build-time (user) choice
  117. gNetworkFeaturePkgTokenSpaceGuid.PcdNetworkFeatureEnable |FALSE
  118. # TODO: Continue developing support. Broken at present.
  119. # - PeiSmmAccessLib in IntelSiliconPkg seems like a stub
  120. # - May require a PeiSmmControlLib to SMM communicate
  121. gS3FeaturePkgTokenSpaceGuid.PcdS3FeatureEnable |FALSE
  122. # TODO: Definitions (now added SmbiosDxe)
  123. gSmbiosFeaturePkgTokenSpaceGuid.PcdSmbiosFeatureEnable |TRUE
  124. # Requires actual hook-up
  125. gUsb3DebugFeaturePkgTokenSpaceGuid.PcdUsb3DebugFeatureEnable |FALSE
  126. # FIXME: (Similar) DXE module is duplicate?
  127. gUserAuthFeaturePkgTokenSpaceGuid.PcdUserAuthenticationFeatureEnable |FALSE
  128. # FIXME: Must BootLogoEnableLogo() to turn platform logo into boot logo
  129. # - BGRT must be BMP, but this duplicates FSP logo. Can GetSectionFromAnyFv()?
  130. gLogoFeaturePkgTokenSpaceGuid.PcdLogoFeatureEnable |FALSE
  131. gLogoFeaturePkgTokenSpaceGuid.PcdJpgEnable |FALSE
  132. !endif
  133. ######################################
  134. # Silicon Configuration
  135. ######################################
  136. # TODO: Set FSP policy by switches? Otherwise, only FSP binary builds?
  137. # Build switches
  138. gSiPkgTokenSpaceGuid.PcdOptimizeCompilerEnable|TRUE
  139. # CPU
  140. gSiPkgTokenSpaceGuid.PcdBiosGuardEnable|TRUE
  141. gSiPkgTokenSpaceGuid.PcdSourceDebugEnable|FALSE
  142. gSiPkgTokenSpaceGuid.PcdTxtEnable|FALSE
  143. # SA
  144. gSiPkgTokenSpaceGuid.PcdIgdEnable|TRUE
  145. gSiPkgTokenSpaceGuid.PcdPegEnable|TRUE
  146. gSiPkgTokenSpaceGuid.PcdSgEnable|TRUE
  147. gSiPkgTokenSpaceGuid.PcdSaDmiEnable|TRUE
  148. gSiPkgTokenSpaceGuid.PcdSkycamEnable|TRUE
  149. gSiPkgTokenSpaceGuid.PcdGmmEnable|TRUE
  150. gSiPkgTokenSpaceGuid.PcdSaOcEnable|TRUE
  151. gSiPkgTokenSpaceGuid.PcdVtdEnable|TRUE
  152. gSiPkgTokenSpaceGuid.PcdPeiDisplayEnable|TRUE
  153. # ME
  154. gSiPkgTokenSpaceGuid.PcdAmtEnable|TRUE
  155. gSiPkgTokenSpaceGuid.PcdAtaEnable|TRUE
  156. gSiPkgTokenSpaceGuid.PcdPttEnable|FALSE
  157. gSiPkgTokenSpaceGuid.PcdJhiEnable|TRUE
  158. # Others
  159. gSiPkgTokenSpaceGuid.PcdAcpiEnable|TRUE
  160. gSiPkgTokenSpaceGuid.PcdBdatEnable|TRUE
  161. gSiPkgTokenSpaceGuid.PcdBootGuardEnable|TRUE
  162. gSiPkgTokenSpaceGuid.PcdCpuPowerOnConfigEnable|TRUE
  163. gSiPkgTokenSpaceGuid.PcdEvLoaderEnable|FALSE
  164. gSiPkgTokenSpaceGuid.PcdIntegratedTouchEnable|TRUE
  165. gSiPkgTokenSpaceGuid.PcdOcWdtEnable|TRUE
  166. gSiPkgTokenSpaceGuid.PcdOverclockEnable|TRUE
  167. gSiPkgTokenSpaceGuid.PcdPpmEnable|TRUE
  168. gSiPkgTokenSpaceGuid.PcdS3Enable|TRUE
  169. gSiPkgTokenSpaceGuid.PcdSerialGpioEnable|TRUE
  170. gSiPkgTokenSpaceGuid.PcdSiCatalogDebugEnable|$(RELEASE_LOGGING)
  171. gSiPkgTokenSpaceGuid.PcdSiCsmEnable|FALSE
  172. gSiPkgTokenSpaceGuid.PcdSmbiosEnable|TRUE
  173. gSiPkgTokenSpaceGuid.PcdSmmVariableEnable|TRUE
  174. gSiPkgTokenSpaceGuid.PcdSoftwareGuardEnable|TRUE
  175. gSiPkgTokenSpaceGuid.PcdSsaFlagEnable|FALSE
  176. gSiPkgTokenSpaceGuid.PcdTraceHubEnable|TRUE
  177. ######################################
  178. # Platform Configuration
  179. ######################################
  180. #
  181. # MinPlatform common include for required feature PCD
  182. # These PCD must be set before the core include files, CoreCommonLib,
  183. # CorePeiLib, and CoreDxeLib.
  184. # Optional MinPlatformPkg features should be enabled after this
  185. #
  186. !include MinPlatformPkg/Include/Dsc/MinPlatformFeaturesPcd.dsc.inc
  187. #
  188. # Commonly used MinPlatform feature configuration logic that maps functionity to stage
  189. #
  190. !include BoardModulePkg/Include/Dsc/CommonStageConfig.dsc.inc
  191. ######################################
  192. # Board Configuration
  193. ######################################
  194. gKabylakeOpenBoardPkgTokenSpaceGuid.PcdMultiBoardSupport|FALSE
  195. gKabylakeOpenBoardPkgTokenSpaceGuid.PcdTbtEnable|FALSE # TODO: Enable if supporting Newgate
  196. [PcdsFixedAtBuild.common]
  197. ######################################
  198. # Edk2 Configuration
  199. ######################################
  200. !if $(TARGET) == RELEASE
  201. !if $(RELEASE_LOGGING) == TRUE
  202. !if $(TESTING) == TRUE
  203. gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x07
  204. !else
  205. gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x03
  206. !endif # $(TESTING)
  207. gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x07
  208. !else
  209. gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x0
  210. gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x3
  211. !endif # $(RELEASE_LOGGING)
  212. !else
  213. # FIXME: More than just compiler optimisation is hooked to DEBUG builds.
  214. # Make asserts non-fatal for limited debugging system
  215. gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x0F
  216. gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x07
  217. !endif # $(TARGET)
  218. !if gMinPlatformPkgTokenSpaceGuid.PcdPerformanceEnable == TRUE
  219. gEfiMdePkgTokenSpaceGuid.PcdPerformanceLibraryPropertyMask|0x1
  220. gEfiMdeModulePkgTokenSpaceGuid.PcdMaxPeiPerformanceLogEntries|140
  221. !endif
  222. gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xE0000000
  223. gIntelSiliconPkgTokenSpaceGuid.PcdAcpiBaseAddress|0x1800
  224. gEfiMdeModulePkgTokenSpaceGuid.PcdAriSupport|FALSE
  225. gEfiMdeModulePkgTokenSpaceGuid.PcdBrowserFieldTextColor|0x01
  226. gEfiMdeModulePkgTokenSpaceGuid.PcdBrowserSubtitleTextColor|0x0
  227. gEfiMdeModulePkgTokenSpaceGuid.PcdCpuStackGuard|TRUE
  228. gEfiMdeModulePkgTokenSpaceGuid.PcdFastPS2Detection|TRUE # TODO/TEST
  229. gEfiMdeModulePkgTokenSpaceGuid.PcdHwErrStorageSize|0x00000800
  230. gEfiMdeModulePkgTokenSpaceGuid.PcdLoadModuleAtFixAddressEnable|$(TOP_MEMORY_ADDRESS)
  231. gEfiMdeModulePkgTokenSpaceGuid.PcdMaxHardwareErrorVariableSize|0x400
  232. gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x8000
  233. !if $(TESTING) == TRUE
  234. # Test with non-stop mode, so not disabling for loader.
  235. gEfiMdeModulePkgTokenSpaceGuid.PcdNullPointerDetectionPropertyMask|0x43
  236. !else
  237. # FIXME: Can be broken for CSM. At this time, be permissive for loader.
  238. gEfiMdeModulePkgTokenSpaceGuid.PcdNullPointerDetectionPropertyMask|0x83
  239. !endif
  240. gEfiMdeModulePkgTokenSpaceGuid.PcdReclaimVariableSpaceAtEndOfDxe|TRUE
  241. gEfiMdeModulePkgTokenSpaceGuid.PcdSetNxForStack|TRUE
  242. gEfiMdeModulePkgTokenSpaceGuid.PcdSrIovSupport|FALSE
  243. gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseMemory|FALSE
  244. !if $(TARGET) == RELEASE
  245. gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseSerial|FALSE
  246. !else
  247. gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseSerial|TRUE
  248. gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseHardwareFlowControl|FALSE
  249. !endif
  250. # UPDs are updated at runtime, don't bother measuring
  251. # BUGBUG: FSP-S measurement returns DEVICE_ERROR from PtpCrbTpmCommand() - Step 0.
  252. # - Similarly, Tcg2Dxe.c:Tpm2GetCapabilityManufactureID() - first command - fails?
  253. gIntelFsp2WrapperTokenSpaceGuid.PcdFspMeasurementConfig|0x00000006
  254. gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoBarEnableMask|0x80
  255. gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciBarRegisterOffset|0x40
  256. gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciBusNumber|0x0
  257. gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciDeviceNumber|0x1F
  258. gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciEnableRegisterOffset|0x44
  259. gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciFunctionNumber|0x2
  260. gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPortBaseAddress|0x1800
  261. gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPortBaseAddressMask|0xFFFC
  262. gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiPm1TmrOffset|0x08
  263. # Specifies timeout value in microseconds for the BSP to detect all APs for the first time.
  264. gUefiCpuPkgTokenSpaceGuid.PcdCpuApInitTimeOutInMicroSeconds|1000
  265. gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmApSyncTimeout|10000
  266. gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStackSize|0x20000
  267. !if (gMinPlatformPkgTokenSpaceGuid.PcdFspWrapperBootMode == FALSE) || (gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection == 1)
  268. #
  269. # In non-FSP build (EDK2 build) or FSP API mode below PCD are FixedAtBuild
  270. # (They will be DynamicEx in FSP Dispatch mode)
  271. #
  272. ## Specifies max supported number of Logical Processors.
  273. # @Prompt Configure max supported number of Logical Processors
  274. gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber|8
  275. ## Specifies the size of the microcode Region.
  276. # @Prompt Microcode Region size.
  277. gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize|0
  278. ## Specifies the AP wait loop state during POST phase.
  279. # The value is defined as below.
  280. # 1: Place AP in the Hlt-Loop state.
  281. # 2: Place AP in the Mwait-Loop state.
  282. # 3: Place AP in the Run-Loop state.
  283. # @Prompt The AP wait loop state.
  284. gUefiCpuPkgTokenSpaceGuid.PcdCpuApLoopMode|2
  285. !endif
  286. ######################################
  287. # Silicon Configuration
  288. ######################################
  289. # Refer to HstiFeatureBit.h for bit definitions
  290. gSiPkgTokenSpaceGuid.PcdHstiIhvFeature1|0xF2 # FIXME: Boot Guard and BIOS Guard not present, measured boot enforcement checking code not present
  291. gSiPkgTokenSpaceGuid.PcdHstiIhvFeature2|0x07
  292. #
  293. # Set the location of the DUTY_CYCLE field in the P_CNT register
  294. # and indicate the width of the clock duty cycle to OS power management
  295. #
  296. gMinPlatformPkgTokenSpaceGuid.PcdFadtDutyOffset|0x1
  297. gMinPlatformPkgTokenSpaceGuid.PcdFadtDutyWidth|0x3
  298. ######################################
  299. # Platform Configuration
  300. ######################################
  301. gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuSocketCount|1
  302. gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuCoreCount|4
  303. gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuThreadCount|2
  304. gMinPlatformPkgTokenSpaceGuid.PcdPciExpressRegionLength|0x10000000
  305. #
  306. # The PCDs are used to control the Windows SMM Security Mitigations Table - Protection Flags
  307. #
  308. # BIT0: If set, expresses that for all synchronous SMM entries,SMM will validate that input and output buffers lie entirely within the expected fixed memory regions.
  309. # BIT1: If set, expresses that for all synchronous SMM entries, SMM will validate that input and output pointers embedded within the fixed communication buffer only refer to address ranges \
  310. # that lie entirely within the expected fixed memory regions.
  311. # BIT2: Firmware setting this bit is an indication that it will not allow reconfiguration of system resources via non-architectural mechanisms.
  312. # BIT3-31: Reserved
  313. #
  314. gMinPlatformPkgTokenSpaceGuid.PcdWsmtProtectionFlags|0x07
  315. ## This PCD is to control which device is the potential trusted console input device.<BR><BR>
  316. # For example:<BR>
  317. # PS/2 keyboard: PciRoot(0x0)/Pci(0x1F,0x0)/Acpi(PNP0303,0x0)<BR>
  318. # //Header HID UID<BR>
  319. # {0x02, 0x01, 0x0C, 0x00, 0xd0, 0x41, 0x03, 0x0A, 0x00, 0x00, 0x00, 0x00,<BR>
  320. # //Header Func Dev<BR>
  321. # 0x01, 0x01, 0x06, 0x00, 0x00, 0x1F,<BR>
  322. # //Header HID UID<BR>
  323. # 0x02, 0x01, 0x0C, 0x00, 0xd0, 0x41, 0x03, 0x03, 0x00, 0x00, 0x00, 0x00,<BR>
  324. # //Header<BR>
  325. # 0x7F, 0xFF, 0x04, 0x00}<BR>
  326. gMinPlatformPkgTokenSpaceGuid.PcdTrustedConsoleInputDevicePath|{0x02, 0x01, 0x0C, 0x00, 0xd0, 0x41, 0x03, 0x0A, 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x06, 0x00, 0x00, 0x1F, 0x02, 0x01, 0x0C, 0x00, 0xd0, 0x41, 0x03, 0x03, 0x00, 0x00, 0x00, 0x00, 0x7F, 0xFF, 0x04, 0x00}
  327. !if $(TARGET) == RELEASE
  328. gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiReservedMemorySize|0x800
  329. !else
  330. gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiReservedMemorySize|0x188B # TODO
  331. !endif
  332. # TODO: Consider using reserved space instead for debug log
  333. gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiRtDataMemorySize|0x200
  334. !if $(TARGET) == RELEASE
  335. gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiRtCodeMemorySize|0x70
  336. !else
  337. gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiRtCodeMemorySize|0xE0
  338. !endif
  339. !if gMinPlatformPkgTokenSpaceGuid.PcdBootStage == 1
  340. gMinPlatformPkgTokenSpaceGuid.PcdTestPointIbvPlatformFeature|{0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
  341. !endif
  342. !if gMinPlatformPkgTokenSpaceGuid.PcdBootStage == 2
  343. gMinPlatformPkgTokenSpaceGuid.PcdTestPointIbvPlatformFeature|{0x03, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
  344. !endif
  345. !if gMinPlatformPkgTokenSpaceGuid.PcdBootStage == 3
  346. gMinPlatformPkgTokenSpaceGuid.PcdTestPointIbvPlatformFeature|{0x03, 0x07, 0x03, 0x05, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
  347. !endif
  348. !if gMinPlatformPkgTokenSpaceGuid.PcdBootStage == 4
  349. gMinPlatformPkgTokenSpaceGuid.PcdTestPointIbvPlatformFeature|{0x03, 0x07, 0x03, 0x05, 0x3F, 0x00, 0x0F, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
  350. !endif
  351. !if gMinPlatformPkgTokenSpaceGuid.PcdBootStage == 5
  352. gMinPlatformPkgTokenSpaceGuid.PcdTestPointIbvPlatformFeature|{0x03, 0x0F, 0x07, 0x1F, 0x3F, 0x0F, 0x0F, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
  353. !endif
  354. !if gMinPlatformPkgTokenSpaceGuid.PcdBootStage >= 6
  355. gMinPlatformPkgTokenSpaceGuid.PcdTestPointIbvPlatformFeature|{0x03, 0x0F, 0x07, 0x1F, 0x3F, 0x0F, 0x0F, 0x07, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
  356. !endif
  357. ######################################
  358. # Board Configuration
  359. ######################################
  360. gBoardModulePkgTokenSpaceGuid.PcdPs2KbMsEnable|1
  361. gBoardModulePkgTokenSpaceGuid.PcdSuperIoPciIsaBridgeDevice|{0x00, 0x00, 0x1F, 0x00}
  362. gKabylakeOpenBoardPkgTokenSpaceGuid.PcdGttMmAddress|0xDF000000
  363. ## Specifies the DDC I2C channel to claim as the HDMI debug port
  364. # The value is defined as below.
  365. # 2: DDC channel B
  366. # 3: DDC channel C
  367. # 4: DDC channel D
  368. # @Prompt DDC I2C channel to claim as the HDMI debug port
  369. gKabylakeOpenBoardPkgTokenSpaceGuid.PcdI2cHdmiDebugPortDdcI2cChannel|0x00 #@todo - Set to correct value for VN7-572G
  370. [PcdsFixedAtBuild.IA32]
  371. ######################################
  372. # Edk2 Configuration
  373. ######################################
  374. gIntelFsp2PkgTokenSpaceGuid.PcdGlobalDataPointerAddress|0xFED00148
  375. gIntelFsp2WrapperTokenSpaceGuid.PcdPeiMinMemSize|0x3800000
  376. ######################################
  377. # Platform Configuration
  378. ######################################
  379. gMinPlatformPkgTokenSpaceGuid.PcdPeiPhaseStackTop|0xA0000
  380. [PcdsFixedAtBuild.X64]
  381. ######################################
  382. # Edk2 Configuration
  383. ######################################
  384. # Default platform supported RFC 4646 languages: (American) English
  385. gEfiMdePkgTokenSpaceGuid.PcdUefiVariableDefaultPlatformLangCodes|"en-US"
  386. [PcdsPatchableInModule.common]
  387. ######################################
  388. # Edk2 Configuration
  389. ######################################
  390. gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x80000046 # 0x804800C7/0x806A15CF give useful information, but is very noisy
  391. ######################################
  392. # Silicon Configuration
  393. ######################################
  394. !if $(TARGET) == DEBUG
  395. gSiPkgTokenSpaceGuid.PcdSerialIoUartDebugEnable|1
  396. !endif
  397. ######################################
  398. # Platform Configuration
  399. ######################################
  400. !if $(TARGET) == DEBUG
  401. gMinPlatformPkgTokenSpaceGuid.PcdSecSerialPortDebugEnable|1
  402. !else
  403. gMinPlatformPkgTokenSpaceGuid.PcdSecSerialPortDebugEnable|0
  404. !endif
  405. [PcdsDynamicDefault]
  406. ######################################
  407. # Edk2 Configuration
  408. ######################################
  409. gEfiMdeModulePkgTokenSpaceGuid.PcdAtaSmartEnable|TRUE # Why dynamic?
  410. gEfiMdeModulePkgTokenSpaceGuid.PcdConInConnectOnDemand|FALSE # Why dynamic?
  411. gEfiMdeModulePkgTokenSpaceGuid.PcdConOutColumn|0x0
  412. gEfiMdeModulePkgTokenSpaceGuid.PcdConOutRow|0x0
  413. gEfiMdeModulePkgTokenSpaceGuid.PcdS3BootScriptTablePrivateDataPtr|0x0
  414. #
  415. # Set video to native resolution as Windows 8 WHCK requirement.
  416. #
  417. gEfiMdeModulePkgTokenSpaceGuid.PcdVideoHorizontalResolution|0x0
  418. gEfiMdeModulePkgTokenSpaceGuid.PcdVideoVerticalResolution|0x0
  419. gEfiSecurityPkgTokenSpaceGuid.PcdTcg2HashAlgorithmBitmap|0
  420. gEfiSecurityPkgTokenSpaceGuid.PcdTpm2HashMask|0x0000001F
  421. gEfiSecurityPkgTokenSpaceGuid.PcdTpmInitializationPolicy|1
  422. gEfiSecurityPkgTokenSpaceGuid.PcdTpmInstanceGuid|{0x5a, 0xf2, 0x6b, 0x28, 0xc3, 0xc2, 0x8c, 0x40, 0xb3, 0xb4, 0x25, 0xe6, 0x75, 0x8b, 0x73, 0x17}
  423. #
  424. # FSP Base address PCD will be updated in FDF basing on flash map.
  425. #
  426. gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress|0
  427. # Platform will pre-allocate UPD buffer and pass it to FspWrapper
  428. # Those dummy address will be patched before FspWrapper executing
  429. gIntelFsp2WrapperTokenSpaceGuid.PcdFspmUpdDataAddress|0xFFFFFFFF
  430. gIntelFsp2WrapperTokenSpaceGuid.PcdFspsUpdDataAddress|0xFFFFFFFF
  431. ######################################
  432. # Board Configuration
  433. ######################################
  434. gKabylakeOpenBoardPkgTokenSpaceGuid.PcdDisablePassiveTripPoints|1
  435. gKabylakeOpenBoardPkgTokenSpaceGuid.PcdLowPowerS0Idle|1
  436. gKabylakeOpenBoardPkgTokenSpaceGuid.PcdPciExpNative|1
  437. # Thunderbolt Configuration (FIXME: Remove if not supporting Newgate)
  438. gKabylakeOpenBoardPkgTokenSpaceGuid.PcdDTbtAcDcSwitch|0x0
  439. gKabylakeOpenBoardPkgTokenSpaceGuid.PcdDTbtAcpiGpeSignature|0
  440. gKabylakeOpenBoardPkgTokenSpaceGuid.PcdDTbtAcpiGpeSignaturePorting|0
  441. gKabylakeOpenBoardPkgTokenSpaceGuid.PcdDTbtAspm|0x0
  442. gKabylakeOpenBoardPkgTokenSpaceGuid.PcdDTbtCioPlugEventGpioPad|0x02010011
  443. gKabylakeOpenBoardPkgTokenSpaceGuid.PcdDTbtControllerEn|0x1
  444. gKabylakeOpenBoardPkgTokenSpaceGuid.PcdDTbtControllerType|0x1
  445. gKabylakeOpenBoardPkgTokenSpaceGuid.PcdDTbtForcepowerGpioPad|13
  446. gKabylakeOpenBoardPkgTokenSpaceGuid.PcdDTbtGpioAccessType|0x2
  447. gKabylakeOpenBoardPkgTokenSpaceGuid.PcdDTbtGpioLevel|0x1
  448. gKabylakeOpenBoardPkgTokenSpaceGuid.PcdDTbtHotNotify|0x1
  449. gKabylakeOpenBoardPkgTokenSpaceGuid.PcdDTbtHotSMI|0x1
  450. gKabylakeOpenBoardPkgTokenSpaceGuid.PcdDTbtPcieExtraBusRsvd|56
  451. gKabylakeOpenBoardPkgTokenSpaceGuid.PcdDTbtPcieMemAddrRngMax|26
  452. gKabylakeOpenBoardPkgTokenSpaceGuid.PcdDTbtPcieMemRsvd|100
  453. gKabylakeOpenBoardPkgTokenSpaceGuid.PcdDTbtPciePMemAddrRngMax|28
  454. gKabylakeOpenBoardPkgTokenSpaceGuid.PcdDTbtPciePMemRsvd|100
  455. gKabylakeOpenBoardPkgTokenSpaceGuid.PcdDTbtPcieRpNumber|0x1
  456. gKabylakeOpenBoardPkgTokenSpaceGuid.PcdDTbtSecurityMode|0x1
  457. gKabylakeOpenBoardPkgTokenSpaceGuid.PcdDTbtSetClkReq|0x1
  458. gKabylakeOpenBoardPkgTokenSpaceGuid.PcdDTbtWakeupSupport|0x0
  459. gKabylakeOpenBoardPkgTokenSpaceGuid.PcdDTbtWin10Support|0x0
  460. gKabylakeOpenBoardPkgTokenSpaceGuid.PcdExpander|0x0
  461. gKabylakeOpenBoardPkgTokenSpaceGuid.PcdPchPcieRootPortHpe|0x00000001
  462. gKabylakeOpenBoardPkgTokenSpaceGuid.PcdRtd3Tbt|0x1
  463. gKabylakeOpenBoardPkgTokenSpaceGuid.PcdRtd3TbtClkReq|0x1
  464. gKabylakeOpenBoardPkgTokenSpaceGuid.PcdRtd3TbtClkReqDelay|0x0
  465. gKabylakeOpenBoardPkgTokenSpaceGuid.PcdRtd3TbtOffDelay|5000
  466. [PcdsDynamicHii.X64.DEFAULT]
  467. ######################################
  468. # Edk2 Configuration
  469. ######################################
  470. gEfiMdePkgTokenSpaceGuid.PcdHardwareErrorRecordLevel|L"HwErrRecSupport"|gEfiGlobalVariableGuid|0x0|1 # Variable: L"HwErrRecSupport"
  471. !if gMinPlatformPkgTokenSpaceGuid.PcdPerformanceEnable == TRUE
  472. gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|L"Timeout"|gEfiGlobalVariableGuid|0x0|1 # Variable: L"Timeout"
  473. !else
  474. gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|L"Timeout"|gEfiGlobalVariableGuid|0x0|5 # Variable: L"Timeout"
  475. !endif
  476. !if gMinPlatformPkgTokenSpaceGuid.PcdTpm2Enable == TRUE
  477. gEfiSecurityPkgTokenSpaceGuid.PcdTcgPhysicalPresenceInterfaceVer|L"TCG2_VERSION"|gTcg2ConfigFormSetGuid|0x0|"1.3"|NV,BS
  478. gEfiSecurityPkgTokenSpaceGuid.PcdTpm2AcpiTableRev|L"TCG2_VERSION"|gTcg2ConfigFormSetGuid|0x8|3|NV,BS
  479. !endif