PlatformPkgGcc.fdf 34 KB

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  1. #/** @file
  2. # FDF file of Platform.
  3. #
  4. # Copyright (c) 2008 - 2019, Intel Corporation. All rights reserved.<BR>
  5. #
  6. # SPDX-License-Identifier: BSD-2-Clause-Patent
  7. #
  8. #
  9. #**/
  10. [Defines]
  11. DEFINE FLASH_BASE = 0xFFC00000 #The base address of the 4Mb FLASH Device.
  12. DEFINE FLASH_SIZE = 0x00400000 #The flash size in bytes of the 4Mb FLASH Device.
  13. DEFINE FLASH_BLOCK_SIZE = 0x1000 #The block size in bytes of the 4Mb FLASH Device.
  14. DEFINE FLASH_NUM_BLOCKS = 0x400 #The number of blocks in 4Mb FLASH Device.
  15. DEFINE FLASH_AREA_BASE_ADDRESS = 0xFF800000
  16. DEFINE FLASH_AREA_SIZE = 0x00800000
  17. DEFINE FLASH_REGION_VLVMICROCODE_OFFSET = 0x00000000
  18. DEFINE FLASH_REGION_VLVMICROCODE_SIZE = 0x00040000
  19. DEFINE FLASH_REGION_VLVMICROCODE_BASE = 0xFFC00000
  20. DEFINE FLASH_REGION_VPD_OFFSET = 0x00040000
  21. DEFINE FLASH_REGION_VPD_SIZE = 0x0003E000
  22. DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_OFFSET = 0x0007E000
  23. DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_SIZE = 0x00002000
  24. DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_OFFSET = 0x00080000
  25. DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_SIZE = 0x00040000
  26. DEFINE FLASH_REGION_FVMAIN_OFFSET = 0x00110000
  27. DEFINE FLASH_REGION_FVMAIN_SIZE = 0x00215000
  28. DEFINE FLASH_REGION_FV_RECOVERY2_OFFSET = 0x00325000
  29. DEFINE FLASH_REGION_FV_RECOVERY2_SIZE = 0x0006B000
  30. DEFINE FLASH_REGION_FV_RECOVERY_OFFSET = 0x00390000
  31. DEFINE FLASH_REGION_FV_RECOVERY_SIZE = 0x00070000
  32. ################################################################################
  33. #
  34. # FD Section
  35. # The [FD] Section is made up of the definition statements and a
  36. # description of what goes into the Flash Device Image. Each FD section
  37. # defines one flash "device" image. A flash device image may be one of
  38. # the following: Removable media bootable image (like a boot floppy
  39. # image,) an Option ROM image (that would be "flashed" into an add-in
  40. # card,) a System "Flash" image (that would be burned into a system's
  41. # flash) or an Update ("Capsule") image that will be used to update and
  42. # existing system flash.
  43. #
  44. ################################################################################
  45. [FD.Vlv]
  46. BaseAddress = $(FLASH_BASE)|gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress #The base address of the 3Mb FLASH Device.
  47. Size = $(FLASH_SIZE)|gPlatformModuleTokenSpaceGuid.PcdFlashAreaSize #The flash size in bytes of the 3Mb FLASH Device.
  48. ErasePolarity = 1
  49. BlockSize = $(FLASH_BLOCK_SIZE) #The block size in bytes of the 3Mb FLASH Device.
  50. NumBlocks = $(FLASH_NUM_BLOCKS) #The number of blocks in 3Mb FLASH Device.
  51. #
  52. #Flash location override based on actual flash map
  53. #
  54. SET gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress = $(FLASH_AREA_BASE_ADDRESS)
  55. SET gPlatformModuleTokenSpaceGuid.PcdFlashAreaSize = $(FLASH_AREA_SIZE)
  56. SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(FLASH_REGION_VLVMICROCODE_BASE) + 0x60
  57. SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(FLASH_REGION_VLVMICROCODE_SIZE) - 0x60
  58. ################################################################################
  59. #
  60. # Following are lists of FD Region layout which correspond to the locations of different
  61. # images within the flash device.
  62. #
  63. # Regions must be defined in ascending order and may not overlap.
  64. #
  65. # A Layout Region start with a eight digit hex offset (leading "0x" required) followed by
  66. # the pipe "|" character, followed by the size of the region, also in hex with the leading
  67. # "0x" characters. Like:
  68. # Offset|Size
  69. # PcdOffsetCName|PcdSizeCName
  70. # RegionType <FV, DATA, or FILE>
  71. # Fv Size can be adjusted; FVMAIN_COMPACT can be reduced to 0x120000, and FV_RECOVERY can be enlarged to 0x80000
  72. #
  73. ################################################################################
  74. # Since the Fce tool don't have gcc version, we can't handle default variable in Linux,
  75. # so we hardcode the default value of variable here.
  76. # Please note that we MUST update the binary once the default value is changed.
  77. #
  78. # CPU Microcodes
  79. #
  80. $(FLASH_REGION_VLVMICROCODE_OFFSET)|$(FLASH_REGION_VLVMICROCODE_SIZE)
  81. gPlatformModuleTokenSpaceGuid.PcdFlashMicroCodeAddress|gPlatformModuleTokenSpaceGuid.PcdFlashMicroCodeSize
  82. FV = MICROCODE_FV
  83. $(FLASH_REGION_VPD_OFFSET)|$(FLASH_REGION_VPD_SIZE)
  84. gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize
  85. FILE = Vlv2TbltDevicePkg/Stitch/Gcc/NvStorageVariable.bin
  86. $(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_OFFSET)|$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_SIZE)
  87. gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize
  88. FILE = Vlv2TbltDevicePkg/Stitch/Gcc/NvStorageFtwWorking.bin
  89. $(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_OFFSET)|$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_SIZE)
  90. gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
  91. FILE = Vlv2TbltDevicePkg/Stitch/Gcc/NvStorageFtwSpare.bin
  92. #
  93. # Main Block
  94. #
  95. $(FLASH_REGION_FVMAIN_OFFSET)|$(FLASH_REGION_FVMAIN_SIZE)
  96. gPlatformModuleTokenSpaceGuid.PcdFlashFvMainBase|gPlatformModuleTokenSpaceGuid.PcdFlashFvMainSize
  97. FV = FVMAIN_COMPACT
  98. #
  99. # FV Recovery#2
  100. #
  101. $(FLASH_REGION_FV_RECOVERY2_OFFSET)|$(FLASH_REGION_FV_RECOVERY2_SIZE)
  102. gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery2Base|gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery2Size
  103. FV = FVRECOVERY2
  104. #
  105. # FV Recovery
  106. #
  107. $(FLASH_REGION_FV_RECOVERY_OFFSET)|$(FLASH_REGION_FV_RECOVERY_SIZE)
  108. gPlatformModuleTokenSpaceGuid.PcdFlashFvRecoveryBase|gPlatformModuleTokenSpaceGuid.PcdFlashFvRecoverySize
  109. FV = FVRECOVERY
  110. ################################################################################
  111. #
  112. # FV Section
  113. #
  114. # [FV] section is used to define what components or modules are placed within a flash
  115. # device file. This section also defines order the components and modules are positioned
  116. # within the image. The [FV] section consists of define statements, set statements and
  117. # module statements.
  118. #
  119. ################################################################################
  120. [FV.MICROCODE_FV]
  121. BlockSize = $(FLASH_BLOCK_SIZE)
  122. FvAlignment = 16
  123. ERASE_POLARITY = 1
  124. MEMORY_MAPPED = TRUE
  125. STICKY_WRITE = TRUE
  126. LOCK_CAP = TRUE
  127. LOCK_STATUS = FALSE
  128. WRITE_DISABLED_CAP = TRUE
  129. WRITE_ENABLED_CAP = TRUE
  130. WRITE_STATUS = TRUE
  131. WRITE_LOCK_CAP = TRUE
  132. WRITE_LOCK_STATUS = TRUE
  133. READ_DISABLED_CAP = TRUE
  134. READ_ENABLED_CAP = TRUE
  135. READ_STATUS = TRUE
  136. READ_LOCK_CAP = TRUE
  137. READ_LOCK_STATUS = TRUE
  138. FILE RAW = 197DB236-F856-4924-90F8-CDF12FB875F3 {
  139. $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/$(DXE_ARCHITECTURE)/MicrocodeUpdates.bin
  140. }
  141. !if $(RECOVERY_ENABLE)
  142. [FV.FVRECOVERY_COMPONENTS]
  143. FvAlignment = 16 #FV alignment and FV attributes setting.
  144. ERASE_POLARITY = 1
  145. MEMORY_MAPPED = TRUE
  146. STICKY_WRITE = TRUE
  147. LOCK_CAP = TRUE
  148. LOCK_STATUS = TRUE
  149. WRITE_DISABLED_CAP = TRUE
  150. WRITE_ENABLED_CAP = TRUE
  151. WRITE_STATUS = TRUE
  152. WRITE_LOCK_CAP = TRUE
  153. WRITE_LOCK_STATUS = TRUE
  154. READ_DISABLED_CAP = TRUE
  155. READ_ENABLED_CAP = TRUE
  156. READ_STATUS = TRUE
  157. READ_LOCK_CAP = TRUE
  158. READ_LOCK_STATUS = TRUE
  159. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchUsb.inf
  160. INF MdeModulePkg/Bus/Pci/EhciPei/EhciPei.inf
  161. INF MdeModulePkg/Bus/Usb/UsbBusPei/UsbBusPei.inf
  162. INF MdeModulePkg/Bus/Usb/UsbBotPei/UsbBotPei.inf
  163. INF FatPkg/FatPei/FatPei.inf
  164. INF MdeModulePkg/Universal/Disk/CdExpressPei/CdExpressPei.inf
  165. INF SignedCapsulePkg/Universal/RecoveryModuleLoadPei/RecoveryModuleLoadPei.inf
  166. !endif
  167. ################################################################################
  168. #
  169. # FV Section
  170. #
  171. # [FV] section is used to define what components or modules are placed within a flash
  172. # device file. This section also defines order the components and modules are positioned
  173. # within the image. The [FV] section consists of define statements, set statements and
  174. # module statements.
  175. #
  176. ################################################################################
  177. [FV.FVRECOVERY2]
  178. BlockSize = $(FLASH_BLOCK_SIZE)
  179. FvAlignment = 16 #FV alignment and FV attributes setting.
  180. ERASE_POLARITY = 1
  181. MEMORY_MAPPED = TRUE
  182. STICKY_WRITE = TRUE
  183. LOCK_CAP = TRUE
  184. LOCK_STATUS = TRUE
  185. WRITE_DISABLED_CAP = TRUE
  186. WRITE_ENABLED_CAP = TRUE
  187. WRITE_STATUS = TRUE
  188. WRITE_LOCK_CAP = TRUE
  189. WRITE_LOCK_STATUS = TRUE
  190. READ_DISABLED_CAP = TRUE
  191. READ_ENABLED_CAP = TRUE
  192. READ_STATUS = TRUE
  193. READ_LOCK_CAP = TRUE
  194. READ_LOCK_STATUS = TRUE
  195. FvNameGuid = B73FE497-B92E-416e-8326-45AD0D270092
  196. INF Vlv2TbltDevicePkg/PlatformInitPei/PlatformInitPei.inf
  197. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchSmbusArpDisabled.inf
  198. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/IA32/VlvInitPeim.inf
  199. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchInitPeim.inf
  200. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchSpiPeim.inf
  201. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PeiSmmAccess.inf
  202. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PeiSmmControl.inf
  203. INF UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf
  204. INF UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationPei.inf
  205. !if $(TPM_ENABLED) == TRUE
  206. INF SecurityPkg/Tcg/Tcg2Config/Tcg2ConfigPei.inf
  207. INF SecurityPkg/Tcg/TcgPei/TcgPei.inf
  208. INF SecurityPkg/Tcg/PhysicalPresencePei/PhysicalPresencePei.inf
  209. !endif
  210. INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
  211. !if $(ACPI50_ENABLE) == TRUE
  212. INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTablePei/FirmwarePerformancePei.inf
  213. !endif
  214. !if $(PERFORMANCE_ENABLE) == TRUE
  215. INF MdeModulePkg/Universal/ReportStatusCodeRouter/Pei/ReportStatusCodeRouterPei.inf
  216. !endif
  217. !if $(RECOVERY_ENABLE)
  218. FILE FV_IMAGE = 1E9D7604-EF45-46a0-BD8A-71AC78C17AC1 {
  219. SECTION PEI_DEPEX_EXP = {gEfiPeiMemoryDiscoveredPpiGuid AND gEfiPeiBootInRecoveryModePpiGuid}
  220. SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF { # LZMA COMPRESS GUID
  221. SECTION FV_IMAGE = FVRECOVERY_COMPONENTS
  222. }
  223. }
  224. !endif
  225. [FV.FVRECOVERY]
  226. BlockSize = $(FLASH_BLOCK_SIZE)
  227. FvAlignment = 16 #FV alignment and FV attributes setting.
  228. ERASE_POLARITY = 1
  229. MEMORY_MAPPED = TRUE
  230. STICKY_WRITE = TRUE
  231. LOCK_CAP = TRUE
  232. LOCK_STATUS = TRUE
  233. WRITE_DISABLED_CAP = TRUE
  234. WRITE_ENABLED_CAP = TRUE
  235. WRITE_STATUS = TRUE
  236. WRITE_LOCK_CAP = TRUE
  237. WRITE_LOCK_STATUS = TRUE
  238. READ_DISABLED_CAP = TRUE
  239. READ_ENABLED_CAP = TRUE
  240. READ_STATUS = TRUE
  241. READ_LOCK_CAP = TRUE
  242. READ_LOCK_STATUS = TRUE
  243. FvNameGuid = B73FE497-B92E-416e-8326-45AD0D270091
  244. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/IA32/SecCore.inf
  245. INF MdeModulePkg/Core/Pei/PeiMain.inf
  246. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/IA32/CpuPeim.inf
  247. INF MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf
  248. INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
  249. INF Vlv2TbltDevicePkg/PlatformPei/PlatformPei.inf
  250. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/IA32/SeCUma.inf
  251. !if $(SOURCE_DEBUG_ENABLE) == TRUE
  252. INF SourceLevelDebugPkg/DebugAgentPei/DebugAgentPei.inf
  253. !endif
  254. !if $(CAPSULE_ENABLE) == TRUE
  255. INF MdeModulePkg/Universal/CapsulePei/CapsulePei.inf
  256. !if $(DXE_ARCHITECTURE) == "X64"
  257. INF MdeModulePkg/Universal/CapsulePei/CapsuleX64.inf
  258. !endif
  259. !endif
  260. !if $(PCIESC_ENABLE) == TRUE
  261. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchEarlyInitPeim.inf
  262. !endif
  263. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/IA32/MemoryInit.inf
  264. INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
  265. [FV.FVMAIN]
  266. BlockSize = $(FLASH_BLOCK_SIZE)
  267. FvAlignment = 16
  268. ERASE_POLARITY = 1
  269. MEMORY_MAPPED = TRUE
  270. STICKY_WRITE = TRUE
  271. LOCK_CAP = TRUE
  272. LOCK_STATUS = TRUE
  273. WRITE_DISABLED_CAP = TRUE
  274. WRITE_ENABLED_CAP = TRUE
  275. WRITE_STATUS = TRUE
  276. WRITE_LOCK_CAP = TRUE
  277. WRITE_LOCK_STATUS = TRUE
  278. READ_DISABLED_CAP = TRUE
  279. READ_ENABLED_CAP = TRUE
  280. READ_STATUS = TRUE
  281. READ_LOCK_CAP = TRUE
  282. READ_LOCK_STATUS = TRUE
  283. FvNameGuid = A881D567-6CB0-4eee-8435-2E72D33E45B5
  284. APRIORI DXE {
  285. INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
  286. INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf
  287. INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf
  288. }
  289. FILE FREEFORM = C3E36D09-8294-4b97-A857-D5288FE33E28 {
  290. SECTION RAW = $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/$(DXE_ARCHITECTURE)/BiosId.bin
  291. }
  292. #
  293. # EDK II Related Platform codes
  294. #
  295. INF MdeModulePkg/Core/Dxe/DxeMain.inf
  296. INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
  297. !if $(ACPI50_ENABLE) == TRUE
  298. INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableDxe/FirmwarePerformanceDxe.inf
  299. INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableSmm/FirmwarePerformanceSmm.inf
  300. !endif
  301. INF UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
  302. INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf
  303. INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf
  304. INF MdeModulePkg/Universal/ReportStatusCodeRouter/Smm/ReportStatusCodeRouterSmm.inf
  305. INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
  306. INF UefiCpuPkg/CpuDxe/CpuDxe.inf
  307. INF UefiCpuPkg/CpuS3DataDxe/CpuS3DataDxe.inf
  308. INF MdeModulePkg/Universal/Metronome/Metronome.inf
  309. INF IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf
  310. !if $(ARCH) == IA32
  311. INF USE=IA32 MdeModulePkg/Logo/Logo.inf
  312. !else
  313. INF USE=X64 MdeModulePkg/Logo/Logo.inf
  314. !endif
  315. INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
  316. INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
  317. INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
  318. INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.inf
  319. INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf
  320. INF Vlv2TbltDevicePkg/FvbRuntimeDxe/FvbSmm.inf
  321. INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf
  322. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSpiSmm.inf
  323. !if $(SECURE_BOOT_ENABLE)
  324. INF SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf
  325. !endif
  326. INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
  327. INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
  328. INF PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntimeDxe.inf
  329. INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
  330. INF Vlv2TbltDevicePkg/FvbRuntimeDxe/FvbRuntimeDxe.inf
  331. INF Vlv2TbltDevicePkg/PlatformSetupDxe/PlatformSetupDxe.inf
  332. !if $(DATAHUB_ENABLE) == TRUE
  333. INF IntelFrameworkModulePkg/Universal/DataHubDxe/DataHubDxe.inf
  334. !endif
  335. INF MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf
  336. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/Dptf.inf
  337. #
  338. # EDK II Related Silicon codes
  339. #
  340. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchS3SupportDxe.inf
  341. INF PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.inf
  342. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmmControl.inf
  343. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSmbusDxe.inf
  344. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchReset.inf
  345. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchInitDxe.inf
  346. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchInitSmm.inf
  347. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSmiDispatcher.inf
  348. !if $(PCIESC_ENABLE) == TRUE
  349. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchPcieSmm.inf
  350. !endif
  351. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSpiRuntime.inf
  352. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchPolicyInitDxe.inf
  353. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchBiosWriteProtect.inf
  354. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmmAccess.inf
  355. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PciHostBridge.inf
  356. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/VlvInitDxe.inf
  357. !if $(TPM_ENABLED) == TRUE
  358. INF SecurityPkg/Tcg/TcgConfigDxe/TcgConfigDxe.inf
  359. INF SecurityPkg/Tcg/TcgDxe/TcgDxe.inf
  360. INF RuleOverride = DRIVER_ACPITABLE SecurityPkg/Tcg/TcgSmm/TcgSmm.inf
  361. !endif
  362. #
  363. # EDK II Related Platform codes
  364. #
  365. INF Vlv2TbltDevicePkg/PlatformSmm/PlatformSmm.inf
  366. INF Vlv2TbltDevicePkg/PlatformInfoDxe/PlatformInfoDxe.inf
  367. INF Vlv2TbltDevicePkg/PlatformCpuInfoDxe/PlatformCpuInfoDxe.inf
  368. INF Vlv2TbltDevicePkg/PlatformDxe/PlatformDxe.inf
  369. INF Vlv2TbltDevicePkg/PciPlatform/PciPlatform.inf
  370. INF Vlv2TbltDevicePkg/SaveMemoryConfig/SaveMemoryConfig.inf
  371. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PlatformCpuPolicy.inf
  372. INF Vlv2TbltDevicePkg/PpmPolicy/PpmPolicy.inf
  373. !if $(GOP_DRIVER_ENABLE) == TRUE
  374. INF Vlv2TbltDevicePkg/PlatformGopPolicy/PlatformGopPolicy.inf
  375. FILE DRIVER = FF0C8745-3270-4439-B74F-3E45F8C77064 {
  376. SECTION DXE_DEPEX_EXP = {gPlatformGOPPolicyGuid}
  377. SECTION PE32 = Vlv2SocBinPkg/GOP/7.2.1011/RELEASE_VS2008x86/$(DXE_ARCHITECTURE)/IntelGopDriver.efi
  378. SECTION UI = "IntelGopDriver"
  379. }
  380. !endif
  381. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PnpDxe.inf
  382. #
  383. # SMM
  384. #
  385. INF MdeModulePkg/Core/PiSmmCore/PiSmmIpl.inf
  386. INF MdeModulePkg/Core/PiSmmCore/PiSmmCore.inf
  387. INF UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf
  388. INF UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.inf
  389. INF MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.inf
  390. INF UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationSmm.inf
  391. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PowerManagement2.inf
  392. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/DigitalThermalSensor.inf
  393. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/GraphicDxeInitSmm.inf
  394. #
  395. # ACPI
  396. #
  397. INF MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/BootScriptExecutorDxe.inf
  398. INF MdeModulePkg/Universal/Acpi/S3SaveStateDxe/S3SaveStateDxe.inf
  399. INF IntelFrameworkModulePkg/Universal/Acpi/AcpiSupportDxe/AcpiSupportDxe.inf
  400. INF RuleOverride = ACPITABLE2 Vlv2DeviceRefCodePkg/ValleyView2Soc/CPU/PowerManagement/AcpiTables/PowerManagementAcpiTables.inf
  401. INF RuleOverride = ACPITABLE Vlv2DeviceRefCodePkg/AcpiTablesPCAT/AcpiTables.inf
  402. INF Vlv2TbltDevicePkg/AcpiPlatform/AcpiPlatform.inf
  403. INF MdeModulePkg/Universal/Acpi/BootGraphicsResourceTableDxe/BootGraphicsResourceTableDxe.inf
  404. #
  405. # PCI
  406. #
  407. INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
  408. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/ISPDxe.inf
  409. #
  410. # ISA
  411. #
  412. INF Vlv2TbltDevicePkg/PcuSio/PcuSio.inf
  413. !if $(SOURCE_DEBUG_ENABLE) != TRUE
  414. INF IntelFrameworkModulePkg/Bus/Isa/IsaSerialDxe/IsaSerialDxe.inf
  415. !endif
  416. #
  417. # IDE/SCSI/AHCI
  418. #
  419. INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
  420. INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
  421. INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
  422. !if $(SATA_ENABLE) == TRUE
  423. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SataController.inf
  424. #
  425. #
  426. INF MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
  427. INF MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
  428. !if $(SCSI_ENABLE) == TRUE
  429. INF MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf
  430. INF MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf
  431. !endif
  432. #
  433. !endif
  434. # Console
  435. #
  436. INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
  437. INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
  438. INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
  439. INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
  440. INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
  441. INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
  442. INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
  443. #
  444. # USB
  445. #
  446. !if $(USB_ENABLE) == TRUE
  447. INF MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf
  448. INF MdeModulePkg/Bus/Pci/UhciDxe/UhciDxe.inf
  449. INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf
  450. INF MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf
  451. INF MdeModulePkg/Bus/Usb/UsbMouseDxe/UsbMouseDxe.inf
  452. INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf
  453. INF MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf
  454. !endif
  455. #
  456. # SMBIOS
  457. #
  458. INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
  459. INF Vlv2TbltDevicePkg/SmBiosMiscDxe/SmBiosMiscDxe.inf
  460. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmbiosMemory.inf
  461. #
  462. # FAT file system
  463. #
  464. INF FatPkg/EnhancedFatDxe/Fat.inf
  465. #
  466. # UEFI Shell
  467. #
  468. INF ShellPkg/Application/Shell/Shell.inf
  469. #
  470. # dp command
  471. #
  472. !if $(PERFORMANCE_ENABLE) == TRUE
  473. INF ShellPkg/DynamicCommand/DpDynamicCommand/DpDynamicCommand.inf
  474. !endif
  475. !if $(GOP_DRIVER_ENABLE) == TRUE
  476. FILE FREEFORM = 878AC2CC-5343-46F2-B563-51F89DAF56BA {
  477. SECTION RAW = Vlv2SocBinPkg/GOP/7.2.1011/VBT/MNW2/Vbt.bin
  478. SECTION UI = "IntelGopVbt"
  479. }
  480. !endif
  481. #
  482. # Network Modules
  483. #
  484. !include NetworkPkg/Network.fdf.inc
  485. !if $(NETWORK_ENABLE) == TRUE
  486. FILE DRIVER = 22DE1691-D65D-456a-993E-A253DD1F308C {
  487. SECTION PE32 = Vlv2SocBinPkg/UNDI/RtkUndiDxe/$(DXE_ARCHITECTURE)/RtkUndiDxe.efi
  488. SECTION UI = "RtkUndiDxe"
  489. }
  490. !if $(DXE_ARCHITECTURE) == "X64"
  491. FILE DRIVER = 7C7467E9-8BB3-4BF1-8694-6FED7D25D13E {
  492. SECTION PE32 = Vlv2SocBinPkg/UNDI/I211PcieUndiDxe/$(DXE_ARCHITECTURE)/E7006X3.EFI
  493. SECTION UI = "E7006X3"
  494. }
  495. !endif
  496. !endif
  497. !if $(CAPSULE_ENABLE)
  498. INF MdeModulePkg/Universal/EsrtFmpDxe/EsrtFmpDxe.inf
  499. #
  500. # Minnow Max System Firmware FMP
  501. #
  502. INF FILE_GUID = $(FMP_MINNOW_MAX_SYSTEM) FmpDevicePkg/FmpDxe/FmpDxe.inf
  503. #
  504. # Sample Device FMP
  505. #
  506. INF FILE_GUID = $(FMP_GREEN_SAMPLE_DEVICE) FmpDevicePkg/FmpDxe/FmpDxe.inf
  507. INF FILE_GUID = $(FMP_BLUE_SAMPLE_DEVICE) FmpDevicePkg/FmpDxe/FmpDxe.inf
  508. INF FILE_GUID = $(FMP_RED_SAMPLE_DEVICE) FmpDevicePkg/FmpDxe/FmpDxe.inf
  509. !endif
  510. !if $(MICOCODE_CAPSULE_ENABLE)
  511. INF IntelSiliconPkg/Feature/Capsule/MicrocodeUpdateDxe/MicrocodeUpdateDxe.inf
  512. !endif
  513. !if $(RECOVERY_ENABLE)
  514. FILE FREEFORM = PCD(gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiRsa2048Sha256TestPublicKeyFileGuid) {
  515. SECTION RAW = BaseTools/Source/Python/Rsa2048Sha256Sign/TestSigningPublicKey.bin
  516. SECTION UI = "Rsa2048Sha256TestSigningPublicKey"
  517. }
  518. !endif
  519. [FV.FVMAIN_COMPACT]
  520. BlockSize = $(FLASH_BLOCK_SIZE)
  521. FvAlignment = 16
  522. ERASE_POLARITY = 1
  523. MEMORY_MAPPED = TRUE
  524. STICKY_WRITE = TRUE
  525. LOCK_CAP = TRUE
  526. LOCK_STATUS = TRUE
  527. WRITE_DISABLED_CAP = TRUE
  528. WRITE_ENABLED_CAP = TRUE
  529. WRITE_STATUS = TRUE
  530. WRITE_LOCK_CAP = TRUE
  531. WRITE_LOCK_STATUS = TRUE
  532. READ_DISABLED_CAP = TRUE
  533. READ_ENABLED_CAP = TRUE
  534. READ_STATUS = TRUE
  535. READ_LOCK_CAP = TRUE
  536. READ_LOCK_STATUS = TRUE
  537. FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
  538. !if $(LZMA_ENABLE) == TRUE
  539. # LZMA Compress
  540. SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
  541. SECTION FV_IMAGE = FVMAIN
  542. }
  543. !else
  544. !if $(DXE_COMPRESS_ENABLE) == TRUE
  545. # Tiano Compress
  546. SECTION GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {
  547. SECTION FV_IMAGE = FVMAIN
  548. }
  549. !else
  550. # No Compress
  551. SECTION COMPRESS PI_NONE {
  552. SECTION FV_IMAGE = FVMAIN
  553. }
  554. !endif
  555. !endif
  556. }
  557. [FV.SETUP_DATA]
  558. BlockSize = $(FLASH_BLOCK_SIZE)
  559. #NumBlocks = 0x10
  560. FvAlignment = 16
  561. ERASE_POLARITY = 1
  562. MEMORY_MAPPED = TRUE
  563. STICKY_WRITE = TRUE
  564. LOCK_CAP = TRUE
  565. LOCK_STATUS = TRUE
  566. WRITE_DISABLED_CAP = TRUE
  567. WRITE_ENABLED_CAP = TRUE
  568. WRITE_STATUS = TRUE
  569. WRITE_LOCK_CAP = TRUE
  570. WRITE_LOCK_STATUS = TRUE
  571. READ_DISABLED_CAP = TRUE
  572. READ_ENABLED_CAP = TRUE
  573. READ_STATUS = TRUE
  574. READ_LOCK_CAP = TRUE
  575. READ_LOCK_STATUS = TRUE
  576. ################################################################################
  577. #
  578. # Rules are use with the [FV] section's module INF type to define
  579. # how an FFS file is created for a given INF file. The following Rule are the default
  580. # rules for the different module type. User can add the customized rules to define the
  581. # content of the FFS file.
  582. #
  583. ################################################################################
  584. [Rule.Common.SEC]
  585. FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
  586. PE32 PE32 Align = 8 $(INF_OUTPUT)/$(MODULE_NAME).efi
  587. RAW BIN Align = 16 |.com
  588. }
  589. [Rule.Common.SEC.BINARY]
  590. FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
  591. PE32 PE32 Align = 8 |.efi
  592. RAW BIN Align = 16 |.com
  593. }
  594. [Rule.Common.PEI_CORE]
  595. FILE PEI_CORE = $(NAMED_GUID) {
  596. PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
  597. UI STRING="$(MODULE_NAME)" Optional
  598. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  599. }
  600. [Rule.Common.PEIM]
  601. FILE PEIM = $(NAMED_GUID) {
  602. PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
  603. PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
  604. UI STRING="$(MODULE_NAME)" Optional
  605. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  606. }
  607. [Rule.Common.PEIM.BINARY]
  608. FILE PEIM = $(NAMED_GUID) {
  609. PEI_DEPEX PEI_DEPEX Optional |.depex
  610. PE32 PE32 Align = Auto |.efi
  611. UI STRING="$(MODULE_NAME)" Optional
  612. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  613. }
  614. [Rule.Common.PEIM.BIOSID]
  615. FILE PEIM = $(NAMED_GUID) {
  616. RAW BIN BiosId.bin
  617. PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
  618. PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
  619. UI STRING="$(MODULE_NAME)" Optional
  620. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  621. }
  622. [Rule.Common.USER_DEFINED.APINIT]
  623. FILE RAW = $(NAMED_GUID) Fixed Align=4K {
  624. RAW SEC_BIN |.com
  625. }
  626. #cjia 2011-07-21
  627. [Rule.Common.USER_DEFINED.LEGACY16]
  628. FILE FREEFORM = $(NAMED_GUID) {
  629. UI STRING="$(MODULE_NAME)" Optional
  630. RAW BIN |.bin
  631. }
  632. #cjia
  633. [Rule.Common.USER_DEFINED.ASM16]
  634. FILE FREEFORM = $(NAMED_GUID) {
  635. UI STRING="$(MODULE_NAME)" Optional
  636. RAW BIN |.com
  637. }
  638. [Rule.Common.DXE_CORE]
  639. FILE DXE_CORE = $(NAMED_GUID) {
  640. PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
  641. UI STRING="$(MODULE_NAME)" Optional
  642. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  643. }
  644. [Rule.Common.UEFI_DRIVER]
  645. FILE DRIVER = $(NAMED_GUID) {
  646. DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
  647. PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
  648. UI STRING="$(MODULE_NAME)" Optional
  649. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  650. }
  651. [Rule.Common.UEFI_DRIVER.BINARY]
  652. FILE DRIVER = $(NAMED_GUID) {
  653. DXE_DEPEX DXE_DEPEX Optional |.depex
  654. PE32 PE32 |.efi
  655. UI STRING="$(MODULE_NAME)" Optional
  656. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  657. }
  658. [Rule.Common.UEFI_DRIVER.NATIVE_BINARY]
  659. FILE DRIVER = $(NAMED_GUID) {
  660. DXE_DEPEX DXE_DEPEX Optional $(WORKSPACE)/Vlv2TbltDevicePkg/IntelGopDepex/IntelGopDriver.depex
  661. PE32 PE32 |.efi
  662. UI STRING="$(MODULE_NAME)" Optional
  663. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  664. }
  665. [Rule.Common.DXE_DRIVER]
  666. FILE DRIVER = $(NAMED_GUID) {
  667. DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
  668. PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
  669. UI STRING="$(MODULE_NAME)" Optional
  670. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  671. }
  672. [Rule.Common.DXE_DRIVER.BINARY]
  673. FILE DRIVER = $(NAMED_GUID) {
  674. DXE_DEPEX DXE_DEPEX Optional |.depex
  675. PE32 PE32 |.efi
  676. UI STRING="$(MODULE_NAME)" Optional
  677. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  678. }
  679. [Rule.Common.DXE_DRIVER.DRIVER_ACPITABLE]
  680. FILE DRIVER = $(NAMED_GUID) {
  681. DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
  682. PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
  683. UI STRING="$(MODULE_NAME)" Optional
  684. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  685. RAW ACPI Optional |.acpi
  686. RAW ASL Optional |.aml
  687. }
  688. [Rule.Common.DXE_RUNTIME_DRIVER]
  689. FILE DRIVER = $(NAMED_GUID) {
  690. DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
  691. PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
  692. UI STRING="$(MODULE_NAME)" Optional
  693. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  694. }
  695. [Rule.Common.DXE_RUNTIME_DRIVER.BINARY]
  696. FILE DRIVER = $(NAMED_GUID) {
  697. DXE_DEPEX DXE_DEPEX Optional |.depex
  698. PE32 PE32 |.efi
  699. UI STRING="$(MODULE_NAME)" Optional
  700. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  701. }
  702. [Rule.Common.DXE_SMM_DRIVER]
  703. FILE SMM = $(NAMED_GUID) {
  704. DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
  705. PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
  706. UI STRING="$(MODULE_NAME)" Optional
  707. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  708. }
  709. [Rule.Common.DXE_SMM_DRIVER.BINARY]
  710. FILE SMM = $(NAMED_GUID) {
  711. SMM_DEPEX SMM_DEPEX |.depex
  712. PE32 PE32 |.efi
  713. RAW BIN Optional |.aml
  714. UI STRING="$(MODULE_NAME)" Optional
  715. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  716. }
  717. [Rule.Common.DXE_SMM_DRIVER.DRIVER_ACPITABLE]
  718. FILE SMM = $(NAMED_GUID) {
  719. DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
  720. PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
  721. UI STRING="$(MODULE_NAME)" Optional
  722. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  723. RAW ACPI Optional |.acpi
  724. RAW ASL Optional |.aml
  725. }
  726. [Rule.Common.SMM_CORE]
  727. FILE SMM_CORE = $(NAMED_GUID) {
  728. DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
  729. PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
  730. UI STRING="$(MODULE_NAME)" Optional
  731. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  732. }
  733. [Rule.Common.SMM_CORE.BINARY]
  734. FILE SMM_CORE = $(NAMED_GUID) {
  735. DXE_DEPEX DXE_DEPEX Optional |.depex
  736. PE32 PE32 |.efi
  737. UI STRING="$(MODULE_NAME)" Optional
  738. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  739. }
  740. [Rule.Common.UEFI_APPLICATION]
  741. FILE APPLICATION = $(NAMED_GUID) {
  742. DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
  743. PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
  744. UI STRING="$(MODULE_NAME)" Optional
  745. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  746. }
  747. [Rule.Common.UEFI_APPLICATION.UI]
  748. FILE APPLICATION = $(NAMED_GUID) {
  749. PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
  750. UI STRING="Enter Setup"
  751. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  752. }
  753. [Rule.Common.USER_DEFINED]
  754. FILE FREEFORM = $(NAMED_GUID) {
  755. UI STRING="$(MODULE_NAME)" Optional
  756. RAW BIN |.bin
  757. }
  758. [Rule.Common.USER_DEFINED.BINARY]
  759. FILE FREEFORM = $(NAMED_GUID) {
  760. UI STRING="$(MODULE_NAME)" Optional
  761. RAW BIN |.bin
  762. }
  763. [Rule.Common.USER_DEFINED.ACPITABLE]
  764. FILE FREEFORM = $(NAMED_GUID) {
  765. RAW ACPI Optional |.acpi
  766. RAW ASL Optional |.aml
  767. }
  768. [Rule.Common.USER_DEFINED.ACPITABLE2]
  769. FILE FREEFORM = $(NAMED_GUID) {
  770. RAW ASL Optional |.aml
  771. }
  772. [Rule.Common.ACPITABLE]
  773. FILE FREEFORM = $(NAMED_GUID) {
  774. RAW ACPI Optional |.acpi
  775. RAW ASL Optional |.aml
  776. }
  777. [Rule.Common.PEIM.FMP_IMAGE_DESC]
  778. FILE PEIM = $(NAMED_GUID) {
  779. RAW BIN |.acpi
  780. PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
  781. PE32 PE32 Align=4K $(INF_OUTPUT)/$(MODULE_NAME).efi
  782. UI STRING="$(MODULE_NAME)" Optional
  783. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  784. }