SecEntry.asm 9.2 KB

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  1. ;------------------------------------------------------------------------------
  2. ;
  3. ; Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
  4. ; SPDX-License-Identifier: BSD-2-Clause-Patent
  5. ;
  6. ; Module Name:
  7. ;
  8. ; SecEntry.asm
  9. ;
  10. ; Abstract:
  11. ;
  12. ; This is the code that goes from real-mode to protected mode.
  13. ; It consumes the reset vector, calls two basic APIs from FSP binary.
  14. ;
  15. ;------------------------------------------------------------------------------
  16. INCLUDE Fsp.inc
  17. .686p
  18. .xmm
  19. .model small, c
  20. EXTRN CallPeiCoreEntryPoint:NEAR
  21. EXTRN TempRamInitParams:FAR
  22. ; Pcds
  23. EXTRN PcdGet32 (PcdFlashFvFspBase):DWORD
  24. EXTRN PcdGet32 (PcdFlashFvFspSize):DWORD
  25. _TEXT_REALMODE SEGMENT PARA PUBLIC USE16 'CODE'
  26. ASSUME CS:_TEXT_REALMODE, DS:_TEXT_REALMODE
  27. ;----------------------------------------------------------------------------
  28. ;
  29. ; Procedure: _ModuleEntryPoint
  30. ;
  31. ; Input: None
  32. ;
  33. ; Output: None
  34. ;
  35. ; Destroys: Assume all registers
  36. ;
  37. ; Description:
  38. ;
  39. ; Transition to non-paged flat-model protected mode from a
  40. ; hard-coded GDT that provides exactly two descriptors.
  41. ; This is a bare bones transition to protected mode only
  42. ; used for a while in PEI and possibly DXE.
  43. ;
  44. ; After enabling protected mode, a far jump is executed to
  45. ; transfer to PEI using the newly loaded GDT.
  46. ;
  47. ; Return: None
  48. ;
  49. ; MMX Usage:
  50. ; MM0 = BIST State
  51. ; MM5 = Save time-stamp counter value high32bit
  52. ; MM6 = Save time-stamp counter value low32bit.
  53. ;
  54. ;----------------------------------------------------------------------------
  55. align 4
  56. _ModuleEntryPoint PROC NEAR C PUBLIC
  57. fninit ; clear any pending Floating point exceptions
  58. ;
  59. ; Store the BIST value in mm0
  60. ;
  61. movd mm0, eax
  62. ;
  63. ; Save time-stamp counter value
  64. ; rdtsc load 64bit time-stamp counter to EDX:EAX
  65. ;
  66. rdtsc
  67. movd mm5, edx
  68. movd mm6, eax
  69. ;
  70. ; Load the GDT table in GdtDesc
  71. ;
  72. mov esi, OFFSET GdtDesc
  73. DB 66h
  74. lgdt fword ptr cs:[si]
  75. ;
  76. ; Transition to 16 bit protected mode
  77. ;
  78. mov eax, cr0 ; Get control register 0
  79. or eax, 00000003h ; Set PE bit (bit #0) & MP bit (bit #1)
  80. mov cr0, eax ; Activate protected mode
  81. mov eax, cr4 ; Get control register 4
  82. or eax, 00000600h ; Set OSFXSR bit (bit #9) & OSXMMEXCPT bit (bit #10)
  83. mov cr4, eax
  84. ;
  85. ; Now we're in 16 bit protected mode
  86. ; Set up the selectors for 32 bit protected mode entry
  87. ;
  88. mov ax, SYS_DATA_SEL
  89. mov ds, ax
  90. mov es, ax
  91. mov fs, ax
  92. mov gs, ax
  93. mov ss, ax
  94. ;
  95. ; Transition to Flat 32 bit protected mode
  96. ; The jump to a far pointer causes the transition to 32 bit mode
  97. ;
  98. mov esi, offset ProtectedModeEntryLinearAddress
  99. jmp fword ptr cs:[si]
  100. _ModuleEntryPoint ENDP
  101. _TEXT_REALMODE ENDS
  102. _TEXT_PROTECTED_MODE SEGMENT PARA PUBLIC USE32 'CODE'
  103. ASSUME CS:_TEXT_PROTECTED_MODE, DS:_TEXT_PROTECTED_MODE
  104. ;----------------------------------------------------------------------------
  105. ;
  106. ; Procedure: ProtectedModeEntryPoint
  107. ;
  108. ; Input: None
  109. ;
  110. ; Output: None
  111. ;
  112. ; Destroys: Assume all registers
  113. ;
  114. ; Description:
  115. ;
  116. ; This function handles:
  117. ; Call two basic APIs from FSP binary
  118. ; Initializes stack with some early data (BIST, PEI entry, etc)
  119. ;
  120. ; Return: None
  121. ;
  122. ;----------------------------------------------------------------------------
  123. align 4
  124. ProtectedModeEntryPoint PROC NEAR PUBLIC
  125. ; Find the fsp info header
  126. mov edi, PcdGet32 (PcdFlashFvFspBase)
  127. mov ecx, PcdGet32 (PcdFlashFvFspSize)
  128. mov eax, dword ptr [edi + FVH_SIGINATURE_OFFSET]
  129. cmp eax, FVH_SIGINATURE_VALID_VALUE
  130. jnz FspHeaderNotFound
  131. xor eax, eax
  132. mov ax, word ptr [edi + FVH_EXTHEADER_OFFSET_OFFSET]
  133. cmp ax, 0
  134. jnz FspFvExtHeaderExist
  135. xor eax, eax
  136. mov ax, word ptr [edi + FVH_HEADER_LENGTH_OFFSET] ; Bypass Fv Header
  137. add edi, eax
  138. jmp FspCheckFfsHeader
  139. FspFvExtHeaderExist:
  140. add edi, eax
  141. mov eax, dword ptr [edi + FVH_EXTHEADER_SIZE_OFFSET] ; Bypass Ext Fv Header
  142. add edi, eax
  143. ; Round up to 8 byte alignment
  144. mov eax, edi
  145. and al, 07h
  146. jz FspCheckFfsHeader
  147. and edi, 0FFFFFFF8h
  148. add edi, 08h
  149. FspCheckFfsHeader:
  150. ; Check the ffs guid
  151. mov eax, dword ptr [edi]
  152. cmp eax, FSP_HEADER_GUID_DWORD1
  153. jnz FspHeaderNotFound
  154. mov eax, dword ptr [edi + 4]
  155. cmp eax, FSP_HEADER_GUID_DWORD2
  156. jnz FspHeaderNotFound
  157. mov eax, dword ptr [edi + 8]
  158. cmp eax, FSP_HEADER_GUID_DWORD3
  159. jnz FspHeaderNotFound
  160. mov eax, dword ptr [edi + 0Ch]
  161. cmp eax, FSP_HEADER_GUID_DWORD4
  162. jnz FspHeaderNotFound
  163. add edi, FFS_HEADER_SIZE_VALUE ; Bypass the ffs header
  164. ; Check the section type as raw section
  165. mov al, byte ptr [edi + SECTION_HEADER_TYPE_OFFSET]
  166. cmp al, 019h
  167. jnz FspHeaderNotFound
  168. add edi, RAW_SECTION_HEADER_SIZE_VALUE ; Bypass the section header
  169. jmp FspHeaderFound
  170. FspHeaderNotFound:
  171. jmp $
  172. FspHeaderFound:
  173. ; Get the fsp TempRamInit Api address
  174. mov eax, dword ptr [edi + FSP_HEADER_IMAGEBASE_OFFSET]
  175. add eax, dword ptr [edi + FSP_HEADER_TEMPRAMINIT_OFFSET]
  176. ; Setup the hardcode stack
  177. mov esp, OFFSET TempRamInitStack
  178. ; Call the fsp TempRamInit Api
  179. jmp eax
  180. TempRamInitDone:
  181. cmp eax, 0
  182. jnz FspApiFailed
  183. ; ECX: start of range
  184. ; EDX: end of range
  185. mov esp, edx
  186. push edx
  187. push ecx
  188. push eax ; zero - no hob list yet
  189. call CallPeiCoreEntryPoint
  190. FspApiFailed:
  191. jmp $
  192. align 10h
  193. TempRamInitStack:
  194. DD OFFSET TempRamInitDone
  195. DD OFFSET TempRamInitParams
  196. ProtectedModeEntryPoint ENDP
  197. ;
  198. ; ROM-based Global-Descriptor Table for the Tiano PEI Phase
  199. ;
  200. align 16
  201. PUBLIC BootGdtTable
  202. ;
  203. ; GDT[0]: 0x00: Null entry, never used.
  204. ;
  205. NULL_SEL EQU $ - GDT_BASE ; Selector [0]
  206. GDT_BASE:
  207. BootGdtTable DD 0
  208. DD 0
  209. ;
  210. ; Linear data segment descriptor
  211. ;
  212. LINEAR_SEL EQU $ - GDT_BASE ; Selector [0x8]
  213. DW 0FFFFh ; limit 0xFFFFF
  214. DW 0 ; base 0
  215. DB 0
  216. DB 092h ; present, ring 0, data, expand-up, writable
  217. DB 0CFh ; page-granular, 32-bit
  218. DB 0
  219. ;
  220. ; Linear code segment descriptor
  221. ;
  222. LINEAR_CODE_SEL EQU $ - GDT_BASE ; Selector [0x10]
  223. DW 0FFFFh ; limit 0xFFFFF
  224. DW 0 ; base 0
  225. DB 0
  226. DB 09Bh ; present, ring 0, data, expand-up, not-writable
  227. DB 0CFh ; page-granular, 32-bit
  228. DB 0
  229. ;
  230. ; System data segment descriptor
  231. ;
  232. SYS_DATA_SEL EQU $ - GDT_BASE ; Selector [0x18]
  233. DW 0FFFFh ; limit 0xFFFFF
  234. DW 0 ; base 0
  235. DB 0
  236. DB 093h ; present, ring 0, data, expand-up, not-writable
  237. DB 0CFh ; page-granular, 32-bit
  238. DB 0
  239. ;
  240. ; System code segment descriptor
  241. ;
  242. SYS_CODE_SEL EQU $ - GDT_BASE ; Selector [0x20]
  243. DW 0FFFFh ; limit 0xFFFFF
  244. DW 0 ; base 0
  245. DB 0
  246. DB 09Ah ; present, ring 0, data, expand-up, writable
  247. DB 0CFh ; page-granular, 32-bit
  248. DB 0
  249. ;
  250. ; Spare segment descriptor
  251. ;
  252. SYS16_CODE_SEL EQU $ - GDT_BASE ; Selector [0x28]
  253. DW 0FFFFh ; limit 0xFFFFF
  254. DW 0 ; base 0
  255. DB 0Eh ; Changed from F000 to E000.
  256. DB 09Bh ; present, ring 0, code, expand-up, writable
  257. DB 00h ; byte-granular, 16-bit
  258. DB 0
  259. ;
  260. ; Spare segment descriptor
  261. ;
  262. SYS16_DATA_SEL EQU $ - GDT_BASE ; Selector [0x30]
  263. DW 0FFFFh ; limit 0xFFFF
  264. DW 0 ; base 0
  265. DB 0
  266. DB 093h ; present, ring 0, data, expand-up, not-writable
  267. DB 00h ; byte-granular, 16-bit
  268. DB 0
  269. ;
  270. ; Spare segment descriptor
  271. ;
  272. SPARE5_SEL EQU $ - GDT_BASE ; Selector [0x38]
  273. DW 0 ; limit 0
  274. DW 0 ; base 0
  275. DB 0
  276. DB 0 ; present, ring 0, data, expand-up, writable
  277. DB 0 ; page-granular, 32-bit
  278. DB 0
  279. GDT_SIZE EQU $ - BootGdtTable ; Size, in bytes
  280. ;
  281. ; GDT Descriptor
  282. ;
  283. GdtDesc: ; GDT descriptor
  284. DW GDT_SIZE - 1 ; GDT limit
  285. DD OFFSET BootGdtTable ; GDT base address
  286. ProtectedModeEntryLinearAddress LABEL FWORD
  287. ProtectedModeEntryLinearOffset LABEL DWORD
  288. DD OFFSET ProtectedModeEntryPoint ; Offset of our 32 bit code
  289. DW LINEAR_CODE_SEL
  290. _TEXT_PROTECTED_MODE ENDS
  291. END