SpiFlashDevice.c 16 KB

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  1. /** @file
  2. SPI flash device description.
  3. Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
  4. SPDX-License-Identifier: BSD-2-Clause-Patent
  5. **/
  6. #include "SpiFlashDevice.h"
  7. #define FLASH_SIZE (FixedPcdGet32 (PcdFlashAreaSize))
  8. SPI_INIT_TABLE mSpiInitTable[] = {
  9. //
  10. // Macronix 32Mbit part
  11. //
  12. {
  13. SPI_MX25L3205_ID1,
  14. SPI_MX25L3205_ID2,
  15. SPI_MX25L3205_ID3,
  16. {
  17. SPI_COMMAND_WRITE_ENABLE,
  18. SPI_COMMAND_WRITE_S_EN
  19. },
  20. {
  21. {EnumSpiOpcodeReadNoAddr, SPI_COMMAND_JEDEC_ID, EnumSpiCycle33MHz, EnumSpiOperationJedecId},
  22. {EnumSpiOpcodeRead, SPI_COMMAND_READ_ID, EnumSpiCycle33MHz, EnumSpiOperationOther},
  23. {EnumSpiOpcodeWriteNoAddr, SPI_COMMAND_WRITE_S, EnumSpiCycle33MHz, EnumSpiOperationWriteStatus},
  24. {EnumSpiOpcodeWrite, SPI_COMMAND_WRITE, EnumSpiCycle33MHz, EnumSpiOperationProgramData_1_Byte},
  25. {EnumSpiOpcodeRead, SPI_COMMAND_READ, EnumSpiCycle20MHz, EnumSpiOperationReadData},
  26. {EnumSpiOpcodeWrite, SPI_COMMAND_BLOCK_ERASE, EnumSpiCycle33MHz, EnumSpiOperationErase_64K_Byte},
  27. {EnumSpiOpcodeReadNoAddr, SPI_COMMAND_READ_S, EnumSpiCycle33MHz, EnumSpiOperationReadStatus},
  28. {EnumSpiOpcodeWriteNoAddr, SPI_COMMAND_CHIP_ERASE, EnumSpiCycle33MHz, EnumSpiOperationFullChipErase}
  29. },
  30. (UINTN)(0x400000 - FLASH_SIZE), // BIOS Start Offset
  31. FLASH_SIZE // BIOS image size in flash
  32. },
  33. //
  34. // Winbond 32Mbit part
  35. //
  36. {
  37. SPI_W25X32_ID1,
  38. SF_DEVICE_ID0_W25QXX,
  39. SF_DEVICE_ID1_W25Q32,
  40. {
  41. SPI_COMMAND_WRITE_ENABLE,
  42. SPI_COMMAND_WRITE_S_EN
  43. },
  44. {
  45. {EnumSpiOpcodeReadNoAddr, SPI_COMMAND_JEDEC_ID, EnumSpiCycle50MHz, EnumSpiOperationJedecId},
  46. {EnumSpiOpcodeRead, SPI_COMMAND_READ_ID, EnumSpiCycle50MHz, EnumSpiOperationOther},
  47. {EnumSpiOpcodeWriteNoAddr, SPI_COMMAND_WRITE_S, EnumSpiCycle50MHz, EnumSpiOperationWriteStatus},
  48. {EnumSpiOpcodeWrite, SPI_COMMAND_WRITE, EnumSpiCycle50MHz, EnumSpiOperationProgramData_1_Byte},
  49. {EnumSpiOpcodeRead, SPI_COMMAND_READ, EnumSpiCycle50MHz, EnumSpiOperationReadData},
  50. {EnumSpiOpcodeWrite, SPI_COMMAND_ERASE, EnumSpiCycle50MHz, EnumSpiOperationErase_4K_Byte},
  51. {EnumSpiOpcodeReadNoAddr, SPI_COMMAND_READ_S, EnumSpiCycle50MHz, EnumSpiOperationReadStatus},
  52. {EnumSpiOpcodeWriteNoAddr, SPI_COMMAND_CHIP_ERASE, EnumSpiCycle50MHz, EnumSpiOperationFullChipErase}
  53. },
  54. (UINTN)(0x400000 - FLASH_SIZE), // BIOS Start Offset
  55. FLASH_SIZE // BIOS image size in flash
  56. },
  57. //
  58. // Winbond 32Mbit part
  59. //
  60. {
  61. SPI_W25X32_ID1,
  62. SPI_W25X32_ID2,
  63. SPI_W25X32_ID3,
  64. {
  65. SPI_COMMAND_WRITE_ENABLE,
  66. SPI_COMMAND_WRITE_S_EN
  67. },
  68. {
  69. {EnumSpiOpcodeReadNoAddr, SPI_COMMAND_JEDEC_ID, EnumSpiCycle33MHz, EnumSpiOperationJedecId},
  70. {EnumSpiOpcodeRead, SPI_COMMAND_READ_ID, EnumSpiCycle33MHz, EnumSpiOperationOther},
  71. {EnumSpiOpcodeWriteNoAddr, SPI_COMMAND_WRITE_S, EnumSpiCycle33MHz, EnumSpiOperationWriteStatus},
  72. {EnumSpiOpcodeWrite, SPI_COMMAND_WRITE, EnumSpiCycle33MHz, EnumSpiOperationProgramData_1_Byte},
  73. {EnumSpiOpcodeRead, SPI_COMMAND_READ, EnumSpiCycle33MHz, EnumSpiOperationReadData},
  74. {EnumSpiOpcodeWrite, SPI_COMMAND_ERASE, EnumSpiCycle33MHz, EnumSpiOperationErase_4K_Byte},
  75. {EnumSpiOpcodeReadNoAddr, SPI_COMMAND_READ_S, EnumSpiCycle33MHz, EnumSpiOperationReadStatus},
  76. {EnumSpiOpcodeWriteNoAddr, SPI_COMMAND_CHIP_ERASE, EnumSpiCycle33MHz, EnumSpiOperationFullChipErase}
  77. },
  78. (UINTN)(0x400000 - FLASH_SIZE), // BIOS Start Offset
  79. FLASH_SIZE // BIOS image size in flash
  80. },
  81. //
  82. // Atmel 32Mbit part
  83. //
  84. {
  85. SPI_AT26DF321_ID1,
  86. SPI_AT26DF321_ID2, // issue: byte 2 identifies family/density for Atmel
  87. SPI_AT26DF321_ID3,
  88. {
  89. SPI_COMMAND_WRITE_ENABLE,
  90. SPI_COMMAND_WRITE_S_EN
  91. },
  92. {
  93. {EnumSpiOpcodeReadNoAddr, SPI_COMMAND_JEDEC_ID, EnumSpiCycle33MHz, EnumSpiOperationJedecId},
  94. {EnumSpiOpcodeRead, SPI_COMMAND_READ_ID, EnumSpiCycle33MHz, EnumSpiOperationOther},
  95. {EnumSpiOpcodeWriteNoAddr, SPI_COMMAND_WRITE_S, EnumSpiCycle33MHz, EnumSpiOperationWriteStatus},
  96. {EnumSpiOpcodeWrite, SPI_COMMAND_WRITE, EnumSpiCycle33MHz, EnumSpiOperationProgramData_1_Byte},
  97. {EnumSpiOpcodeRead, SPI_COMMAND_READ, EnumSpiCycle33MHz, EnumSpiOperationReadData},
  98. {EnumSpiOpcodeWrite, SPI_COMMAND_BLOCK_ERASE, EnumSpiCycle33MHz, EnumSpiOperationErase_64K_Byte},
  99. {EnumSpiOpcodeReadNoAddr, SPI_COMMAND_READ_S, EnumSpiCycle33MHz, EnumSpiOperationReadStatus},
  100. {EnumSpiOpcodeWriteNoAddr, SPI_COMMAND_CHIP_ERASE, EnumSpiCycle33MHz, EnumSpiOperationFullChipErase}
  101. },
  102. (UINTN)(0x400000 - FLASH_SIZE), // BIOS Start Offset
  103. FLASH_SIZE // BIOS image size in flash
  104. },
  105. //
  106. // Intel 32Mbit part bottom boot
  107. //
  108. {
  109. SPI_QH25F320_ID1,
  110. SPI_QH25F320_ID2,
  111. SPI_QH25F320_ID3,
  112. {
  113. SPI_COMMAND_WRITE_ENABLE,
  114. SPI_COMMAND_WRITE_ENABLE
  115. },
  116. {
  117. {EnumSpiOpcodeReadNoAddr, SPI_COMMAND_JEDEC_ID, EnumSpiCycle33MHz, EnumSpiOperationJedecId},
  118. {EnumSpiOpcodeRead, SPI_COMMAND_READ_ID, EnumSpiCycle33MHz, EnumSpiOperationOther},
  119. {EnumSpiOpcodeWriteNoAddr, SPI_COMMAND_WRITE_S, EnumSpiCycle33MHz, EnumSpiOperationWriteStatus},
  120. {EnumSpiOpcodeWrite, SPI_COMMAND_WRITE, EnumSpiCycle33MHz, EnumSpiOperationProgramData_1_Byte},
  121. {EnumSpiOpcodeRead, SPI_COMMAND_READ, EnumSpiCycle33MHz, EnumSpiOperationReadData},
  122. {EnumSpiOpcodeWrite, SPI_COMMAND_BLOCK_ERASE, EnumSpiCycle33MHz, EnumSpiOperationErase_64K_Byte},
  123. {EnumSpiOpcodeReadNoAddr, SPI_COMMAND_READ_S, EnumSpiCycle33MHz, EnumSpiOperationReadStatus},
  124. {EnumSpiOpcodeWriteNoAddr, SPI_COMMAND_CHIP_ERASE, EnumSpiCycle33MHz, EnumSpiOperationFullChipErase}
  125. },
  126. 0, // BIOS Start Offset
  127. FLASH_SIZE // BIOS image size in flash
  128. },
  129. //
  130. // SST 64Mbit part
  131. //
  132. {
  133. SPI_SST25VF080B_ID1, // VendorId
  134. SF_DEVICE_ID0_25VF064C, // DeviceId 0
  135. SF_DEVICE_ID1_25VF064C, // DeviceId 1
  136. {
  137. SPI_COMMAND_WRITE_ENABLE,
  138. SPI_COMMAND_WRITE_S_EN
  139. },
  140. {
  141. {EnumSpiOpcodeReadNoAddr, SPI_COMMAND_JEDEC_ID, EnumSpiCycle50MHz, EnumSpiOperationJedecId},
  142. {EnumSpiOpcodeRead, SPI_COMMAND_READ_ID, EnumSpiCycle50MHz, EnumSpiOperationOther},
  143. {EnumSpiOpcodeWriteNoAddr, SPI_COMMAND_WRITE_S, EnumSpiCycle50MHz, EnumSpiOperationWriteStatus},
  144. {EnumSpiOpcodeWrite, SPI_COMMAND_WRITE, EnumSpiCycle50MHz, EnumSpiOperationProgramData_1_Byte},
  145. {EnumSpiOpcodeRead, SPI_COMMAND_READ, EnumSpiCycle50MHz, EnumSpiOperationReadData},
  146. {EnumSpiOpcodeWrite, SPI_COMMAND_ERASE, EnumSpiCycle50MHz, EnumSpiOperationErase_4K_Byte},
  147. {EnumSpiOpcodeReadNoAddr, SPI_COMMAND_READ_S, EnumSpiCycle50MHz, EnumSpiOperationReadStatus},
  148. {EnumSpiOpcodeWriteNoAddr, SPI_COMMAND_CHIP_ERASE, EnumSpiCycle50MHz, EnumSpiOperationFullChipErase}
  149. },
  150. 0x800000 - FLASH_SIZE, // BIOS Start Offset
  151. FLASH_SIZE // BIOS image size in flash
  152. },
  153. //
  154. // NUMONYX 64Mbit part
  155. //
  156. {
  157. SF_VENDOR_ID_NUMONYX, // VendorId
  158. SF_DEVICE_ID0_M25PX64, // DeviceId 0
  159. SF_DEVICE_ID1_M25PX64, // DeviceId 1
  160. {
  161. SPI_COMMAND_WRITE_ENABLE,
  162. SPI_COMMAND_WRITE_S_EN
  163. },
  164. {
  165. {EnumSpiOpcodeReadNoAddr, SPI_COMMAND_JEDEC_ID, EnumSpiCycle50MHz, EnumSpiOperationJedecId},
  166. {EnumSpiOpcodeRead, SPI_COMMAND_READ_ID, EnumSpiCycle50MHz, EnumSpiOperationOther},
  167. {EnumSpiOpcodeWriteNoAddr, SPI_COMMAND_WRITE_S, EnumSpiCycle50MHz, EnumSpiOperationWriteStatus},
  168. {EnumSpiOpcodeWrite, SPI_COMMAND_WRITE, EnumSpiCycle50MHz, EnumSpiOperationProgramData_1_Byte},
  169. {EnumSpiOpcodeRead, SPI_COMMAND_READ, EnumSpiCycle50MHz, EnumSpiOperationReadData},
  170. {EnumSpiOpcodeWrite, SPI_COMMAND_ERASE, EnumSpiCycle50MHz, EnumSpiOperationErase_4K_Byte},
  171. {EnumSpiOpcodeReadNoAddr, SPI_COMMAND_READ_S, EnumSpiCycle50MHz, EnumSpiOperationReadStatus},
  172. {EnumSpiOpcodeWriteNoAddr, SPI_COMMAND_CHIP_ERASE, EnumSpiCycle50MHz, EnumSpiOperationFullChipErase}
  173. },
  174. 0x800000 - FLASH_SIZE, // BIOS Start Offset
  175. FLASH_SIZE // BIOS image size in flash
  176. },
  177. //
  178. // Atmel 64Mbit part
  179. //
  180. {
  181. SF_VENDOR_ID_ATMEL, // VendorId
  182. SF_DEVICE_ID0_AT25DF641, // DeviceId 0
  183. SF_DEVICE_ID1_AT25DF641, // DeviceId 1
  184. {
  185. SPI_COMMAND_WRITE_ENABLE,
  186. SPI_COMMAND_WRITE_S_EN
  187. },
  188. {
  189. {EnumSpiOpcodeReadNoAddr, SPI_COMMAND_JEDEC_ID, EnumSpiCycle50MHz, EnumSpiOperationJedecId},
  190. {EnumSpiOpcodeRead, SPI_COMMAND_READ_ID, EnumSpiCycle50MHz, EnumSpiOperationOther},
  191. {EnumSpiOpcodeWriteNoAddr, SPI_COMMAND_WRITE_S, EnumSpiCycle50MHz, EnumSpiOperationWriteStatus},
  192. {EnumSpiOpcodeWrite, SPI_COMMAND_WRITE, EnumSpiCycle50MHz, EnumSpiOperationProgramData_1_Byte},
  193. {EnumSpiOpcodeRead, SPI_COMMAND_READ, EnumSpiCycle50MHz, EnumSpiOperationReadData},
  194. {EnumSpiOpcodeWrite, SPI_COMMAND_ERASE, EnumSpiCycle50MHz, EnumSpiOperationErase_4K_Byte},
  195. {EnumSpiOpcodeReadNoAddr, SPI_COMMAND_READ_S, EnumSpiCycle50MHz, EnumSpiOperationReadStatus},
  196. {EnumSpiOpcodeWriteNoAddr, SPI_COMMAND_CHIP_ERASE, EnumSpiCycle50MHz, EnumSpiOperationFullChipErase}
  197. },
  198. 0x800000 - FLASH_SIZE, // BIOS Start Offset
  199. FLASH_SIZE // BIOS image size in flash
  200. },
  201. //
  202. // Spansion 64Mbit part
  203. //
  204. {
  205. SF_VENDOR_ID_SPANSION, // VendorId
  206. SF_DEVICE_ID0_S25FL064K, // DeviceId 0
  207. SF_DEVICE_ID1_S25FL064K, // DeviceId 1
  208. {
  209. SPI_COMMAND_WRITE_ENABLE,
  210. SPI_COMMAND_WRITE_S_EN
  211. },
  212. {
  213. {EnumSpiOpcodeReadNoAddr, SPI_COMMAND_JEDEC_ID, EnumSpiCycle50MHz, EnumSpiOperationJedecId},
  214. {EnumSpiOpcodeRead, SPI_COMMAND_READ_ID, EnumSpiCycle50MHz, EnumSpiOperationOther},
  215. {EnumSpiOpcodeWriteNoAddr, SPI_COMMAND_WRITE_S, EnumSpiCycle50MHz, EnumSpiOperationWriteStatus},
  216. {EnumSpiOpcodeWrite, SPI_COMMAND_WRITE, EnumSpiCycle50MHz, EnumSpiOperationProgramData_1_Byte},
  217. {EnumSpiOpcodeRead, SPI_COMMAND_READ, EnumSpiCycle50MHz, EnumSpiOperationReadData},
  218. {EnumSpiOpcodeWrite, SPI_COMMAND_ERASE, EnumSpiCycle50MHz, EnumSpiOperationErase_4K_Byte},
  219. {EnumSpiOpcodeReadNoAddr, SPI_COMMAND_READ_S, EnumSpiCycle50MHz, EnumSpiOperationReadStatus},
  220. {EnumSpiOpcodeWriteNoAddr, SPI_COMMAND_CHIP_ERASE, EnumSpiCycle50MHz, EnumSpiOperationFullChipErase}
  221. },
  222. 0x800000 - FLASH_SIZE, // BIOS Start Offset
  223. FLASH_SIZE // BIOS image size in flash
  224. },
  225. //
  226. // Macronix 64Mbit part bottom boot
  227. //
  228. {
  229. SF_VENDOR_ID_MX, // VendorId
  230. SF_DEVICE_ID0_25L6405D, // DeviceId 0
  231. SF_DEVICE_ID1_25L6405D, // DeviceId 1
  232. {
  233. SPI_COMMAND_WRITE_ENABLE,
  234. SPI_COMMAND_WRITE_S_EN
  235. },
  236. {
  237. {EnumSpiOpcodeReadNoAddr, SPI_COMMAND_JEDEC_ID, EnumSpiCycle50MHz, EnumSpiOperationJedecId},
  238. {EnumSpiOpcodeRead, SPI_COMMAND_READ_ID, EnumSpiCycle50MHz, EnumSpiOperationOther},
  239. {EnumSpiOpcodeWriteNoAddr, SPI_COMMAND_WRITE_S, EnumSpiCycle50MHz, EnumSpiOperationWriteStatus},
  240. {EnumSpiOpcodeWrite, SPI_COMMAND_WRITE, EnumSpiCycle50MHz, EnumSpiOperationProgramData_1_Byte},
  241. {EnumSpiOpcodeRead, SPI_COMMAND_READ, EnumSpiCycle50MHz, EnumSpiOperationReadData},
  242. {EnumSpiOpcodeWrite, SPI_COMMAND_BLOCK_ERASE, EnumSpiCycle50MHz, EnumSpiOperationErase_64K_Byte},
  243. {EnumSpiOpcodeReadNoAddr, SPI_COMMAND_READ_S, EnumSpiCycle50MHz, EnumSpiOperationReadStatus},
  244. {EnumSpiOpcodeWriteNoAddr, SPI_COMMAND_CHIP_ERASE, EnumSpiCycle50MHz, EnumSpiOperationFullChipErase}
  245. },
  246. 0x800000 - FLASH_SIZE, // BIOS Start Offset
  247. FLASH_SIZE // BIOS image size in flash
  248. },
  249. //
  250. // Winbond 64Mbit part bottom boot
  251. //
  252. {
  253. SPI_W25X64_ID1,
  254. SF_DEVICE_ID0_W25QXX,
  255. SF_DEVICE_ID1_W25Q64,
  256. {
  257. SPI_COMMAND_WRITE_ENABLE,
  258. SPI_COMMAND_WRITE_S_EN
  259. },
  260. {
  261. {EnumSpiOpcodeReadNoAddr, SPI_COMMAND_JEDEC_ID, EnumSpiCycle50MHz, EnumSpiOperationJedecId},
  262. {EnumSpiOpcodeRead, SPI_COMMAND_READ_ID, EnumSpiCycle50MHz, EnumSpiOperationOther},
  263. {EnumSpiOpcodeWriteNoAddr, SPI_COMMAND_WRITE_S, EnumSpiCycle50MHz, EnumSpiOperationWriteStatus},
  264. {EnumSpiOpcodeWrite, SPI_COMMAND_WRITE, EnumSpiCycle50MHz, EnumSpiOperationProgramData_1_Byte},
  265. {EnumSpiOpcodeRead, SPI_COMMAND_READ, EnumSpiCycle50MHz, EnumSpiOperationReadData},
  266. {EnumSpiOpcodeWrite, SPI_COMMAND_ERASE, EnumSpiCycle50MHz, EnumSpiOperationErase_4K_Byte},
  267. {EnumSpiOpcodeReadNoAddr, SPI_COMMAND_READ_S, EnumSpiCycle50MHz, EnumSpiOperationReadStatus},
  268. {EnumSpiOpcodeWriteNoAddr, SPI_COMMAND_CHIP_ERASE, EnumSpiCycle50MHz, EnumSpiOperationFullChipErase}
  269. },
  270. 0x800000 - FLASH_SIZE, // BIOS Start Offset
  271. FLASH_SIZE // BIOS image size in flash
  272. },
  273. //
  274. // Winbond 64Mbit part bottom boot
  275. //
  276. {
  277. SPI_W25X64_ID1,
  278. SPI_W25X64_ID2,
  279. SPI_W25X64_ID3,
  280. {
  281. SPI_COMMAND_WRITE_ENABLE,
  282. SPI_COMMAND_WRITE_S_EN
  283. },
  284. {
  285. {EnumSpiOpcodeReadNoAddr, SPI_COMMAND_JEDEC_ID, EnumSpiCycle50MHz, EnumSpiOperationJedecId},
  286. {EnumSpiOpcodeRead, SPI_COMMAND_READ_ID, EnumSpiCycle50MHz, EnumSpiOperationOther},
  287. {EnumSpiOpcodeWriteNoAddr, SPI_COMMAND_WRITE_S, EnumSpiCycle50MHz, EnumSpiOperationWriteStatus},
  288. {EnumSpiOpcodeWrite, SPI_COMMAND_WRITE, EnumSpiCycle50MHz, EnumSpiOperationProgramData_1_Byte},
  289. {EnumSpiOpcodeRead, SPI_COMMAND_READ, EnumSpiCycle50MHz, EnumSpiOperationReadData},
  290. {EnumSpiOpcodeWrite, SPI_COMMAND_ERASE, EnumSpiCycle50MHz, EnumSpiOperationErase_4K_Byte},
  291. {EnumSpiOpcodeReadNoAddr, SPI_COMMAND_READ_S, EnumSpiCycle50MHz, EnumSpiOperationReadStatus},
  292. {EnumSpiOpcodeWriteNoAddr, SPI_COMMAND_CHIP_ERASE, EnumSpiCycle50MHz, EnumSpiOperationFullChipErase}
  293. },
  294. 0x800000 - FLASH_SIZE, // BIOS Start Offset
  295. FLASH_SIZE // BIOS image size in flash
  296. },
  297. //
  298. // Intel 64Mbit part bottom boot
  299. //
  300. {
  301. SPI_QH25F640_ID1,
  302. SPI_QH25F640_ID2,
  303. SPI_QH25F640_ID3,
  304. {
  305. SPI_COMMAND_WRITE_ENABLE,
  306. SPI_COMMAND_WRITE_S_EN
  307. },
  308. {
  309. {EnumSpiOpcodeReadNoAddr, SPI_COMMAND_JEDEC_ID, EnumSpiCycle33MHz, EnumSpiOperationJedecId},
  310. {EnumSpiOpcodeRead, SPI_COMMAND_READ_ID, EnumSpiCycle33MHz, EnumSpiOperationOther},
  311. {EnumSpiOpcodeWriteNoAddr, SPI_COMMAND_WRITE_S, EnumSpiCycle33MHz, EnumSpiOperationWriteStatus},
  312. {EnumSpiOpcodeWrite, SPI_COMMAND_WRITE, EnumSpiCycle33MHz, EnumSpiOperationProgramData_1_Byte},
  313. {EnumSpiOpcodeRead, SPI_COMMAND_READ, EnumSpiCycle33MHz, EnumSpiOperationReadData},
  314. {EnumSpiOpcodeWrite, SPI_COMMAND_BLOCK_ERASE, EnumSpiCycle33MHz, EnumSpiOperationErase_64K_Byte},
  315. {EnumSpiOpcodeReadNoAddr, SPI_COMMAND_READ_S, EnumSpiCycle33MHz, EnumSpiOperationReadStatus},
  316. {EnumSpiOpcodeWriteNoAddr, SPI_COMMAND_CHIP_ERASE, EnumSpiCycle33MHz, EnumSpiOperationFullChipErase}
  317. },
  318. 0x800000 - FLASH_SIZE, // BIOS Start Offset
  319. FLASH_SIZE // BIOS image size in flash
  320. }
  321. };