Armada70x0DbBoardDescLib.c 3.2 KB

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  1. /**
  2. *
  3. * Copyright (C) 2018, Marvell International Ltd. and its affiliates.
  4. *
  5. * SPDX-License-Identifier: BSD-2-Clause-Patent
  6. *
  7. **/
  8. #include <Uefi.h>
  9. #include <Library/ArmadaBoardDescLib.h>
  10. #include <Library/BaseMemoryLib.h>
  11. #include <Library/DebugLib.h>
  12. #include <Library/IoLib.h>
  13. #include <Library/MemoryAllocationLib.h>
  14. #include <Library/MvGpioLib.h>
  15. #include <Library/UefiBootServicesTableLib.h>
  16. //
  17. // GPIO Expander
  18. //
  19. STATIC MV_GPIO_EXPANDER mGpioExpander = {
  20. PCA9555_ID,
  21. 0x21,
  22. 0x0,
  23. };
  24. EFI_STATUS
  25. EFIAPI
  26. ArmadaBoardGpioExpanderGet (
  27. IN OUT MV_GPIO_EXPANDER **GpioExpanders,
  28. IN OUT UINTN *GpioExpanderCount
  29. )
  30. {
  31. *GpioExpanderCount = 1;
  32. *GpioExpanders = &mGpioExpander;
  33. return EFI_SUCCESS;
  34. }
  35. //
  36. // PCIE
  37. //
  38. STATIC
  39. MV_PCIE_CONTROLLER mPcieController[] = {
  40. { /* PCIE2 @0xF2640000 */
  41. .PcieDbiAddress = 0xF2640000,
  42. .ConfigSpaceAddress = 0xE0000000,
  43. .HaveResetGpio = FALSE,
  44. .PcieResetGpio = { 0 },
  45. .PcieBusMin = 0,
  46. .PcieBusMax = 0xFE,
  47. .PcieIoTranslation = 0xEFF00000,
  48. .PcieIoWinBase = 0x0,
  49. .PcieIoWinSize = 0x10000,
  50. .PcieMmio32Translation = 0,
  51. .PcieMmio32WinBase = 0xC0000000,
  52. .PcieMmio32WinSize = 0x20000000,
  53. .PcieMmio64Translation = 0,
  54. .PcieMmio64WinBase = 0x800000000,
  55. .PcieMmio64WinSize = 0x100000000,
  56. }
  57. };
  58. /**
  59. Return the number and description of PCIE controllers used on the platform.
  60. @param[in out] **PcieControllers Array containing PCIE controllers'
  61. description.
  62. @param[in out] *PcieControllerCount Amount of used PCIE controllers.
  63. @retval EFI_SUCCESS The data were obtained successfully.
  64. @retval other Return error status.
  65. **/
  66. EFI_STATUS
  67. EFIAPI
  68. ArmadaBoardPcieControllerGet (
  69. IN OUT MV_PCIE_CONTROLLER CONST **PcieControllers,
  70. IN OUT UINTN *PcieControllerCount
  71. )
  72. {
  73. *PcieControllers = mPcieController;
  74. *PcieControllerCount = ARRAY_SIZE (mPcieController);
  75. return EFI_SUCCESS;
  76. }
  77. //
  78. // Order of devices in SdMmcDescTemplate has to be in par with ArmadaSoCDescLib
  79. //
  80. STATIC
  81. MV_BOARD_SDMMC_DESC mSdMmcDescTemplate[] = {
  82. { /* eMMC 0xF06E0000 */
  83. 0, /* SOC will be filled by MvBoardDescDxe */
  84. 0, /* SdMmcDevCount will be filled by MvBoardDescDxe */
  85. FALSE, /* Xenon1v8Enabled */
  86. FALSE, /* Xenon8BitBusEnabled */
  87. TRUE, /* XenonSlowModeEnabled */
  88. 0x40, /* XenonTuningStepDivisor */
  89. EmbeddedSlot /* SlotType */
  90. },
  91. { /* SD/MMC 0xF2780000 */
  92. 0, /* SOC will be filled by MvBoardDescDxe */
  93. 0, /* SdMmcDevCount will be filled by MvBoardDescDxe */
  94. TRUE, /* Xenon1v8Enabled */
  95. FALSE, /* Xenon8BitBusEnabled */
  96. FALSE, /* XenonSlowModeEnabled */
  97. 0x19, /* XenonTuningStepDivisor */
  98. EmbeddedSlot /* SlotType */
  99. }
  100. };
  101. EFI_STATUS
  102. EFIAPI
  103. ArmadaBoardDescSdMmcGet (
  104. OUT UINTN *SdMmcDevCount,
  105. OUT MV_BOARD_SDMMC_DESC **SdMmcDesc
  106. )
  107. {
  108. *SdMmcDesc = mSdMmcDescTemplate;
  109. *SdMmcDevCount = ARRAY_SIZE (mSdMmcDescTemplate);
  110. return EFI_SUCCESS;
  111. }