PlatformPkgPcd.dsc 18 KB

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  1. ## @file
  2. #
  3. # Copyright (c) 2018, Intel Corporation. All rights reserved.<BR>
  4. # Copyright (c) 2021, American Megatrends International LLC.<BR>
  5. # SPDX-License-Identifier: BSD-2-Clause-Patent
  6. #
  7. ##
  8. ################################################################################
  9. #
  10. # Pcd Section - list of all PCD Entries defined by this board.
  11. #
  12. ################################################################################
  13. [PcdsFixedAtBuild.common]
  14. ######################################
  15. # Key Boot Stage and FSP configuration
  16. ######################################
  17. #
  18. # Please select the Boot Stage here.
  19. # Stage 1 - enable debug (system deadloop after debug init)
  20. # Stage 2 - mem init (system deadloop after mem init)
  21. # Stage 3 - boot to shell only
  22. # Stage 4 - boot to OS
  23. # Stage 5 - boot to OS with security boot enabled
  24. # Stage 6 - boot with advanced features enabled
  25. #
  26. gMinPlatformPkgTokenSpaceGuid.PcdBootStage|4
  27. [PcdsFeatureFlag.common]
  28. gPlatformTokenSpaceGuid.PcdLockCsrSsidSvidRegister|FALSE
  29. # Server doesn't support capsle update on Reset.
  30. gEfiMdeModulePkgTokenSpaceGuid.PcdSupportUpdateCapsuleReset|FALSE
  31. gEfiCpuTokenSpaceGuid.PcdCpuSmmEnableBspElection|TRUE
  32. gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmEnableBspElection|TRUE
  33. gEfiCpuTokenSpaceGuid.PcdCpuHotPlugSupport|TRUE
  34. gUefiCpuPkgTokenSpaceGuid.PcdCpuHotPlugSupport|TRUE
  35. gEfiMdeModulePkgTokenSpaceGuid.PcdPciBusHotplugDeviceSupport|FALSE
  36. #S3 add
  37. gEfiMdeModulePkgTokenSpaceGuid.PcdDxeIplSwitchToLongMode|TRUE
  38. #S3 add
  39. gEfiCpuTokenSpaceGuid.PcdCpuConroeFamilyFlag|FALSE
  40. gEfiCpuTokenSpaceGuid.PcdCpuCedarMillFamilyFlag|FALSE
  41. gEfiCpuTokenSpaceGuid.PcdCpuPrescottFamilyFlag|FALSE
  42. gEfiCpuTokenSpaceGuid.PcdCpuNehalemFamilyFlag|FALSE
  43. gEfiCpuTokenSpaceGuid.PcdCpuIvyBridgeFamilyFlag|FALSE
  44. gEfiCpuTokenSpaceGuid.PcdCpuSandyBridgeFamilyFlag|FALSE
  45. gEfiCpuTokenSpaceGuid.PcdCpuHaswellFamilyFlag|TRUE
  46. gEfiCpuTokenSpaceGuid.PcdCpuSkylakeFamilyFlag|TRUE
  47. gEfiCpuTokenSpaceGuid.PcdCpuGateA20MDisableFlag|FALSE
  48. gEfiCpuTokenSpaceGuid.PcdCpuSmmDebug|TRUE
  49. gEfiCpuTokenSpaceGuid.PcdCpuSelectLfpAsBspFlag|TRUE
  50. gEfiCpuTokenSpaceGuid.PcdCpuSocketIdReassignmentFlag|TRUE
  51. ## This PCD specified whether ACPI SDT protocol is installed.
  52. gEfiMdeModulePkgTokenSpaceGuid.PcdInstallAcpiSdtProtocol|TRUE
  53. ######################################
  54. # Platform Configuration
  55. ######################################
  56. #
  57. # MinPlatform common include for required feature PCD
  58. # These PCD must be set before the core include files, CoreCommonLib,
  59. # CorePeiLib, and CoreDxeLib.
  60. # Optional MinPlatformPkg features should be enabled after this
  61. #
  62. !include MinPlatformPkg/Include/Dsc/MinPlatformFeaturesPcd.dsc.inc
  63. #
  64. # Commonly used MinPlatform feature configuration logic that maps functionity to stage
  65. #
  66. !include BoardModulePkg/Include/Dsc/CommonStageConfig.dsc.inc
  67. [PcdsFeatureFlag.X64]
  68. gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStackGuard|FALSE
  69. [PcdsFeatureFlag]
  70. gEfiMdeModulePkgTokenSpaceGuid.PcdBrowerGrayOutReadOnlyMenu|TRUE
  71. gNetworkFeaturePkgTokenSpaceGuid.PcdNetworkFeatureEnable|TRUE
  72. gSmbiosFeaturePkgTokenSpaceGuid.PcdSmbiosFeatureEnable|TRUE
  73. gIpmiFeaturePkgTokenSpaceGuid.PcdIpmiFeatureEnable|TRUE
  74. [PcdsDynamicExDefault]
  75. !include $(PROJECT)/StructureConfig.dsc
  76. [PcdsFixedAtBuild.X64]
  77. gMinPlatformPkgTokenSpaceGuid.PcdTrustedConsoleOutputDevicePath|{0x02, 0x01, 0x0C, 0x00, 0xd0, 0x41, 0x03, 0x0A, 0x01, 0x00, 0x00, 0x00, 0x01, 0x01, 0x06, 0x00, 0x00, 0x01, 0x01, 0x01, 0x06, 0x00, 0x00, 0x01, 0x7F, 0xFF, 0x04, 0x00}
  78. [PcdsFixedAtBuild.IA32]
  79. gCpuUncoreTokenSpaceGuid.PcdFlashSecCacheRegionBase|0x00FFA00000
  80. gCpuUncoreTokenSpaceGuid.PcdFlashSecCacheRegionSize|0x0000600000
  81. [PcdsFixedAtBuild.common]
  82. gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationChange|TRUE
  83. !if $(TARGET) == "RELEASE"
  84. gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x0
  85. gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x03
  86. !else
  87. gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x2F
  88. gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x07
  89. !endif
  90. !if $(TARGET) == RELEASE
  91. gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseSerial|FALSE
  92. !else
  93. gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseSerial|TRUE
  94. !endif
  95. gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x07
  96. gEfiMdeModulePkgTokenSpaceGuid.PcdLoadModuleAtFixAddressEnable|0
  97. gEfiMdeModulePkgTokenSpaceGuid.PcdHwErrStorageSize|0x0
  98. #S3 modified
  99. gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x10000
  100. gEfiMdeModulePkgTokenSpaceGuid.PcdShadowPeimOnS3Boot|TRUE
  101. #S3 modified
  102. gEfiMdeModulePkgTokenSpaceGuid.PcdHwErrStorageSize|0x0
  103. gEfiMdePkgTokenSpaceGuid.PcdPerformanceLibraryPropertyMask|0x0
  104. gEfiMdePkgTokenSpaceGuid.PcdFSBClock|133333333
  105. gEfiMdeModulePkgTokenSpaceGuid.PcdPeiCoreMaxPeiStackSize|0x100000
  106. gEfiMdeModulePkgTokenSpaceGuid.PcdMaxSizeNonPopulateCapsule|0x1700000
  107. gEfiCpuTokenSpaceGuid.PcdCpuIEDRamSize|0x400000
  108. gEfiCpuTokenSpaceGuid.PcdCpuSmmApSyncTimeout|10000
  109. gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmApSyncTimeout|10000
  110. gEfiCpuTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber|512
  111. gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber|512
  112. gEfiCpuTokenSpaceGuid.PcdPlatformType|2
  113. gEfiCpuTokenSpaceGuid.PcdPlatformCpuMaxCoreFrequency|4000
  114. gEfiCpuTokenSpaceGuid.PcdPlatformCpuMaxFsbFrequency|1066
  115. gEfiCpuTokenSpaceGuid.PcdCpuSmmStackSize|0x10000
  116. gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStackSize|0x10000
  117. ## Specifies delay value in microseconds after sending out an INIT IPI.
  118. # @Prompt Configure delay value after send an INIT IPI
  119. gUefiCpuPkgTokenSpaceGuid.PcdCpuInitIpiDelayInMicroSeconds|10
  120. ## Specifies max supported number of Logical Processors.
  121. # @Prompt Configure max supported number of Logical Processorss
  122. gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber|512
  123. gUefiCpuPkgTokenSpaceGuid.PcdCpuApStackSize|0x1000
  124. !if gMinPlatformPkgTokenSpaceGuid.PcdPerformanceEnable == TRUE
  125. gEfiMdePkgTokenSpaceGuid.PcdPerformanceLibraryPropertyMask|0x1
  126. !endif
  127. gPlatformTokenSpaceGuid.PcdBusStack|0x06
  128. gPlatformTokenSpaceGuid.PcdUboDev|0x08
  129. gPlatformTokenSpaceGuid.PcdUboFunc|0x02
  130. gPlatformTokenSpaceGuid.PcdUboCpuBusNo0|0xCC
  131. gEfiCpuTokenSpaceGuid.PcdCpuIEDEnabled|TRUE
  132. ## Defines the ACPI register set base address.
  133. # The invalid 0xFFFF is as its default value. It must be configured to the real value.
  134. # @Prompt ACPI Timer IO Port Address
  135. gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPortBaseAddress | 0x0500
  136. ## Defines the PCI Bus Number of the PCI device that contains the BAR and Enable for ACPI hardware registers.
  137. # @Prompt ACPI Hardware PCI Bus Number
  138. gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciBusNumber | 0x00
  139. gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemRevision|0x00000002
  140. gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultCreatorId|0x4C544E49
  141. gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultCreatorRevision|0x20091013
  142. ## Defines the PCI Device Number of the PCI device that contains the BAR and Enable for ACPI hardware registers.
  143. # The invalid 0xFF is as its default value. It must be configured to the real value.
  144. # @Prompt ACPI Hardware PCI Device Number
  145. gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciDeviceNumber | 0x1F
  146. ## Defines the PCI Function Number of the PCI device that contains the BAR and Enable for ACPI hardware registers.
  147. # The invalid 0xFF is as its default value. It must be configured to the real value.
  148. # @Prompt ACPI Hardware PCI Function Number
  149. gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciFunctionNumber | 0x02
  150. ## Defines the PCI Register Offset of the PCI device that contains the Enable for ACPI hardware registers.
  151. # The invalid 0xFFFF is as its default value. It must be configured to the real value.
  152. # @Prompt ACPI Hardware PCI Register Offset
  153. gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciEnableRegisterOffset |0x0044
  154. ## Defines the bit mask that must be set to enable the APIC hardware register BAR.
  155. # @Prompt ACPI Hardware PCI Bar Enable BitMask
  156. gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoBarEnableMask | 0x80
  157. ## Defines the PCI Register Offset of the PCI device that contains the BAR for ACPI hardware registers.
  158. # The invalid 0xFFFF is as its default value. It must be configured to the real value.
  159. # @Prompt ACPI Hardware PCI Bar Register Offset
  160. gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciBarRegisterOffset |0x0040
  161. ## Defines the offset to the 32-bit Timer Value register that resides within the ACPI BAR.
  162. # @Prompt Offset to 32-bit Timer register in ACPI BAR
  163. gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiPm1TmrOffset |0x0008
  164. ## Defines the bit mask to retrieve ACPI IO Port Base Address
  165. # @Prompt ACPI IO Port Base Address Mask
  166. gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPortBaseAddressMask |0xFFFC
  167. # Indicates the max nested level
  168. gEfiCpRcPkgTokenSpaceGuid.PcdMaxNestedLevel|0x00000010
  169. gEfiCpRcPkgTokenSpaceGuid.PcdMaxCpuSocketCount|$(MAX_SOCKET)
  170. gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuSocketCount|$(MAX_SOCKET)
  171. gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuCoreCount|28
  172. gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationChange|FALSE
  173. gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiAcpiReclaimMemorySize|0x70
  174. gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiAcpiNvsMemorySize|0x80
  175. gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiReservedMemorySize|0x1470
  176. gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiRtDataMemorySize|0xA0
  177. gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiRtCodeMemorySize|0x80
  178. #
  179. # The PCDs are used to control the Windows SMM Security Mitigations Table - Protection Flags
  180. #
  181. # BIT0: If set, expresses that for all synchronous SMM entries,SMM will validate that input and output buffers lie entirely within the expected fixed memory regions.
  182. # BIT1: If set, expresses that for all synchronous SMM entries, SMM will validate that input and output pointers embedded within the fixed communication buffer only refer to address ranges \
  183. # that lie entirely within the expected fixed memory regions.
  184. # BIT2: Firmware setting this bit is an indication that it will not allow reconfiguration of system resources via non-architectural mechanisms.
  185. # BIT3-31: Reserved
  186. #
  187. gMinPlatformPkgTokenSpaceGuid.PcdWsmtProtectionFlags|0x07
  188. [PcdsFixedAtBuild.X64]
  189. gPcAtChipsetPkgTokenSpaceGuid.PcdMinimalValidYear|2015
  190. gPcAtChipsetPkgTokenSpaceGuid.PcdMaximalValidYear|2099
  191. # Change PcdBootManagerMenuFile to UiApp
  192. ##
  193. gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x21, 0xaa, 0x2c, 0x46, 0x14, 0x76, 0x03, 0x45, 0x83, 0x6e, 0x8a, 0xb6, 0xf4, 0x66, 0x23, 0x31 }
  194. gEfiCpuTokenSpaceGuid.PcdCpuSmmCodeAccessCheckEnable |TRUE
  195. gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmCodeAccessCheckEnable |TRUE
  196. gMinPlatformPkgTokenSpaceGuid.PcdAcpiEnableSwSmi|0xA0
  197. gMinPlatformPkgTokenSpaceGuid.PcdAcpiDisableSwSmi|0xA1
  198. gMinPlatformPkgTokenSpaceGuid.PcdLocalApicAddress|0xFEE00000
  199. gMinPlatformPkgTokenSpaceGuid.PcdIoApicAddress|0xFEC00000
  200. gMinPlatformPkgTokenSpaceGuid.PcdIoApicId|0x08
  201. gMinPlatformPkgTokenSpaceGuid.PcdPcIoApicCount|32
  202. gMinPlatformPkgTokenSpaceGuid.PcdPcIoApicIdBase|0x09
  203. gMinPlatformPkgTokenSpaceGuid.PcdPcIoApicAddressBase|0xFEC01000
  204. gMinPlatformPkgTokenSpaceGuid.PcdPcIoApicInterruptBase|24
  205. gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1AEventBlockAddress|0x500
  206. gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1BEventBlockAddress|0
  207. gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1AControlBlockAddress|0x504
  208. gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1BControlBlockAddress|0
  209. gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm2ControlBlockAddress|0x550
  210. gMinPlatformPkgTokenSpaceGuid.PcdAcpiPmTimerBlockAddress|0x508
  211. gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe0BlockAddress|0x580
  212. gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe1BlockAddress|0
  213. [PcdsPatchableInModule.common]
  214. gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x80000042
  215. gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0x80000000
  216. gMinPlatformPkgTokenSpaceGuid.PcdPciExpressRegionLength|0x10000000
  217. gPcAtChipsetPkgTokenSpaceGuid.PcdHpetBaseAddress|0xFED00000
  218. gMinPlatformPkgTokenSpaceGuid.PcdPciReservedIobase |0x1000
  219. gMinPlatformPkgTokenSpaceGuid.PcdPciReservedIoLimit |0xFFFF
  220. gMinPlatformPkgTokenSpaceGuid.PcdPciReservedMemBase |0x90000000
  221. gMinPlatformPkgTokenSpaceGuid.PcdPciReservedMemLimit |0xFBFFFFFF
  222. gMinPlatformPkgTokenSpaceGuid.PcdPciReservedMemAbove4GBBase |0x380000000000
  223. gMinPlatformPkgTokenSpaceGuid.PcdPciReservedMemAbove4GBLimit |0x3803FFFFFFFF
  224. gEfiMdeModulePkgTokenSpaceGuid.PcdVideoHorizontalResolution|800
  225. gEfiMdeModulePkgTokenSpaceGuid.PcdVideoVerticalResolution|600
  226. gEfiCpuTokenSpaceGuid.PcdCpuSmmUseDelayIndication|FALSE
  227. gEfiCpuTokenSpaceGuid.PcdCpuSmmUseBlockIndication|FALSE
  228. gEfiCpuTokenSpaceGuid.PcdCpuSmmUseSmmEnableIndication|FALSE
  229. gEfiMdeModulePkgTokenSpaceGuid.PcdUse1GPageTable|TRUE
  230. gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress|0xFF800000
  231. gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize|0x01400000
  232. [PcdsDynamicExDefault.common.DEFAULT]
  233. gEfiCpuTokenSpaceGuid.PcdCpuProcessorFeatureUserConfiguration|0x002CF6CF
  234. gEfiCpuTokenSpaceGuid.PcdCpuProcessorFeatureUserConfigurationEx1|0
  235. gUefiCpuPkgTokenSpaceGuid.PcdCpuApInitTimeOutInMicroSeconds|30000
  236. gEfiCpuTokenSpaceGuid.PcdCpuApInitTimeOutInMicroSeconds|200000
  237. gEfiMdeModulePkgTokenSpaceGuid.PcdAriSupport|TRUE
  238. gUefiCpuPkgTokenSpaceGuid.PcdCpuS3DataAddress|0
  239. gEfiPchTokenSpaceGuid.PcdWakeOnRTCS5|FALSE
  240. gEfiPchTokenSpaceGuid.PcdRtcWakeupTimeHour|0
  241. gEfiPchTokenSpaceGuid.PcdRtcWakeupTimeMinute|0
  242. gEfiPchTokenSpaceGuid.PcdRtcWakeupTimeSecond|0
  243. gOemSkuTokenSpaceGuid.PcdOemSkuUplinkPortIndex|0x5
  244. [PcdsDynamicExHii.common.DEFAULT]
  245. !if gPlatformTokenSpaceGuid.PcdFastBoot == FALSE
  246. gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|L"Timeout"|gEfiGlobalVariableGuid|0x0|3 # Variable: L"Timeout"
  247. !else
  248. gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|L"Timeout"|gEfiGlobalVariableGuid|0x0|0 # Variable: L"Timeout"
  249. !endif
  250. gEfiMdePkgTokenSpaceGuid.PcdHardwareErrorRecordLevel|L"HwErrRecSupport"|gEfiGlobalVariableGuid|0x0|1 # Variable: L"HwErrRecSupport"
  251. [PcdsDynamicExDefault]
  252. gOemSkuTokenSpaceGuid.PcdForceTo1SConfigMode|FALSE
  253. ## *** PURLEY_PPO *** - Added in 8th segment in PcdPcieMmcfgTablePtr to fix size assert in PcieAddressLib.c
  254. ## | MMCFG Table Header | Segment 0 | Segment 1 | Segment 2 | Segment 3 | Segment 4 | Segment 5 | Segment 6 | Segment 7 | Segment 8
  255. gEfiCpRcPkgTokenSpaceGuid.PcdPcieMmcfgTablePtr|{0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}
  256. gEfiCpuTokenSpaceGuid.PcdCpuEnergyPolicy|0
  257. gEfiCpuTokenSpaceGuid.PcdCpuAcpiLvl2Addr|0
  258. gEfiCpuTokenSpaceGuid.PcdCpuPackageCStateLimit|0
  259. gEfiCpuTokenSpaceGuid.PcdCpuCoreCStateValue|0
  260. gEfiCpuTokenSpaceGuid.PcdCpuClockModulationDutyCycle|0
  261. gEfiCpuTokenSpaceGuid.PcdCpuHwCoordination|TRUE
  262. gEfiCpuTokenSpaceGuid.PcdCpuDcuMode|0
  263. gEfiCpuTokenSpaceGuid.PcdCpuTurboOverride|0x0
  264. gEfiCpuTokenSpaceGuid.PcdCpuProcessorMsrLockCtrl|0
  265. gEfiCpuTokenSpaceGuid.PcdCpuIioLlcWaysBitMask|0x0
  266. gEfiCpuTokenSpaceGuid.PcdCpuExpandedIioLlcWaysBitMask|0x0
  267. gEfiCpuTokenSpaceGuid.PcdCpuRemoteWaysBitMask|0x0
  268. gEfiCpuTokenSpaceGuid.PcdPchTraceHubEn|0x0
  269. gEfiCpuTokenSpaceGuid.PcdCpuQlruCfgBitMask|0x0
  270. gEfiCpuTokenSpaceGuid.PcdSbspSelection|0xFF
  271. # gEfiCpuTokenSpaceGuid.PcdCpuSocketId|{0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x1,0x0,0x0,0x0,0x1,0x0,0x0,0x0,0x2,0x0,0x0,0x0,0x2,0x0,0x0,0x0,0x3,0x0,0x0,0x0,0x3,0x0,0x0,0x0}
  272. gEfiCpuTokenSpaceGuid.PcdCpuPmStructAddr|0x0
  273. gEfiCpuTokenSpaceGuid.PcdCpuRRQCountThreshold|0x0
  274. gEfiMdeModulePkgTokenSpaceGuid.PcdSrIovSupport|TRUE
  275. gEfiMdeModulePkgTokenSpaceGuid.PcdAriSupport|TRUE
  276. gEfiMdeModulePkgTokenSpaceGuid.PcdMrIovSupport|FALSE
  277. gEfiMdeModulePkgTokenSpaceGuid.PcdSrIovSystemPageSize|0x1F
  278. gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L""|VOID*|36
  279. gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemId|{0x49, 0x4E, 0x54, 0x45, 0x4C, 0x20}
  280. gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemTableId|0x2046573030363253
  281. gMinPlatformPkgTokenSpaceGuid.PcdPcIoApicEnable|0x0
  282. gMinPlatformPkgTokenSpaceGuid.PcdFadtPreferredPmProfile|0x04
  283. gMinPlatformPkgTokenSpaceGuid.PcdFadtIaPcBootArch|0x0000
  284. gMinPlatformPkgTokenSpaceGuid.PcdFadtFlags|0x000004A5
  285. [PcdsDynamicExDefault.X64]
  286. gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate|115200
  287. gEfiMdePkgTokenSpaceGuid.PcdUartDefaultDataBits|8
  288. gEfiMdePkgTokenSpaceGuid.PcdUartDefaultParity|1
  289. gEfiMdePkgTokenSpaceGuid.PcdUartDefaultStopBits|1
  290. gEfiMdePkgTokenSpaceGuid.PcdDefaultTerminalType|0
  291. gEfiMdeModulePkgTokenSpaceGuid.PcdConOutRow|31
  292. gEfiMdeModulePkgTokenSpaceGuid.PcdConOutColumn|100
  293. gEfiMdeModulePkgTokenSpaceGuid.PcdSetupVideoHorizontalResolution|800
  294. gEfiMdeModulePkgTokenSpaceGuid.PcdSetupVideoVerticalResolution|600
  295. gUefiCpuPkgTokenSpaceGuid.PcdCpuHotPlugDataAddress|0