OemMiscLib2PHi1610.c 2.8 KB

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  1. /** @file
  2. *
  3. * Copyright (c) 2015, Hisilicon Limited. All rights reserved.
  4. * Copyright (c) 2015, Linaro Limited. All rights reserved.
  5. *
  6. * SPDX-License-Identifier: BSD-2-Clause-Patent
  7. *
  8. **/
  9. #include <Uefi.h>
  10. #include <Library/BaseMemoryLib.h>
  11. #include <Library/DebugLib.h>
  12. #include <Library/IoLib.h>
  13. #include <Library/TimerLib.h>
  14. #include <Library/SerialPortLib.h>
  15. #include <Library/OemMiscLib.h>
  16. #include <PlatformArch.h>
  17. #include <Library/PlatformSysCtrlLib.h>
  18. #include <Library/OemAddressMapLib.h>
  19. #include <Library/LpcLib.h>
  20. REPORT_PCIEDIDVID2BMC PcieDeviceToReport[PCIEDEVICE_REPORT_MAX] = {
  21. {67,0,0,0},
  22. {225,0,0,3},
  23. {0xFFFF,0xFFFF,0xFFFF,0xFFFF},
  24. {0xFFFF,0xFFFF,0xFFFF,0xFFFF}
  25. };
  26. REPORT_PCIEDIDVID2BMC PcieDeviceToReport2P[PCIEDEVICE_REPORT_MAX] = {
  27. {0x79,0,0,0},
  28. {0xFF,0xFF,0xFF,1},
  29. {0xC1,0,0,2},
  30. {0xF9,0,0,3},
  31. {0xFF,0xFF,0xFF,4},
  32. {0x11,0,0,5},
  33. {0x31,0,0,6},
  34. {0x21,0,0,7}
  35. };
  36. VOID
  37. GetPciDidVid (
  38. REPORT_PCIEDIDVID2BMC *Report
  39. )
  40. {
  41. if (OemIsMpBoot ()) {
  42. (VOID)CopyMem (
  43. (VOID *)Report,
  44. (VOID *)PcieDeviceToReport2P,
  45. sizeof (PcieDeviceToReport2P)
  46. );
  47. } else {
  48. (VOID)CopyMem (
  49. (VOID *)Report,
  50. (VOID *)PcieDeviceToReport,
  51. sizeof (PcieDeviceToReport)
  52. );
  53. }
  54. }
  55. // Right now we only support 1P
  56. BOOLEAN OemIsSocketPresent (UINTN Socket)
  57. {
  58. if (0 == Socket)
  59. {
  60. return TRUE;
  61. }
  62. if(1 == Socket)
  63. {
  64. return TRUE;
  65. }
  66. return FALSE;
  67. }
  68. UINTN OemGetSocketNumber (VOID)
  69. {
  70. if(!OemIsMpBoot())
  71. {
  72. return 1;
  73. }
  74. return 2;
  75. }
  76. UINTN OemGetDdrChannel (VOID)
  77. {
  78. return 4;
  79. }
  80. UINTN OemGetDimmSlot(UINTN Socket, UINTN Channel)
  81. {
  82. return 2;
  83. }
  84. // Nothing to do for EVB
  85. VOID OemPostEndIndicator (VOID)
  86. {
  87. DEBUG((EFI_D_ERROR,"M3 release reset CONFIG........."));
  88. MmioWrite32(0xd0002180, 0x3);
  89. MmioWrite32(0xd0002194, 0xa4);
  90. MmioWrite32(0xd0000a54, 0x1);
  91. MicroSecondDelay(10000);
  92. MmioWrite32(0xd0002108, 0x1);
  93. MmioWrite32(0xd0002114, 0x1);
  94. MmioWrite32(0xd0002120, 0x1);
  95. MmioWrite32(0xd0003108, 0x1);
  96. MicroSecondDelay(500000);
  97. DEBUG((EFI_D_ERROR,"Done\n"));
  98. }
  99. VOID CoreSelectBoot(VOID)
  100. {
  101. if (!PcdGet64 (PcdTrustedFirmwareEnable))
  102. {
  103. StartUpBSP ();
  104. }
  105. return;
  106. }
  107. BOOLEAN OemIsMpBoot()
  108. {
  109. UINT32 Tmp;
  110. Tmp = MmioRead32(0x602E0050);
  111. if ( ((Tmp >> 10) & 0xF) == 0x3)
  112. return TRUE;
  113. else
  114. return FALSE;
  115. }
  116. VOID OemLpcInit(VOID)
  117. {
  118. LpcInit();
  119. return;
  120. }
  121. UINT32 OemIsWarmBoot(VOID)
  122. {
  123. return 0;
  124. }
  125. VOID OemBiosSwitch(UINT32 Master)
  126. {
  127. (VOID)Master;
  128. return;
  129. }
  130. BOOLEAN OemIsNeedDisableExpanderBuffer(VOID)
  131. {
  132. return TRUE;
  133. }