PlatformPkg.fdf 36 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963
  1. #/** @file
  2. # FDF file of Platform.
  3. #
  4. # Copyright (c) 2008 - 2019, Intel Corporation. All rights reserved.<BR>
  5. #
  6. # SPDX-License-Identifier: BSD-2-Clause-Patent
  7. #
  8. #
  9. #**/
  10. [Defines]
  11. DEFINE FLASH_BASE = 0xFF800000 #The base address of the 4Mb FLASH Device.
  12. DEFINE FLASH_SIZE = 0x00800000 #The flash size in bytes of the 4Mb FLASH Device.
  13. DEFINE FLASH_BLOCK_SIZE = 0x1000 #The block size in bytes of the 4Mb FLASH Device.
  14. DEFINE FLASH_NUM_BLOCKS = 0x800 #The number of blocks in 4Mb FLASH Device.
  15. DEFINE FLASH_AREA_BASE_ADDRESS = 0xFF800000
  16. DEFINE FLASH_AREA_SIZE = 0x00800000
  17. DEFINE FLASH_REGION_VLVMICROCODE_OFFSET = 0x00400000
  18. DEFINE FLASH_REGION_VLVMICROCODE_SIZE = 0x00040000
  19. DEFINE FLASH_REGION_VLVMICROCODE_BASE = 0xFFC00000
  20. DEFINE FLASH_REGION_VPD_OFFSET = 0x00440000
  21. DEFINE FLASH_REGION_VPD_SIZE = 0x0003E000
  22. DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_OFFSET = 0x0047E000
  23. DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_SIZE = 0x00002000
  24. DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_OFFSET = 0x00480000
  25. DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_SIZE = 0x00040000
  26. DEFINE FLASH_REGION_FVMAIN_OFFSET = 0x00510000
  27. DEFINE FLASH_REGION_FVMAIN_SIZE = 0x00210000
  28. DEFINE FLASH_REGION_FV_RECOVERY2_OFFSET = 0x00720000
  29. DEFINE FLASH_REGION_FV_RECOVERY2_SIZE = 0x00070000
  30. DEFINE FLASH_REGION_FV_RECOVERY_OFFSET = 0x00790000
  31. DEFINE FLASH_REGION_FV_RECOVERY_SIZE = 0x00070000
  32. ################################################################################
  33. #
  34. # FD Section
  35. # The [FD] Section is made up of the definition statements and a
  36. # description of what goes into the Flash Device Image. Each FD section
  37. # defines one flash "device" image. A flash device image may be one of
  38. # the following: Removable media bootable image (like a boot floppy
  39. # image,) an Option ROM image (that would be "flashed" into an add-in
  40. # card,) a System "Flash" image (that would be burned into a system's
  41. # flash) or an Update ("Capsule") image that will be used to update and
  42. # existing system flash.
  43. #
  44. ################################################################################
  45. [FD.Vlv]
  46. BaseAddress = $(FLASH_BASE)|gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress #The base address of the 3Mb FLASH Device.
  47. Size = $(FLASH_SIZE)|gPlatformModuleTokenSpaceGuid.PcdFlashAreaSize #The flash size in bytes of the 3Mb FLASH Device.
  48. ErasePolarity = 1
  49. BlockSize = $(FLASH_BLOCK_SIZE) #The block size in bytes of the 3Mb FLASH Device.
  50. NumBlocks = $(FLASH_NUM_BLOCKS) #The number of blocks in 3Mb FLASH Device.
  51. #
  52. #Flash location override based on actual flash map
  53. #
  54. SET gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress = $(FLASH_AREA_BASE_ADDRESS)
  55. SET gPlatformModuleTokenSpaceGuid.PcdFlashAreaSize = $(FLASH_AREA_SIZE)
  56. SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(FLASH_REGION_VLVMICROCODE_BASE) + 0x60
  57. SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(FLASH_REGION_VLVMICROCODE_SIZE) - 0x60
  58. ################################################################################
  59. #
  60. # Following are lists of FD Region layout which correspond to the locations of different
  61. # images within the flash device.
  62. #
  63. # Regions must be defined in ascending order and may not overlap.
  64. #
  65. # A Layout Region start with a eight digit hex offset (leading "0x" required) followed by
  66. # the pipe "|" character, followed by the size of the region, also in hex with the leading
  67. # "0x" characters. Like:
  68. # Offset|Size
  69. # PcdOffsetCName|PcdSizeCName
  70. # RegionType <FV, DATA, or FILE>
  71. # Fv Size can be adjusted; FVMAIN_COMPACT can be reduced to 0x120000, and FV_RECOVERY can be enlarged to 0x80000
  72. #
  73. ################################################################################
  74. #
  75. # IFWI Header
  76. #
  77. 0x0000|0x1000
  78. FILE=Vlv2TbltDevicePkg/Stitch/IFWIHeader/IFWI_HEADER.bin
  79. #
  80. # CPU Microcodes
  81. #
  82. $(FLASH_REGION_VLVMICROCODE_OFFSET)|$(FLASH_REGION_VLVMICROCODE_SIZE)
  83. gPlatformModuleTokenSpaceGuid.PcdFlashMicroCodeAddress|gPlatformModuleTokenSpaceGuid.PcdFlashMicroCodeSize
  84. FV = MICROCODE_FV
  85. $(FLASH_REGION_VPD_OFFSET)|$(FLASH_REGION_VPD_SIZE)
  86. gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize
  87. #NV_VARIABLE_STORE
  88. DATA = {
  89. ## This is the EFI_FIRMWARE_VOLUME_HEADER
  90. # ZeroVector []
  91. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  92. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  93. # FileSystemGuid: gEfiSystemNvDataFvGuid =
  94. # { 0xFFF12B8D, 0x7696, 0x4C8B, { 0xA9, 0x85, 0x27, 0x47, 0x07, 0x5B, 0x4F, 0x50 }}
  95. 0x8D, 0x2B, 0xF1, 0xFF, 0x96, 0x76, 0x8B, 0x4C,
  96. 0xA9, 0x85, 0x27, 0x47, 0x07, 0x5B, 0x4F, 0x50,
  97. # FvLength: 0x80000
  98. 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00,
  99. #Signature "_FVH" #Attributes
  100. 0x5f, 0x46, 0x56, 0x48, 0xff, 0xfe, 0x04, 0x00,
  101. #HeaderLength #CheckSum #ExtHeaderOffset #Reserved #Revision
  102. 0x48, 0x00, 0x2A, 0x09, 0x00, 0x00, 0x00, 0x02,
  103. #Blockmap[0]: 7 Blocks * 0x10000 Bytes / Block
  104. 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00,
  105. #Blockmap[1]: End
  106. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  107. ## This is the VARIABLE_STORE_HEADER
  108. !if $(SECURE_BOOT_ENABLE) == TRUE
  109. #Signature: gEfiAuthenticatedVariableGuid =
  110. # { 0xaaf32c78, 0x947b, 0x439a, { 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92 }}
  111. 0x78, 0x2c, 0xf3, 0xaa, 0x7b, 0x94, 0x9a, 0x43,
  112. 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92,
  113. !else
  114. #Signature: gEfiVariableGuid =
  115. # { 0xddcf3616, 0x3275, 0x4164, { 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d }}
  116. 0x16, 0x36, 0xcf, 0xdd, 0x75, 0x32, 0x64, 0x41,
  117. 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d,
  118. !endif
  119. #Size: 0x3E000 (gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize) - 0x48 (size of EFI_FIRMWARE_VOLUME_HEADER) = 0x03DFB8
  120. # This can speed up the Variable Dispatch a bit.
  121. 0xB8, 0xDF, 0x03, 0x00,
  122. #FORMATTED: 0x5A #HEALTHY: 0xFE #Reserved: UINT16 #Reserved1: UINT32
  123. 0x5A, 0xFE, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
  124. }
  125. $(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_OFFSET)|$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_SIZE)
  126. gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize
  127. #NV_FTW_WORKING
  128. DATA = {
  129. # EFI_FAULT_TOLERANT_WORKING_BLOCK_HEADER->Signature = gEdkiiWorkingBlockSignatureGuid =
  130. # { 0x9e58292b, 0x7c68, 0x497d, { 0xa0, 0xce, 0x65, 0x0, 0xfd, 0x9f, 0x1b, 0x95 }}
  131. 0x2B, 0x29, 0x58, 0x9E, 0x68, 0x7C, 0x7D, 0x49,
  132. 0xA0, 0xCE, 0x65, 0x0, 0xFD, 0x9F, 0x1B, 0x95,
  133. # Crc:UINT32 #WorkingBlockValid:1, WorkingBlockInvalid:1, Reserved
  134. 0xE2, 0x33, 0xF2, 0x3, 0xFE, 0xFF, 0xFF, 0xFF,
  135. # WriteQueueSize: UINT64 #Size: 0x2000 - 0x20 (FTW_WORKING_HEADER) = 0x1FE0
  136. 0xE0, 0x1F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
  137. }
  138. $(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_OFFSET)|$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_SIZE)
  139. gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
  140. #
  141. # Main Block
  142. #
  143. $(FLASH_REGION_FVMAIN_OFFSET)|$(FLASH_REGION_FVMAIN_SIZE)
  144. gPlatformModuleTokenSpaceGuid.PcdFlashFvMainBase|gPlatformModuleTokenSpaceGuid.PcdFlashFvMainSize
  145. FV = FVMAIN_COMPACT
  146. #
  147. # FV Recovery#2
  148. #
  149. $(FLASH_REGION_FV_RECOVERY2_OFFSET)|$(FLASH_REGION_FV_RECOVERY2_SIZE)
  150. gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery2Base|gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery2Size
  151. FV = FVRECOVERY2
  152. #
  153. # FV Recovery
  154. #
  155. $(FLASH_REGION_FV_RECOVERY_OFFSET)|$(FLASH_REGION_FV_RECOVERY_SIZE)
  156. gPlatformModuleTokenSpaceGuid.PcdFlashFvRecoveryBase|gPlatformModuleTokenSpaceGuid.PcdFlashFvRecoverySize
  157. FV = FVRECOVERY
  158. ################################################################################
  159. #
  160. # FV Section
  161. #
  162. # [FV] section is used to define what components or modules are placed within a flash
  163. # device file. This section also defines order the components and modules are positioned
  164. # within the image. The [FV] section consists of define statements, set statements and
  165. # module statements.
  166. #
  167. ################################################################################
  168. [FV.MICROCODE_FV]
  169. BlockSize = $(FLASH_BLOCK_SIZE)
  170. FvAlignment = 16
  171. ERASE_POLARITY = 1
  172. MEMORY_MAPPED = TRUE
  173. STICKY_WRITE = TRUE
  174. LOCK_CAP = TRUE
  175. LOCK_STATUS = FALSE
  176. WRITE_DISABLED_CAP = TRUE
  177. WRITE_ENABLED_CAP = TRUE
  178. WRITE_STATUS = TRUE
  179. WRITE_LOCK_CAP = TRUE
  180. WRITE_LOCK_STATUS = TRUE
  181. READ_DISABLED_CAP = TRUE
  182. READ_ENABLED_CAP = TRUE
  183. READ_STATUS = TRUE
  184. READ_LOCK_CAP = TRUE
  185. READ_LOCK_STATUS = TRUE
  186. FILE RAW = 197DB236-F856-4924-90F8-CDF12FB875F3 {
  187. $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/$(DXE_ARCHITECTURE)/MicrocodeUpdates.bin
  188. }
  189. !if $(RECOVERY_ENABLE)
  190. [FV.FVRECOVERY_COMPONENTS]
  191. FvAlignment = 16 #FV alignment and FV attributes setting.
  192. ERASE_POLARITY = 1
  193. MEMORY_MAPPED = TRUE
  194. STICKY_WRITE = TRUE
  195. LOCK_CAP = TRUE
  196. LOCK_STATUS = TRUE
  197. WRITE_DISABLED_CAP = TRUE
  198. WRITE_ENABLED_CAP = TRUE
  199. WRITE_STATUS = TRUE
  200. WRITE_LOCK_CAP = TRUE
  201. WRITE_LOCK_STATUS = TRUE
  202. READ_DISABLED_CAP = TRUE
  203. READ_ENABLED_CAP = TRUE
  204. READ_STATUS = TRUE
  205. READ_LOCK_CAP = TRUE
  206. READ_LOCK_STATUS = TRUE
  207. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchUsb.inf
  208. INF MdeModulePkg/Bus/Pci/EhciPei/EhciPei.inf
  209. INF MdeModulePkg/Bus/Usb/UsbBusPei/UsbBusPei.inf
  210. INF MdeModulePkg/Bus/Usb/UsbBotPei/UsbBotPei.inf
  211. INF FatPkg/FatPei/FatPei.inf
  212. INF MdeModulePkg/Universal/Disk/CdExpressPei/CdExpressPei.inf
  213. INF SignedCapsulePkg/Universal/RecoveryModuleLoadPei/RecoveryModuleLoadPei.inf
  214. !endif
  215. ################################################################################
  216. #
  217. # FV Section
  218. #
  219. # [FV] section is used to define what components or modules are placed within a flash
  220. # device file. This section also defines order the components and modules are positioned
  221. # within the image. The [FV] section consists of define statements, set statements and
  222. # module statements.
  223. #
  224. ################################################################################
  225. [FV.FVRECOVERY2]
  226. BlockSize = $(FLASH_BLOCK_SIZE)
  227. FvAlignment = 16 #FV alignment and FV attributes setting.
  228. ERASE_POLARITY = 1
  229. MEMORY_MAPPED = TRUE
  230. STICKY_WRITE = TRUE
  231. LOCK_CAP = TRUE
  232. LOCK_STATUS = TRUE
  233. WRITE_DISABLED_CAP = TRUE
  234. WRITE_ENABLED_CAP = TRUE
  235. WRITE_STATUS = TRUE
  236. WRITE_LOCK_CAP = TRUE
  237. WRITE_LOCK_STATUS = TRUE
  238. READ_DISABLED_CAP = TRUE
  239. READ_ENABLED_CAP = TRUE
  240. READ_STATUS = TRUE
  241. READ_LOCK_CAP = TRUE
  242. READ_LOCK_STATUS = TRUE
  243. FvNameGuid = B73FE497-B92E-416e-8326-45AD0D270092
  244. INF Vlv2TbltDevicePkg/PlatformInitPei/PlatformInitPei.inf
  245. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchSmbusArpDisabled.inf
  246. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/IA32/VlvInitPeim.inf
  247. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchInitPeim.inf
  248. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchSpiPeim.inf
  249. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PeiSmmAccess.inf
  250. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PeiSmmControl.inf
  251. INF UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf
  252. INF UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationPei.inf
  253. !if $(TPM_ENABLED) == TRUE
  254. INF SecurityPkg/Tcg/Tcg2Config/Tcg2ConfigPei.inf
  255. INF SecurityPkg/Tcg/TcgPei/TcgPei.inf
  256. INF SecurityPkg/Tcg/PhysicalPresencePei/PhysicalPresencePei.inf
  257. !endif
  258. INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
  259. !if $(ACPI50_ENABLE) == TRUE
  260. INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTablePei/FirmwarePerformancePei.inf
  261. !endif
  262. !if $(PERFORMANCE_ENABLE) == TRUE
  263. INF MdeModulePkg/Universal/ReportStatusCodeRouter/Pei/ReportStatusCodeRouterPei.inf
  264. !endif
  265. !if $(RECOVERY_ENABLE)
  266. FILE FV_IMAGE = 1E9D7604-EF45-46a0-BD8A-71AC78C17AC1 {
  267. SECTION PEI_DEPEX_EXP = {gEfiPeiMemoryDiscoveredPpiGuid AND gEfiPeiBootInRecoveryModePpiGuid}
  268. SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF { # LZMA COMPRESS GUID
  269. SECTION FV_IMAGE = FVRECOVERY_COMPONENTS
  270. }
  271. }
  272. !endif
  273. [FV.FVRECOVERY]
  274. BlockSize = $(FLASH_BLOCK_SIZE)
  275. FvAlignment = 16 #FV alignment and FV attributes setting.
  276. ERASE_POLARITY = 1
  277. MEMORY_MAPPED = TRUE
  278. STICKY_WRITE = TRUE
  279. LOCK_CAP = TRUE
  280. LOCK_STATUS = TRUE
  281. WRITE_DISABLED_CAP = TRUE
  282. WRITE_ENABLED_CAP = TRUE
  283. WRITE_STATUS = TRUE
  284. WRITE_LOCK_CAP = TRUE
  285. WRITE_LOCK_STATUS = TRUE
  286. READ_DISABLED_CAP = TRUE
  287. READ_ENABLED_CAP = TRUE
  288. READ_STATUS = TRUE
  289. READ_LOCK_CAP = TRUE
  290. READ_LOCK_STATUS = TRUE
  291. FvNameGuid = B73FE497-B92E-416e-8326-45AD0D270091
  292. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/IA32/SecCore.inf
  293. INF MdeModulePkg/Core/Pei/PeiMain.inf
  294. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/IA32/CpuPeim.inf
  295. INF MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf
  296. INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
  297. INF Vlv2TbltDevicePkg/PlatformPei/PlatformPei.inf
  298. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/IA32/SeCUma.inf
  299. !if $(SOURCE_DEBUG_ENABLE) == TRUE
  300. INF SourceLevelDebugPkg/DebugAgentPei/DebugAgentPei.inf
  301. !endif
  302. !if $(CAPSULE_ENABLE) == TRUE
  303. INF MdeModulePkg/Universal/CapsulePei/CapsulePei.inf
  304. !if $(DXE_ARCHITECTURE) == "X64"
  305. INF MdeModulePkg/Universal/CapsulePei/CapsuleX64.inf
  306. !endif
  307. !endif
  308. !if $(PCIESC_ENABLE) == TRUE
  309. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchEarlyInitPeim.inf
  310. !endif
  311. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/IA32/MemoryInit.inf
  312. INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
  313. [FV.FVMAIN]
  314. BlockSize = $(FLASH_BLOCK_SIZE)
  315. FvAlignment = 16
  316. ERASE_POLARITY = 1
  317. MEMORY_MAPPED = TRUE
  318. STICKY_WRITE = TRUE
  319. LOCK_CAP = TRUE
  320. LOCK_STATUS = TRUE
  321. WRITE_DISABLED_CAP = TRUE
  322. WRITE_ENABLED_CAP = TRUE
  323. WRITE_STATUS = TRUE
  324. WRITE_LOCK_CAP = TRUE
  325. WRITE_LOCK_STATUS = TRUE
  326. READ_DISABLED_CAP = TRUE
  327. READ_ENABLED_CAP = TRUE
  328. READ_STATUS = TRUE
  329. READ_LOCK_CAP = TRUE
  330. READ_LOCK_STATUS = TRUE
  331. FvNameGuid = A881D567-6CB0-4eee-8435-2E72D33E45B5
  332. APRIORI DXE {
  333. INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
  334. INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf
  335. INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf
  336. }
  337. FILE FREEFORM = C3E36D09-8294-4b97-A857-D5288FE33E28 {
  338. SECTION RAW = $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/$(DXE_ARCHITECTURE)/BiosId.bin
  339. }
  340. #
  341. # EDK II Related Platform codes
  342. #
  343. INF MdeModulePkg/Core/Dxe/DxeMain.inf
  344. INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
  345. !if $(ACPI50_ENABLE) == TRUE
  346. INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableDxe/FirmwarePerformanceDxe.inf
  347. INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableSmm/FirmwarePerformanceSmm.inf
  348. !endif
  349. INF UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
  350. INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf
  351. INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf
  352. INF MdeModulePkg/Universal/ReportStatusCodeRouter/Smm/ReportStatusCodeRouterSmm.inf
  353. INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
  354. INF UefiCpuPkg/CpuDxe/CpuDxe.inf
  355. INF UefiCpuPkg/CpuS3DataDxe/CpuS3DataDxe.inf
  356. INF MdeModulePkg/Universal/Metronome/Metronome.inf
  357. INF IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf
  358. !if $(ARCH) == IA32
  359. INF USE=IA32 MdeModulePkg/Logo/Logo.inf
  360. !else
  361. INF USE=X64 MdeModulePkg/Logo/Logo.inf
  362. !endif
  363. INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
  364. INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
  365. INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
  366. INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.inf
  367. INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf
  368. INF Vlv2TbltDevicePkg/FvbRuntimeDxe/FvbSmm.inf
  369. INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf
  370. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSpiSmm.inf
  371. !if $(SECURE_BOOT_ENABLE)
  372. INF SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf
  373. !endif
  374. INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
  375. INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
  376. INF PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntimeDxe.inf
  377. INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
  378. INF Vlv2TbltDevicePkg/FvbRuntimeDxe/FvbRuntimeDxe.inf
  379. INF Vlv2TbltDevicePkg/PlatformSetupDxe/PlatformSetupDxe.inf
  380. !if $(DATAHUB_ENABLE) == TRUE
  381. INF IntelFrameworkModulePkg/Universal/DataHubDxe/DataHubDxe.inf
  382. !endif
  383. INF MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf
  384. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/Dptf.inf
  385. #
  386. # EDK II Related Silicon codes
  387. #
  388. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchS3SupportDxe.inf
  389. INF PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.inf
  390. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmmControl.inf
  391. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSmbusDxe.inf
  392. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchReset.inf
  393. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchInitDxe.inf
  394. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchInitSmm.inf
  395. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSmiDispatcher.inf
  396. !if $(PCIESC_ENABLE) == TRUE
  397. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchPcieSmm.inf
  398. !endif
  399. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSpiRuntime.inf
  400. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchPolicyInitDxe.inf
  401. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchBiosWriteProtect.inf
  402. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmmAccess.inf
  403. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PciHostBridge.inf
  404. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/VlvInitDxe.inf
  405. !if $(TPM_ENABLED) == TRUE
  406. INF SecurityPkg/Tcg/TcgConfigDxe/TcgConfigDxe.inf
  407. INF SecurityPkg/Tcg/TcgDxe/TcgDxe.inf
  408. INF RuleOverride = DRIVER_ACPITABLE SecurityPkg/Tcg/TcgSmm/TcgSmm.inf
  409. !endif
  410. #
  411. # EDK II Related Platform codes
  412. #
  413. INF Vlv2TbltDevicePkg/PlatformSmm/PlatformSmm.inf
  414. INF Vlv2TbltDevicePkg/PlatformInfoDxe/PlatformInfoDxe.inf
  415. INF Vlv2TbltDevicePkg/PlatformCpuInfoDxe/PlatformCpuInfoDxe.inf
  416. INF Vlv2TbltDevicePkg/PlatformDxe/PlatformDxe.inf
  417. INF Vlv2TbltDevicePkg/PciPlatform/PciPlatform.inf
  418. INF Vlv2TbltDevicePkg/SaveMemoryConfig/SaveMemoryConfig.inf
  419. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PlatformCpuPolicy.inf
  420. INF Vlv2TbltDevicePkg/PpmPolicy/PpmPolicy.inf
  421. !if $(GOP_DRIVER_ENABLE) == TRUE
  422. INF Vlv2TbltDevicePkg/PlatformGopPolicy/PlatformGopPolicy.inf
  423. FILE DRIVER = FF0C8745-3270-4439-B74F-3E45F8C77064 {
  424. SECTION DXE_DEPEX_EXP = {gPlatformGOPPolicyGuid}
  425. SECTION PE32 = Vlv2SocBinPkg/GOP/7.2.1011/RELEASE_VS2008x86/$(DXE_ARCHITECTURE)/IntelGopDriver.efi
  426. SECTION UI = "IntelGopDriver"
  427. }
  428. !endif
  429. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PnpDxe.inf
  430. #
  431. # SMM
  432. #
  433. INF MdeModulePkg/Core/PiSmmCore/PiSmmIpl.inf
  434. INF MdeModulePkg/Core/PiSmmCore/PiSmmCore.inf
  435. INF UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf
  436. INF UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.inf
  437. INF MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.inf
  438. INF UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationSmm.inf
  439. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PowerManagement2.inf
  440. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/DigitalThermalSensor.inf
  441. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/GraphicDxeInitSmm.inf
  442. #
  443. # ACPI
  444. #
  445. INF MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/BootScriptExecutorDxe.inf
  446. INF MdeModulePkg/Universal/Acpi/S3SaveStateDxe/S3SaveStateDxe.inf
  447. INF IntelFrameworkModulePkg/Universal/Acpi/AcpiSupportDxe/AcpiSupportDxe.inf
  448. INF RuleOverride = ACPITABLE2 Vlv2DeviceRefCodePkg/ValleyView2Soc/CPU/PowerManagement/AcpiTables/PowerManagementAcpiTables.inf
  449. INF RuleOverride = ACPITABLE Vlv2DeviceRefCodePkg/AcpiTablesPCAT/AcpiTables.inf
  450. INF Vlv2TbltDevicePkg/AcpiPlatform/AcpiPlatform.inf
  451. INF MdeModulePkg/Universal/Acpi/BootGraphicsResourceTableDxe/BootGraphicsResourceTableDxe.inf
  452. #
  453. # PCI
  454. #
  455. INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
  456. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/ISPDxe.inf
  457. #
  458. # ISA
  459. #
  460. INF Vlv2TbltDevicePkg/PcuSio/PcuSio.inf
  461. !if $(SOURCE_DEBUG_ENABLE) != TRUE
  462. INF MdeModulePkg/Bus/Pci/PciSioSerialDxe/PciSioSerialDxe.inf
  463. !endif
  464. #
  465. # IDE/SCSI/AHCI
  466. #
  467. INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
  468. INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
  469. INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
  470. !if $(SATA_ENABLE) == TRUE
  471. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SataController.inf
  472. #
  473. #
  474. INF MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
  475. INF MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
  476. !if $(SCSI_ENABLE) == TRUE
  477. INF MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf
  478. INF MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf
  479. !endif
  480. #
  481. !endif
  482. # Console
  483. #
  484. INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
  485. INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
  486. INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
  487. INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
  488. INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
  489. INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
  490. INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
  491. #
  492. # USB
  493. #
  494. !if $(USB_ENABLE) == TRUE
  495. INF MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf
  496. INF MdeModulePkg/Bus/Pci/UhciDxe/UhciDxe.inf
  497. INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf
  498. INF MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf
  499. INF MdeModulePkg/Bus/Usb/UsbMouseDxe/UsbMouseDxe.inf
  500. INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf
  501. INF MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf
  502. !endif
  503. #
  504. # SMBIOS
  505. #
  506. INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
  507. INF Vlv2TbltDevicePkg/SmBiosMiscDxe/SmBiosMiscDxe.inf
  508. INF RuleOverride = BINARY Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmbiosMemory.inf
  509. #
  510. # FAT file system
  511. #
  512. INF FatPkg/EnhancedFatDxe/Fat.inf
  513. #
  514. # UEFI Shell
  515. #
  516. INF ShellPkg/Application/Shell/Shell.inf
  517. #
  518. # dp command
  519. #
  520. !if $(PERFORMANCE_ENABLE) == TRUE
  521. INF ShellPkg/DynamicCommand/DpDynamicCommand/DpDynamicCommand.inf
  522. !endif
  523. !if $(GOP_DRIVER_ENABLE) == TRUE
  524. FILE FREEFORM = 878AC2CC-5343-46F2-B563-51F89DAF56BA {
  525. SECTION RAW = Vlv2SocBinPkg/GOP/7.2.1011/VBT/MNW2/Vbt.bin
  526. SECTION UI = "IntelGopVbt"
  527. }
  528. !endif
  529. #
  530. # Network Modules
  531. #
  532. !include NetworkPkg/Network.fdf.inc
  533. !if $(NETWORK_ENABLE) == TRUE
  534. FILE DRIVER = 22DE1691-D65D-456a-993E-A253DD1F308C {
  535. SECTION PE32 = Vlv2SocBinPkg/UNDI/RtkUndiDxe/$(DXE_ARCHITECTURE)/RtkUndiDxe.efi
  536. SECTION UI = "RtkUndiDxe"
  537. }
  538. !if $(DXE_ARCHITECTURE) == "X64"
  539. FILE DRIVER = 7C7467E9-8BB3-4BF1-8694-6FED7D25D13E {
  540. SECTION PE32 = Vlv2SocBinPkg/UNDI/I211PcieUndiDxe/$(DXE_ARCHITECTURE)/E7006X3.EFI
  541. SECTION UI = "E7006X3"
  542. }
  543. !endif
  544. !endif
  545. !if $(CAPSULE_ENABLE)
  546. INF MdeModulePkg/Universal/EsrtFmpDxe/EsrtFmpDxe.inf
  547. #
  548. # Minnow Max System Firmware FMP
  549. #
  550. INF FILE_GUID = $(FMP_MINNOW_MAX_SYSTEM) FmpDevicePkg/FmpDxe/FmpDxe.inf
  551. #
  552. # Sample Device FMP
  553. #
  554. INF FILE_GUID = $(FMP_GREEN_SAMPLE_DEVICE) FmpDevicePkg/FmpDxe/FmpDxe.inf
  555. INF FILE_GUID = $(FMP_BLUE_SAMPLE_DEVICE) FmpDevicePkg/FmpDxe/FmpDxe.inf
  556. INF FILE_GUID = $(FMP_RED_SAMPLE_DEVICE) FmpDevicePkg/FmpDxe/FmpDxe.inf
  557. !endif
  558. !if $(MICOCODE_CAPSULE_ENABLE)
  559. INF IntelSiliconPkg/Feature/Capsule/MicrocodeUpdateDxe/MicrocodeUpdateDxe.inf
  560. !endif
  561. !if $(RECOVERY_ENABLE)
  562. FILE FREEFORM = PCD(gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiRsa2048Sha256TestPublicKeyFileGuid) {
  563. SECTION RAW = BaseTools/Source/Python/Rsa2048Sha256Sign/TestSigningPublicKey.bin
  564. SECTION UI = "Rsa2048Sha256TestSigningPublicKey"
  565. }
  566. !endif
  567. [FV.FVMAIN_COMPACT]
  568. BlockSize = $(FLASH_BLOCK_SIZE)
  569. FvAlignment = 16
  570. ERASE_POLARITY = 1
  571. MEMORY_MAPPED = TRUE
  572. STICKY_WRITE = TRUE
  573. LOCK_CAP = TRUE
  574. LOCK_STATUS = TRUE
  575. WRITE_DISABLED_CAP = TRUE
  576. WRITE_ENABLED_CAP = TRUE
  577. WRITE_STATUS = TRUE
  578. WRITE_LOCK_CAP = TRUE
  579. WRITE_LOCK_STATUS = TRUE
  580. READ_DISABLED_CAP = TRUE
  581. READ_ENABLED_CAP = TRUE
  582. READ_STATUS = TRUE
  583. READ_LOCK_CAP = TRUE
  584. READ_LOCK_STATUS = TRUE
  585. FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
  586. !if $(LZMA_ENABLE) == TRUE
  587. # LZMA Compress
  588. SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
  589. SECTION FV_IMAGE = FVMAIN
  590. }
  591. !else
  592. !if $(DXE_COMPRESS_ENABLE) == TRUE
  593. # Tiano Compress
  594. SECTION GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {
  595. SECTION FV_IMAGE = FVMAIN
  596. }
  597. !else
  598. # No Compress
  599. SECTION COMPRESS PI_NONE {
  600. SECTION FV_IMAGE = FVMAIN
  601. }
  602. !endif
  603. !endif
  604. }
  605. [FV.SETUP_DATA]
  606. BlockSize = $(FLASH_BLOCK_SIZE)
  607. #NumBlocks = 0x10
  608. FvAlignment = 16
  609. ERASE_POLARITY = 1
  610. MEMORY_MAPPED = TRUE
  611. STICKY_WRITE = TRUE
  612. LOCK_CAP = TRUE
  613. LOCK_STATUS = TRUE
  614. WRITE_DISABLED_CAP = TRUE
  615. WRITE_ENABLED_CAP = TRUE
  616. WRITE_STATUS = TRUE
  617. WRITE_LOCK_CAP = TRUE
  618. WRITE_LOCK_STATUS = TRUE
  619. READ_DISABLED_CAP = TRUE
  620. READ_ENABLED_CAP = TRUE
  621. READ_STATUS = TRUE
  622. READ_LOCK_CAP = TRUE
  623. READ_LOCK_STATUS = TRUE
  624. ################################################################################
  625. #
  626. # Rules are use with the [FV] section's module INF type to define
  627. # how an FFS file is created for a given INF file. The following Rule are the default
  628. # rules for the different module type. User can add the customized rules to define the
  629. # content of the FFS file.
  630. #
  631. ################################################################################
  632. [Rule.Common.SEC]
  633. FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
  634. PE32 PE32 Align = 8 $(INF_OUTPUT)/$(MODULE_NAME).efi
  635. RAW BIN Align = 16 |.com
  636. }
  637. [Rule.Common.SEC.BINARY]
  638. FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
  639. PE32 PE32 Align = 8 |.efi
  640. RAW BIN Align = 16 |.com
  641. }
  642. [Rule.Common.PEI_CORE]
  643. FILE PEI_CORE = $(NAMED_GUID) {
  644. PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
  645. UI STRING="$(MODULE_NAME)" Optional
  646. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  647. }
  648. [Rule.Common.PEIM]
  649. FILE PEIM = $(NAMED_GUID) {
  650. PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
  651. PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
  652. UI STRING="$(MODULE_NAME)" Optional
  653. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  654. }
  655. [Rule.Common.PEIM.BINARY]
  656. FILE PEIM = $(NAMED_GUID) {
  657. PEI_DEPEX PEI_DEPEX Optional |.depex
  658. PE32 PE32 Align = Auto |.efi
  659. UI STRING="$(MODULE_NAME)" Optional
  660. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  661. }
  662. [Rule.Common.PEIM.BIOSID]
  663. FILE PEIM = $(NAMED_GUID) {
  664. RAW BIN BiosId.bin
  665. PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
  666. PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
  667. UI STRING="$(MODULE_NAME)" Optional
  668. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  669. }
  670. [Rule.Common.USER_DEFINED.APINIT]
  671. FILE RAW = $(NAMED_GUID) Fixed Align=4K {
  672. RAW SEC_BIN |.com
  673. }
  674. #cjia 2011-07-21
  675. [Rule.Common.USER_DEFINED.LEGACY16]
  676. FILE FREEFORM = $(NAMED_GUID) {
  677. UI STRING="$(MODULE_NAME)" Optional
  678. RAW BIN |.bin
  679. }
  680. #cjia
  681. [Rule.Common.USER_DEFINED.ASM16]
  682. FILE FREEFORM = $(NAMED_GUID) {
  683. UI STRING="$(MODULE_NAME)" Optional
  684. RAW BIN |.com
  685. }
  686. [Rule.Common.DXE_CORE]
  687. FILE DXE_CORE = $(NAMED_GUID) {
  688. PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
  689. UI STRING="$(MODULE_NAME)" Optional
  690. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  691. }
  692. [Rule.Common.UEFI_DRIVER]
  693. FILE DRIVER = $(NAMED_GUID) {
  694. DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
  695. PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
  696. UI STRING="$(MODULE_NAME)" Optional
  697. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  698. }
  699. [Rule.Common.UEFI_DRIVER.BINARY]
  700. FILE DRIVER = $(NAMED_GUID) {
  701. DXE_DEPEX DXE_DEPEX Optional |.depex
  702. PE32 PE32 |.efi
  703. UI STRING="$(MODULE_NAME)" Optional
  704. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  705. }
  706. [Rule.Common.UEFI_DRIVER.NATIVE_BINARY]
  707. FILE DRIVER = $(NAMED_GUID) {
  708. DXE_DEPEX DXE_DEPEX Optional $(WORKSPACE)/Vlv2TbltDevicePkg/IntelGopDepex/IntelGopDriver.depex
  709. PE32 PE32 |.efi
  710. UI STRING="$(MODULE_NAME)" Optional
  711. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  712. }
  713. [Rule.Common.DXE_DRIVER]
  714. FILE DRIVER = $(NAMED_GUID) {
  715. DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
  716. PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
  717. UI STRING="$(MODULE_NAME)" Optional
  718. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  719. }
  720. [Rule.Common.DXE_DRIVER.BINARY]
  721. FILE DRIVER = $(NAMED_GUID) {
  722. DXE_DEPEX DXE_DEPEX Optional |.depex
  723. PE32 PE32 |.efi
  724. UI STRING="$(MODULE_NAME)" Optional
  725. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  726. }
  727. [Rule.Common.DXE_DRIVER.DRIVER_ACPITABLE]
  728. FILE DRIVER = $(NAMED_GUID) {
  729. DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
  730. PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
  731. UI STRING="$(MODULE_NAME)" Optional
  732. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  733. RAW ACPI Optional |.acpi
  734. RAW ASL Optional |.aml
  735. }
  736. [Rule.Common.DXE_RUNTIME_DRIVER]
  737. FILE DRIVER = $(NAMED_GUID) {
  738. DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
  739. PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
  740. UI STRING="$(MODULE_NAME)" Optional
  741. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  742. }
  743. [Rule.Common.DXE_RUNTIME_DRIVER.BINARY]
  744. FILE DRIVER = $(NAMED_GUID) {
  745. DXE_DEPEX DXE_DEPEX Optional |.depex
  746. PE32 PE32 |.efi
  747. UI STRING="$(MODULE_NAME)" Optional
  748. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  749. }
  750. [Rule.Common.DXE_SMM_DRIVER]
  751. FILE SMM = $(NAMED_GUID) {
  752. DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
  753. PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
  754. UI STRING="$(MODULE_NAME)" Optional
  755. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  756. }
  757. [Rule.Common.DXE_SMM_DRIVER.BINARY]
  758. FILE SMM = $(NAMED_GUID) {
  759. SMM_DEPEX SMM_DEPEX |.depex
  760. PE32 PE32 |.efi
  761. RAW BIN Optional |.aml
  762. UI STRING="$(MODULE_NAME)" Optional
  763. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  764. }
  765. [Rule.Common.DXE_SMM_DRIVER.DRIVER_ACPITABLE]
  766. FILE SMM = $(NAMED_GUID) {
  767. DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
  768. PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
  769. UI STRING="$(MODULE_NAME)" Optional
  770. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  771. RAW ACPI Optional |.acpi
  772. RAW ASL Optional |.aml
  773. }
  774. [Rule.Common.SMM_CORE]
  775. FILE SMM_CORE = $(NAMED_GUID) {
  776. DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
  777. PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
  778. UI STRING="$(MODULE_NAME)" Optional
  779. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  780. }
  781. [Rule.Common.SMM_CORE.BINARY]
  782. FILE SMM_CORE = $(NAMED_GUID) {
  783. DXE_DEPEX DXE_DEPEX Optional |.depex
  784. PE32 PE32 |.efi
  785. UI STRING="$(MODULE_NAME)" Optional
  786. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  787. }
  788. [Rule.Common.UEFI_APPLICATION]
  789. FILE APPLICATION = $(NAMED_GUID) {
  790. DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
  791. PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
  792. UI STRING="$(MODULE_NAME)" Optional
  793. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  794. }
  795. [Rule.Common.UEFI_APPLICATION.UI]
  796. FILE APPLICATION = $(NAMED_GUID) {
  797. PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
  798. UI STRING="Enter Setup"
  799. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  800. }
  801. [Rule.Common.USER_DEFINED]
  802. FILE FREEFORM = $(NAMED_GUID) {
  803. UI STRING="$(MODULE_NAME)" Optional
  804. RAW BIN |.bin
  805. }
  806. [Rule.Common.USER_DEFINED.BINARY]
  807. FILE FREEFORM = $(NAMED_GUID) {
  808. UI STRING="$(MODULE_NAME)" Optional
  809. RAW BIN |.bin
  810. }
  811. [Rule.Common.USER_DEFINED.ACPITABLE]
  812. FILE FREEFORM = $(NAMED_GUID) {
  813. RAW ACPI Optional |.acpi
  814. RAW ASL Optional |.aml
  815. }
  816. [Rule.Common.USER_DEFINED.ACPITABLE2]
  817. FILE FREEFORM = $(NAMED_GUID) {
  818. RAW ASL Optional |.aml
  819. }
  820. [Rule.Common.ACPITABLE]
  821. FILE FREEFORM = $(NAMED_GUID) {
  822. RAW ACPI Optional |.acpi
  823. RAW ASL Optional |.aml
  824. }
  825. [Rule.Common.PEIM.FMP_IMAGE_DESC]
  826. FILE PEIM = $(NAMED_GUID) {
  827. RAW BIN |.acpi
  828. PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
  829. PE32 PE32 Align=4K $(INF_OUTPUT)/$(MODULE_NAME).efi
  830. UI STRING="$(MODULE_NAME)" Optional
  831. VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
  832. }